X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-mips%2Fio.h;h=c2d124badbe566cfc08e1c76a754709ab1d6ec9a;hb=60ca97584fcb98d2f1b14e4c2f12203dd5b3888e;hp=ba1d7bbc15d2e437553e2df6c818ed77a85ea0d4;hpb=b05005772f34497eb2b7415a651fe785cbe70e16;p=pandora-kernel.git diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index ba1d7bbc15d2..c2d124badbe5 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -12,7 +12,6 @@ #ifndef _ASM_IO_H #define _ASM_IO_H -#include #include #include #include @@ -40,56 +39,13 @@ * hardware. An example use would be for flash memory that's used for * execute in place. */ -# define __raw_ioswabb(x) (x) -# define __raw_ioswabw(x) (x) -# define __raw_ioswabl(x) (x) -# define __raw_ioswabq(x) (x) -# define ____raw_ioswabq(x) (x) +# define __raw_ioswabb(a,x) (x) +# define __raw_ioswabw(a,x) (x) +# define __raw_ioswabl(a,x) (x) +# define __raw_ioswabq(a,x) (x) +# define ____raw_ioswabq(a,x) (x) -/* - * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware; - * less sane hardware forces software to fiddle with this... - * - * Regardless, if the host bus endianness mismatches that of PCI/ISA, then - * you can't have the numerical value of data and byte addresses within - * multibyte quantities both preserved at the same time. Hence two - * variations of functions: non-prefixed ones that preserve the value - * and prefixed ones that preserve byte addresses. The latters are - * typically used for moving raw data between a peripheral and memory (cf. - * string I/O functions), hence the "__mem_" prefix. - */ -#if defined(CONFIG_SWAP_IO_SPACE) - -# define ioswabb(x) (x) -# define __mem_ioswabb(x) (x) -# ifdef CONFIG_SGI_IP22 -/* - * IP22 seems braindead enough to swap 16bits values in hardware, but - * not 32bits. Go figure... Can't tell without documentation. - */ -# define ioswabw(x) (x) -# define __mem_ioswabw(x) le16_to_cpu(x) -# else -# define ioswabw(x) le16_to_cpu(x) -# define __mem_ioswabw(x) (x) -# endif -# define ioswabl(x) le32_to_cpu(x) -# define __mem_ioswabl(x) (x) -# define ioswabq(x) le64_to_cpu(x) -# define __mem_ioswabq(x) (x) - -#else - -# define ioswabb(x) (x) -# define __mem_ioswabb(x) (x) -# define ioswabw(x) (x) -# define __mem_ioswabw(x) cpu_to_le16(x) -# define ioswabl(x) (x) -# define __mem_ioswabl(x) cpu_to_le32(x) -# define ioswabq(x) (x) -# define __mem_ioswabq(x) cpu_to_le32(x) - -#endif +/* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */ #define IO_SPACE_LIMIT 0xffff @@ -346,7 +302,7 @@ static inline void pfx##write##bwlq(type val, \ \ __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); \ \ - __val = pfx##ioswab##bwlq(val); \ + __val = pfx##ioswab##bwlq(__mem, val); \ \ if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) \ *__mem = __val; \ @@ -401,7 +357,7 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \ BUG(); \ } \ \ - return pfx##ioswab##bwlq(__val); \ + return pfx##ioswab##bwlq(__mem, __val); \ } #define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) \ @@ -411,10 +367,9 @@ static inline void pfx##out##bwlq##p(type val, unsigned long port) \ volatile type *__addr; \ type __val; \ \ - port = __swizzle_addr_##bwlq(port); \ - __addr = (void *)(mips_io_port_base + port); \ + __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \ \ - __val = pfx##ioswab##bwlq(val); \ + __val = pfx##ioswab##bwlq(__addr, val); \ \ /* Really, we want this to be atomic */ \ BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ @@ -428,15 +383,14 @@ static inline type pfx##in##bwlq##p(unsigned long port) \ volatile type *__addr; \ type __val; \ \ - port = __swizzle_addr_##bwlq(port); \ - __addr = (void *)(mips_io_port_base + port); \ + __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \ \ BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ \ __val = *__addr; \ slow; \ \ - return pfx##ioswab##bwlq(__val); \ + return pfx##ioswab##bwlq(__addr, __val); \ } #define __BUILD_MEMORY_PFX(bus, bwlq, type) \ @@ -601,50 +555,11 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *); */ #define __ISA_IO_base ((char *)(isa_slot_offset)) -#define isa_readb(a) readb(__ISA_IO_base + (a)) -#define isa_readw(a) readw(__ISA_IO_base + (a)) -#define isa_readl(a) readl(__ISA_IO_base + (a)) -#define isa_readq(a) readq(__ISA_IO_base + (a)) -#define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a)) -#define isa_writew(w,a) writew(w,__ISA_IO_base + (a)) -#define isa_writel(l,a) writel(l,__ISA_IO_base + (a)) -#define isa_writeq(q,a) writeq(q,__ISA_IO_base + (a)) -#define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c)) -#define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c)) -#define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c)) - /* * We don't have csum_partial_copy_fromio() yet, so we cheat here and * just copy it. The net code will then do the checksum later. */ #define eth_io_copy_and_sum(skb,src,len,unused) memcpy_fromio((skb)->data,(src),(len)) -#define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(b),(c),(d)) - -/* - * check_signature - find BIOS signatures - * @io_addr: mmio address to check - * @signature: signature block - * @length: length of signature - * - * Perform a signature comparison with the mmio address io_addr. This - * address should have been obtained by ioremap. - * Returns 1 on a match. - */ -static inline int check_signature(char __iomem *io_addr, - const unsigned char *signature, int length) -{ - int retval = 0; - do { - if (readb(io_addr) != *signature) - goto out; - io_addr++; - signature++; - length--; - } while (length); - retval = 1; -out: - return retval; -} /* * The caches on some architectures aren't dma-coherent and have need to