X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=arch%2Fmips%2Fddb5xxx%2Fddb5477%2Firq.c;h=faa4a506bf82937582bd819a4c37eb8a82220137;hb=03feb0524660bcd890674d11d29a1873ca14d13c;hp=a8bd2e66705ce3fda7885426903ee4a4da98d2e6;hpb=7ff3e52cf2947ebd38c84159af68e5a29d228f6c;p=pandora-kernel.git diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c index a8bd2e66705c..faa4a506bf82 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq.c +++ b/arch/mips/ddb5xxx/ddb5477/irq.c @@ -17,6 +17,7 @@ #include #include +#include #include #include #include @@ -73,7 +74,6 @@ set_pci_int_attr(u32 pci, u32 intn, u32 active, u32 trigger) } extern void vrc5477_irq_init(u32 base); -extern void mips_cpu_irq_init(u32 base); static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL }; void __init arch_init_irq(void) @@ -125,7 +125,7 @@ void __init arch_init_irq(void) /* init all controllers */ init_i8259_irqs(); - mips_cpu_irq_init(CPU_IRQ_BASE); + mips_cpu_irq_init(); vrc5477_irq_init(VRC5477_IRQ_BASE); @@ -146,8 +146,7 @@ u8 i8259_interrupt_ack(void) irq = *(volatile u8 *) KSEG1ADDR(DDB_PCI_IACK_BASE); ddb_out32(DDB_PCIINIT10, reg); - /* i8259.c set the base vector to be 0x0 */ - return irq + I8259_IRQ_BASE; + return irq; } /* * the first level int-handler will jump here if it is a vrc5477 irq @@ -177,7 +176,7 @@ static void vrc5477_irq_dispatch(void) /* check for i8259 interrupts */ if (intStatus & (1 << VRC5477_I8259_CASCADE)) { int i8259_irq = i8259_interrupt_ack(); - do_IRQ(I8259_IRQ_BASE + i8259_irq); + do_IRQ(i8259_irq); return; } } @@ -195,7 +194,7 @@ static void vrc5477_irq_dispatch(void) asmlinkage void plat_irq_dispatch(void) { - unsigned int pending = read_c0_cause() & read_c0_status(); + unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; if (pending & STATUSF_IP7) do_IRQ(CPU_IRQ_BASE + 7);