X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=arch%2Fm68knommu%2Fplatform%2F5307%2Fconfig.c;h=92dc862fa826edb5432875d585a99d266f2d80ca;hb=6e5565f949af1322f8f3d3f43d044645ae448499;hp=e3461619fd65cb5c23ada8aa109eaa5b1f880caf;hpb=53fdc5185c994ad6def3729a905ac4a47c477c9d;p=pandora-kernel.git diff --git a/arch/m68knommu/platform/5307/config.c b/arch/m68knommu/platform/5307/config.c index e3461619fd65..92dc862fa826 100644 --- a/arch/m68knommu/platform/5307/config.c +++ b/arch/m68knommu/platform/5307/config.c @@ -10,25 +10,18 @@ /***************************************************************************/ #include -#include #include #include #include -#include -#include -#include +#include #include #include -#include #include -#include +#include #include /***************************************************************************/ -void coldfire_tick(void); -void coldfire_timer_init(irq_handler_t handler); -unsigned long coldfire_timer_offset(void); void coldfire_reset(void); extern unsigned int mcf_timervector; @@ -45,17 +38,51 @@ unsigned char ledbank = 0xff; /***************************************************************************/ -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { - MCF_MBAR + MCFDMA_BASE0, - MCF_MBAR + MCFDMA_BASE1, - MCF_MBAR + MCFDMA_BASE2, - MCF_MBAR + MCFDMA_BASE3, +static struct mcf_platform_uart m5307_uart_platform[] = { + { + .mapbase = MCF_MBAR + MCFUART_BASE1, + .irq = 73, + }, + { + .mapbase = MCF_MBAR + MCFUART_BASE2, + .irq = 74, + }, + { }, +}; + +static struct platform_device m5307_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = m5307_uart_platform, }; -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; +static struct platform_device *m5307_devices[] __initdata = { + &m5307_uart, +}; + +/***************************************************************************/ + +static void __init m5307_uart_init_line(int line, int irq) +{ + if (line == 0) { + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); + } else if (line == 1) { + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); + } +} + +static void __init m5307_uarts_init(void) +{ + const int nrlines = ARRAY_SIZE(m5307_uart_platform); + int line; + + for (line = 0; (line < nrlines); line++) + m5307_uart_init_line(line, m5307_uart_platform[line].irq); +} /***************************************************************************/ @@ -92,21 +119,7 @@ void mcf_settimericr(unsigned int timer, unsigned int level) /***************************************************************************/ -int mcf_timerirqpending(int timer) -{ - unsigned int imr = 0; - - switch (timer) { - case 1: imr = MCFSIM_IMR_TIMER1; break; - case 2: imr = MCFSIM_IMR_TIMER2; break; - default: break; - } - return (mcf_getipr() & imr); -} - -/***************************************************************************/ - -void config_BSP(char *commandp, int size) +void __init config_BSP(char *commandp, int size) { mcf_setimr(MCFSIM_IMR_MASKALL); @@ -122,12 +135,9 @@ void config_BSP(char *commandp, int size) mcf_timerlevel = 6; #endif - mach_sched_init = coldfire_timer_init; - mach_tick = coldfire_tick; - mach_gettimeoffset = coldfire_timer_offset; mach_reset = coldfire_reset; -#ifdef MCF_BDM_DISABLE +#ifdef CONFIG_BDM_DISABLE /* * Disable the BDM clocking. This also turns off most of the rest of * the BDM device. This is good for EMC reasons. This option is not @@ -138,3 +148,14 @@ void config_BSP(char *commandp, int size) } /***************************************************************************/ + +static int __init init_BSP(void) +{ + m5307_uarts_init(); + platform_add_devices(m5307_devices, ARRAY_SIZE(m5307_devices)); + return 0; +} + +arch_initcall(init_BSP); + +/***************************************************************************/