X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=arch%2Farm%2Fmach-omap2%2Fdevices.c;h=5a0c148e23bc8fe3a76b25dc80d3933a06caf981;hb=7b6181e06841f5ad15c4ff708b967b4db65a64de;hp=c5cf1ba08a6f525732c9e76b4e5b109a1b495aca;hpb=72e58063d63c5f0a7bf65312f1e3a5ed9bb5c2ff;p=pandora-kernel.git diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index c5cf1ba08a6f..5a0c148e23bc 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -9,12 +9,12 @@ * (at your option) any later version. */ -#include #include #include #include #include #include +#include #include #include @@ -22,15 +22,17 @@ #include #include -#include #include #include #include #include #include #include +#include +#include #include "mux.h" +#include "control.h" #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) @@ -538,7 +540,7 @@ static inline void omap_init_sham(void) { } #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE) -#ifdef CONFIG_ARCH_OMAP24XX +#ifdef CONFIG_ARCH_OMAP2 static struct resource omap2_aes_resources[] = { { .start = OMAP24XX_SEC_AES_BASE, @@ -560,7 +562,7 @@ static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources); #define omap2_aes_resources_sz 0 #endif -#ifdef CONFIG_ARCH_OMAP34XX +#ifdef CONFIG_ARCH_OMAP3 static struct resource omap3_aes_resources[] = { { .start = OMAP34XX_SEC_AES_BASE, @@ -732,7 +734,7 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, omap_mux_init_signal("sdmmc_dat0", 0); omap_mux_init_signal("sdmmc_dat_dir0", 0); omap_mux_init_signal("sdmmc_cmd_dir", 0); - if (mmc_controller->slots[0].wires == 4) { + if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) { omap_mux_init_signal("sdmmc_dat1", 0); omap_mux_init_signal("sdmmc_dat2", 0); omap_mux_init_signal("sdmmc_dat3", 0); @@ -760,8 +762,8 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, OMAP_PIN_INPUT_PULLUP); omap_mux_init_signal("sdmmc1_dat0", OMAP_PIN_INPUT_PULLUP); - if (mmc_controller->slots[0].wires == 4 || - mmc_controller->slots[0].wires == 8) { + if (mmc_controller->slots[0].caps & + (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) { omap_mux_init_signal("sdmmc1_dat1", OMAP_PIN_INPUT_PULLUP); omap_mux_init_signal("sdmmc1_dat2", @@ -769,7 +771,8 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, omap_mux_init_signal("sdmmc1_dat3", OMAP_PIN_INPUT_PULLUP); } - if (mmc_controller->slots[0].wires == 8) { + if (mmc_controller->slots[0].caps & + MMC_CAP_8_BIT_DATA) { omap_mux_init_signal("sdmmc1_dat4", OMAP_PIN_INPUT_PULLUP); omap_mux_init_signal("sdmmc1_dat5", @@ -793,8 +796,8 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed * in the board-*.c files */ - if (mmc_controller->slots[0].wires == 4 || - mmc_controller->slots[0].wires == 8) { + if (mmc_controller->slots[0].caps & + (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) { omap_mux_init_signal("sdmmc2_dat1", OMAP_PIN_INPUT_PULLUP); omap_mux_init_signal("sdmmc2_dat2", @@ -802,7 +805,8 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, omap_mux_init_signal("sdmmc2_dat3", OMAP_PIN_INPUT_PULLUP); } - if (mmc_controller->slots[0].wires == 8) { + if (mmc_controller->slots[0].caps & + MMC_CAP_8_BIT_DATA) { omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4", OMAP_PIN_INPUT_PULLUP); omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5", @@ -853,13 +857,13 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, case 3: if (!cpu_is_omap44xx()) return; - base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET; + base = OMAP4_MMC4_BASE; irq = OMAP44XX_IRQ_MMC4; break; case 4: if (!cpu_is_omap44xx()) return; - base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET; + base = OMAP4_MMC5_BASE; irq = OMAP44XX_IRQ_MMC5; break; default: @@ -870,10 +874,8 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, size = OMAP2420_MMC_SIZE; name = "mmci-omap"; } else if (cpu_is_omap44xx()) { - if (i < 3) { - base += OMAP4_MMC_REG_OFFSET; + if (i < 3) irq += OMAP44XX_IRQ_GIC_START; - } size = OMAP4_HSMMC_SIZE; name = "mmci-omap-hs"; } else { @@ -949,11 +951,72 @@ static inline void omap_init_vout(void) {} /*-------------------------------------------------------------------------*/ +/* + * Inorder to avoid any assumptions from bootloader regarding WDT + * settings, WDT module is reset during init. This enables the watchdog + * timer. Hence it is required to disable the watchdog after the WDT reset + * during init. Otherwise the system would reboot as per the default + * watchdog timer registers settings. + */ +#define OMAP_WDT_WPS (0x34) +#define OMAP_WDT_SPR (0x48) + +static int omap2_disable_wdt(struct omap_hwmod *oh, void *unused) +{ + void __iomem *base; + int ret; + + if (!oh) { + pr_err("%s: Could not look up wdtimer_hwmod\n", __func__); + return -EINVAL; + } + + base = omap_hwmod_get_mpu_rt_va(oh); + if (!base) { + pr_err("%s: Could not get the base address for %s\n", + oh->name, __func__); + return -EINVAL; + } + + /* Enable the clocks before accessing the WDT registers */ + ret = omap_hwmod_enable(oh); + if (ret) { + pr_err("%s: Could not enable clocks for %s\n", + oh->name, __func__); + return ret; + } + + /* sequence required to disable watchdog */ + __raw_writel(0xAAAA, base + OMAP_WDT_SPR); + while (__raw_readl(base + OMAP_WDT_WPS) & 0x10) + cpu_relax(); + + __raw_writel(0x5555, base + OMAP_WDT_SPR); + while (__raw_readl(base + OMAP_WDT_WPS) & 0x10) + cpu_relax(); + + ret = omap_hwmod_idle(oh); + if (ret) + pr_err("%s: Could not disable clocks for %s\n", + oh->name, __func__); + + return ret; +} + +static void __init omap_disable_wdt(void) +{ + if (cpu_class_is_omap2()) + omap_hwmod_for_each_by_class("wd_timer", + omap2_disable_wdt, NULL); + return; +} + static int __init omap2_init_devices(void) { /* please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ + omap_disable_wdt(); omap_hsmmc_reset(); omap_init_audio(); omap_init_camera(); @@ -969,3 +1032,39 @@ static int __init omap2_init_devices(void) return 0; } arch_initcall(omap2_init_devices); + +#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) +struct omap_device_pm_latency omap_wdt_latency[] = { + [0] = { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + +static int __init omap_init_wdt(void) +{ + int id = -1; + struct omap_device *od; + struct omap_hwmod *oh; + char *oh_name = "wd_timer2"; + char *dev_name = "omap_wdt"; + + if (!cpu_class_is_omap2()) + return 0; + + oh = omap_hwmod_lookup(oh_name); + if (!oh) { + pr_err("Could not look up wd_timer%d hwmod\n", id); + return -EINVAL; + } + + od = omap_device_build(dev_name, id, oh, NULL, 0, + omap_wdt_latency, + ARRAY_SIZE(omap_wdt_latency), 0); + WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n", + dev_name, oh->name); + return 0; +} +subsys_initcall(omap_init_wdt); +#endif