X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=arch%2Farm%2Fmach-at91%2Fat91rm9200.c;h=f73302dbc6a547272624bee244224aa2fa06e520;hb=e10b87d2b5b4574cdf3a5a19b22ca88b91ba7151;hp=83a1a3fee5549be3f7cb92a8bb50335e9150509e;hpb=e6625fa48e6580a74b7e700efd7e6463e282810b;p=pandora-kernel.git diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 83a1a3fee554..f73302dbc6a5 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -20,25 +20,16 @@ #include #include +#include "soc.h" #include "generic.h" #include "clock.h" static struct map_desc at91rm9200_io_desc[] __initdata = { { - .virtual = AT91_VA_BASE_SYS, - .pfn = __phys_to_pfn(AT91_BASE_SYS), - .length = SZ_4K, - .type = MT_DEVICE, - }, { .virtual = AT91_VA_BASE_EMAC, .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC), .length = SZ_16K, .type = MT_DEVICE, - }, { - .virtual = AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE, - .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE), - .length = AT91RM9200_SRAM_SIZE, - .type = MT_DEVICE, }, }; @@ -304,24 +295,17 @@ static void at91rm9200_reset(void) at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); } -int rm9200_type; -EXPORT_SYMBOL(rm9200_type); - -void __init at91rm9200_set_type(int type) -{ - rm9200_type = type; -} - /* -------------------------------------------------------------------- * AT91RM9200 processor initialization * -------------------------------------------------------------------- */ -void __init at91rm9200_map_io(void) +static void __init at91rm9200_map_io(void) { /* Map peripherals */ + at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE); iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); } -void __init at91rm9200_initialize(unsigned long main_clock) +static void __init at91rm9200_initialize(void) { at91_arch_reset = at91rm9200_reset; at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) @@ -329,12 +313,6 @@ void __init at91rm9200_initialize(unsigned long main_clock) | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) | (1 << AT91RM9200_ID_IRQ6); - /* Init clock subsystem */ - at91_clock_init(main_clock); - - /* Register the processor-specific clocks */ - at91rm9200_register_clocks(); - /* Initialize GPIO subsystem */ at91_gpio_init(at91rm9200_gpio, cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP); @@ -383,14 +361,9 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { 0 /* Advanced Interrupt Controller (IRQ6) */ }; -void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS]) -{ - if (!priority) - priority = at91rm9200_default_irq_priority; - - /* Initialize the AIC interrupt controller */ - at91_aic_init(priority); - - /* Enable GPIO interrupts */ - at91_gpio_irq_setup(); -} +struct at91_init_soc __initdata at91rm9200_soc = { + .map_io = at91rm9200_map_io, + .default_irq_priority = at91rm9200_default_irq_priority, + .register_clocks = at91rm9200_register_clocks, + .init = at91rm9200_initialize, +};