drm/radeon/kms: use RADEON_GPU_PAGE_SIZE instead of 4096

[pandora-kernel.git] / drivers / gpu / drm / radeon / radeon_gart.c

diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c
index a931af0..a68d756 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_gart.c
+++ b/drivers/gpu/drm/radeon/radeon_gart.c
@@ -140,15 +140,15 @@ void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
                WARN(1, "trying to unbind memory to unitialized GART !\n");
                return;
        }
-       t = offset / 4096;
-       p = t / (PAGE_SIZE / 4096);
+       t = offset / RADEON_GPU_PAGE_SIZE;
+       p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
        for (i = 0; i < pages; i++, p++) {
                if (rdev->gart.pages[p]) {
                        pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p],
                                       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
                        rdev->gart.pages[p] = NULL;
                        rdev->gart.pages_addr[p] = 0;
-                       for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) {
+                       for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
                                radeon_gart_set_page(rdev, t, 0);
                        }
                }
@@ -169,8 +169,8 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
                DRM_ERROR("trying to bind memory to unitialized GART !\n");
                return -EINVAL;
        }
-       t = offset / 4096;
-       p = t / (PAGE_SIZE / 4096);
+       t = offset / RADEON_GPU_PAGE_SIZE;
+       p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
 
        for (i = 0; i < pages; i++, p++) {
                /* we need to support large memory configurations */
@@ -185,9 +185,9 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
                }
                rdev->gart.pages[p] = pagelist[i];
                page_base = rdev->gart.pages_addr[p];
-               for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) {
+               for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
                        radeon_gart_set_page(rdev, t, page_base);
-                       page_base += 4096;
+                       page_base += RADEON_GPU_PAGE_SIZE;
                }
        }
        mb();
@@ -200,14 +200,14 @@ int radeon_gart_init(struct radeon_device *rdev)
        if (rdev->gart.pages) {
                return 0;
        }
-       /* We need PAGE_SIZE >= 4096 */
-       if (PAGE_SIZE < 4096) {
+       /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
+       if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
                DRM_ERROR("Page size is smaller than GPU page size!\n");
                return -EINVAL;
        }
        /* Compute table size */
        rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
-       rdev->gart.num_gpu_pages = rdev->mc.gtt_size / 4096;
+       rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
        DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
                 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
        /* Allocate pages table */