Merge branch 'next-s3c64xx-regs' of git://aeryn.fluff.org.uk/bjdooks/linux into devel

[pandora-kernel.git] / arch / mips / kernel / cpu-probe.c

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index c9207b5..1bdbcad 100644 (file)
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -96,6 +96,9 @@ int allow_au1k_wait;
 
 static void au1k_wait(void)
 {
+       if (!allow_au1k_wait)
+               return;
+
        /* using the wait instruction makes CP0 counter unusable */
        __asm__("       .set    mips3                   \n"
                "       cache   0x14, 0(%0)             \n"
@@ -146,6 +149,7 @@ void __init check_wait(void)
        case CPU_R4650:
        case CPU_R4700:
        case CPU_R5000:
+       case CPU_R5500:
        case CPU_NEVADA:
        case CPU_4KC:
        case CPU_4KEC:
@@ -154,6 +158,7 @@ void __init check_wait(void)
        case CPU_25KF:
        case CPU_PR4450:
        case CPU_BCM3302:
+       case CPU_CAVIUM_OCTEON:
                cpu_wait = r4k_wait;
                break;
 
@@ -185,8 +190,7 @@ void __init check_wait(void)
        case CPU_AU1200:
        case CPU_AU1210:
        case CPU_AU1250:
-               if (allow_au1k_wait)
-                       cpu_wait = au1k_wait;
+               cpu_wait = au1k_wait;
                break;
        case CPU_20KC:
                /*
@@ -875,6 +879,27 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
        }
 }
 
+static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
+{
+       decode_configs(c);
+       switch (c->processor_id & 0xff00) {
+       case PRID_IMP_CAVIUM_CN38XX:
+       case PRID_IMP_CAVIUM_CN31XX:
+       case PRID_IMP_CAVIUM_CN30XX:
+       case PRID_IMP_CAVIUM_CN58XX:
+       case PRID_IMP_CAVIUM_CN56XX:
+       case PRID_IMP_CAVIUM_CN50XX:
+       case PRID_IMP_CAVIUM_CN52XX:
+               c->cputype = CPU_CAVIUM_OCTEON;
+               __cpu_name[cpu] = "Cavium Octeon";
+               break;
+       default:
+               printk(KERN_INFO "Unknown Octeon chip!\n");
+               c->cputype = CPU_UNKNOWN;
+               break;
+       }
+}
+
 const char *__cpu_name[NR_CPUS];
 
 __cpuinit void cpu_probe(void)
@@ -909,6 +934,9 @@ __cpuinit void cpu_probe(void)
        case PRID_COMP_NXP:
                cpu_probe_nxp(c, cpu);
                break;
+       case PRID_COMP_CAVIUM:
+               cpu_probe_cavium(c, cpu);
+               break;
        }
 
        BUG_ON(!__cpu_name[cpu]);