*
*/
-#define MSM_QGIC_DIST_BASE IOMEM(0xF0000000)
-#define MSM_QGIC_DIST_PHYS 0x02080000
-#define MSM_QGIC_DIST_SIZE SZ_4K
+#define MSM8X60_QGIC_DIST_PHYS 0x02080000
+#define MSM8X60_QGIC_DIST_SIZE SZ_4K
-#define MSM_QGIC_CPU_BASE IOMEM(0xF0001000)
-#define MSM_QGIC_CPU_PHYS 0x02081000
-#define MSM_QGIC_CPU_SIZE SZ_4K
+#define MSM8X60_QGIC_CPU_PHYS 0x02081000
+#define MSM8X60_QGIC_CPU_SIZE SZ_4K
#define MSM_ACC_BASE IOMEM(0xF0002000)
#define MSM_ACC_PHYS 0x02001000