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Pull sbs into release branch
[pandora-kernel.git]
/
arch
/
mips
/
mm
/
tlbex.c
diff --git
a/arch/mips/mm/tlbex.c
b/arch/mips/mm/tlbex.c
index
492c518
..
4ec0964
100644
(file)
--- a/
arch/mips/mm/tlbex.c
+++ b/
arch/mips/mm/tlbex.c
@@
-35,24
+35,24
@@
#include <asm/smp.h>
#include <asm/war.h>
#include <asm/smp.h>
#include <asm/war.h>
-static __init int __
attribute__((unused))
r45k_bvahwbug(void)
+static __init int __
maybe_unused
r45k_bvahwbug(void)
{
/* XXX: We should probe for the presence of this bug, but we don't. */
return 0;
}
{
/* XXX: We should probe for the presence of this bug, but we don't. */
return 0;
}
-static __init int __
attribute__((unused))
r4k_250MHZhwbug(void)
+static __init int __
maybe_unused
r4k_250MHZhwbug(void)
{
/* XXX: We should probe for the presence of this bug, but we don't. */
return 0;
}
{
/* XXX: We should probe for the presence of this bug, but we don't. */
return 0;
}
-static __init int __
attribute__((unused))
bcm1250_m3_war(void)
+static __init int __
maybe_unused
bcm1250_m3_war(void)
{
return BCM1250_M3_WAR;
}
{
return BCM1250_M3_WAR;
}
-static __init int __
attribute__((unused))
r10000_llsc_war(void)
+static __init int __
maybe_unused
r10000_llsc_war(void)
{
return R10000_LLSC_WAR;
}
{
return R10000_LLSC_WAR;
}
@@
-511,18
+511,18
@@
L_LA(_r3000_write_probe_fail)
#define i_ehb(buf) i_sll(buf, 0, 0, 3)
#ifdef CONFIG_64BIT
#define i_ehb(buf) i_sll(buf, 0, 0, 3)
#ifdef CONFIG_64BIT
-static __init int __
attribute__((unused))
in_compat_space_p(long addr)
+static __init int __
maybe_unused
in_compat_space_p(long addr)
{
/* Is this address in 32bit compat space? */
return (((addr) & 0xffffffff00000000L) == 0xffffffff00000000L);
}
{
/* Is this address in 32bit compat space? */
return (((addr) & 0xffffffff00000000L) == 0xffffffff00000000L);
}
-static __init int __
attribute__((unused))
rel_highest(long val)
+static __init int __
maybe_unused
rel_highest(long val)
{
return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000;
}
{
return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000;
}
-static __init int __
attribute__((unused))
rel_higher(long val)
+static __init int __
maybe_unused
rel_higher(long val)
{
return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000;
}
{
return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000;
}
@@
-556,8
+556,8
@@
static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr)
i_lui(buf, rs, rel_hi(addr));
}
i_lui(buf, rs, rel_hi(addr));
}
-static __init void __
attribute__((unused))
i_LA(u32 **buf, unsigned int rs,
-
long addr)
+static __init void __
maybe_unused
i_LA(u32 **buf, unsigned int rs,
+ long addr)
{
i_LA_mostly(buf, rs, addr);
if (rel_lo(addr))
{
i_LA_mostly(buf, rs, addr);
if (rel_lo(addr))
@@
-636,8
+636,8
@@
static __init void copy_handler(struct reloc *rel, struct label *lab,
move_labels(lab, first, end, off);
}
move_labels(lab, first, end, off);
}
-static __init int __
attribute__((unused))
insn_has_bdelay(struct reloc *rel,
-
u32 *addr)
+static __init int __
maybe_unused
insn_has_bdelay(struct reloc *rel,
+ u32 *addr)
{
for (; rel->lab != label_invalid; rel++) {
if (rel->addr == addr
{
for (; rel->lab != label_invalid; rel++) {
if (rel->addr == addr
@@
-650,15
+650,15
@@
static __init int __attribute__((unused)) insn_has_bdelay(struct reloc *rel,
}
/* convenience functions for labeled branches */
}
/* convenience functions for labeled branches */
-static void __init __
attribute__((unused))
+static void __init __
maybe_unused
il_bltz(u32 **p, struct reloc **r, unsigned int reg, enum label_id l)
{
r_mips_pc16(r, *p, l);
i_bltz(p, reg, 0);
}
il_bltz(u32 **p, struct reloc **r, unsigned int reg, enum label_id l)
{
r_mips_pc16(r, *p, l);
i_bltz(p, reg, 0);
}
-static void __init __
attribute__((unused))
il_b(u32 **p, struct reloc **r,
- enum label_id l)
+static void __init __
maybe_unused
il_b(u32 **p, struct reloc **r,
+
enum label_id l)
{
r_mips_pc16(r, *p, l);
i_b(p, 0);
{
r_mips_pc16(r, *p, l);
i_b(p, 0);
@@
-671,7
+671,7
@@
static void __init il_beqz(u32 **p, struct reloc **r, unsigned int reg,
i_beqz(p, reg, 0);
}
i_beqz(p, reg, 0);
}
-static void __init __
attribute__((unused))
+static void __init __
maybe_unused
il_beqzl(u32 **p, struct reloc **r, unsigned int reg, enum label_id l)
{
r_mips_pc16(r, *p, l);
il_beqzl(u32 **p, struct reloc **r, unsigned int reg, enum label_id l)
{
r_mips_pc16(r, *p, l);
@@
-692,7
+692,7
@@
static void __init il_bgezl(u32 **p, struct reloc **r, unsigned int reg,
i_bgezl(p, reg, 0);
}
i_bgezl(p, reg, 0);
}
-static void __init __
attribute__((unused))
+static void __init __
maybe_unused
il_bgez(u32 **p, struct reloc **r, unsigned int reg, enum label_id l)
{
r_mips_pc16(r, *p, l);
il_bgez(u32 **p, struct reloc **r, unsigned int reg, enum label_id l)
{
r_mips_pc16(r, *p, l);
@@
-810,7
+810,7
@@
static __initdata u32 final_handler[64];
*
* As if we MIPS hackers wouldn't know how to nop pipelines happy ...
*/
*
* As if we MIPS hackers wouldn't know how to nop pipelines happy ...
*/
-static __init void __
attribute__((unused))
build_tlb_probe_entry(u32 **p)
+static __init void __
maybe_unused
build_tlb_probe_entry(u32 **p)
{
switch (current_cpu_data.cputype) {
/* Found by experiment: R4600 v2.0 needs this, too. */
{
switch (current_cpu_data.cputype) {
/* Found by experiment: R4600 v2.0 needs this, too. */
@@
-893,6
+893,7
@@
static __init void build_tlb_write_entry(u32 **p, struct label **l,
case CPU_4KSC:
case CPU_20KC:
case CPU_25KF:
case CPU_4KSC:
case CPU_20KC:
case CPU_25KF:
+ case CPU_LOONGSON2:
tlbw(p);
break;
tlbw(p);
break;
@@
-1098,7
+1099,7
@@
build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r,
* TMP and PTR are scratch.
* TMP will be clobbered, PTR will hold the pgd entry.
*/
* TMP and PTR are scratch.
* TMP will be clobbered, PTR will hold the pgd entry.
*/
-static __init void __
attribute__((unused))
+static __init void __
maybe_unused
build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
{
long pgdc = (long)pgd_current;
build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
{
long pgdc = (long)pgd_current;
@@
-1276,7
+1277,8
@@
static void __init build_r4000_tlb_refill_handler(void)
* need three, with the second nop'ed and the third being
* unused.
*/
* need three, with the second nop'ed and the third being
* unused.
*/
-#ifdef CONFIG_32BIT
+ /* Loongson2 ebase is different than r4k, we have more space */
+#if defined(CONFIG_32BIT) || defined(CONFIG_CPU_LOONGSON2)
if ((p - tlb_handler) > 64)
panic("TLB refill handler space exceeded");
#else
if ((p - tlb_handler) > 64)
panic("TLB refill handler space exceeded");
#else
@@
-1289,7
+1291,7
@@
static void __init build_r4000_tlb_refill_handler(void)
/*
* Now fold the handler in the TLB refill handler space.
*/
/*
* Now fold the handler in the TLB refill handler space.
*/
-#if
def CONFIG_32BIT
+#if
defined(CONFIG_32BIT) || defined(CONFIG_CPU_LOONGSON2)
f = final_handler;
/* Simplest case, just copy the handler. */
copy_handler(relocs, labels, tlb_handler, p, f);
f = final_handler;
/* Simplest case, just copy the handler. */
copy_handler(relocs, labels, tlb_handler, p, f);
@@
-1336,7
+1338,7
@@
static void __init build_r4000_tlb_refill_handler(void)
final_len);
f = final_handler;
final_len);
f = final_handler;
-#if
def CONFIG_64BIT
+#if
defined(CONFIG_64BIT) && !defined(CONFIG_CPU_LOONGSON2)
if (final_len > 32)
final_len = 64;
else
if (final_len > 32)
final_len = 64;
else