2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
31 Miniport generic portion header file
35 -------- ---------- ----------------------------------------------
36 Paul Lin 2002-08-01 created
37 John Chang 2004-08-20 RT2561/2661 use scatter-gather scheme
38 Jan Lee 2006-09-15 RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
40 #include "../rt_config.h"
43 #include <linux/bitrev.h>
46 /* New firmware handles both RT2870 and RT3070. */
47 #include "../../rt3070/firmware.h"
50 UCHAR BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
51 ULONG BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
52 0x00000010, 0x00000020, 0x00000040, 0x00000080,
53 0x00000100, 0x00000200, 0x00000400, 0x00000800,
54 0x00001000, 0x00002000, 0x00004000, 0x00008000,
55 0x00010000, 0x00020000, 0x00040000, 0x00080000,
56 0x00100000, 0x00200000, 0x00400000, 0x00800000,
57 0x01000000, 0x02000000, 0x04000000, 0x08000000,
58 0x10000000, 0x20000000, 0x40000000, 0x80000000};
60 char* CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
63 // BBP register initialization set
65 REG_PAIR BBPRegTable[] = {
66 {BBP_R65, 0x2C}, // fix rssi issue
67 {BBP_R66, 0x38}, // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
69 {BBP_R70, 0xa}, // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
74 {BBP_R84, 0x99}, // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
75 {BBP_R86, 0x00}, // middle range issue, Rory @2008-01-28
76 {BBP_R91, 0x04}, // middle range issue, Rory @2008-01-28
77 {BBP_R92, 0x00}, // middle range issue, Rory @2008-01-28
78 {BBP_R103, 0x00}, // near range high-power issue, requested from Gary @2008-0528
79 {BBP_R105, 0x05}, // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
81 #define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(REG_PAIR))
84 // RF register initialization set
87 REG_PAIR RT30xx_RFRegTable[] = {
108 #define NUM_RF_REG_PARMS (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR))
112 // ASIC register initialization sets
115 RTMP_REG_PAIR MACRegTable[] = {
116 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
117 {BCN_OFFSET0, 0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
118 {BCN_OFFSET1, 0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
119 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
120 {BCN_OFFSET0, 0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
121 {BCN_OFFSET1, 0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
123 #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
124 #endif // HW_BEACON_OFFSET //
126 {LEGACY_BASIC_RATE, 0x0000013f}, // Basic rate set bitmap
127 {HT_BASIC_RATE, 0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
128 {MAC_SYS_CTRL, 0x00}, // 0x1004, , default Disable RX
129 {RX_FILTR_CFG, 0x17f97}, //0x1400 , RX filter control,
130 {BKOFF_SLOT_CFG, 0x209}, // default set short slot time, CC_DELAY_TIME should be 2
131 {TX_SW_CFG0, 0x0}, // Gary,2008-05-21 for CWC test
132 {TX_SW_CFG1, 0x80606}, // Gary,2006-08-23
133 {TX_LINK_CFG, 0x1020}, // Gary,2006-08-23
134 {TX_TIMEOUT_CFG, 0x000a2090}, // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
135 {MAX_LEN_CFG, MAX_AGGREGATION_SIZE | 0x00001000}, // 0x3018, MAX frame length. Max PSDU = 16kbytes.
136 {LED_CFG, 0x7f031e46}, // Gary, 2006-08-23
137 {PBF_MAX_PCNT, 0x1F3FBF9F}, //0x1F3f7f9f}, //Jan, 2006/04/20
138 {TX_RTY_CFG, 0x47d01f0f}, // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
139 {AUTO_RSP_CFG, 0x00000013}, // Initial Auto_Responder, because QA will turn off Auto-Responder
140 {CCK_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
141 {OFDM_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
142 //PS packets use Tx1Q (for HCCA) when dequeue from PS unicast queue (WiFi WPA2 MA9_DT1 for Marvell B STA)
144 {PBF_CFG, 0xf40006}, // Only enable Queue 2
145 {MM40_PROT_CFG, 0x3F44084}, // Initial Auto_Responder, because QA will turn off Auto-Responder
146 {WPDMA_GLO_CFG, 0x00000030},
148 {GF20_PROT_CFG, 0x01744004}, // set 19:18 --> Short NAV for MIMO PS
149 {GF40_PROT_CFG, 0x03F44084},
150 {MM20_PROT_CFG, 0x01744004},
152 {MM40_PROT_CFG, 0x03F54084},
154 {TXOP_CTRL_CFG, 0x0000583f, /*0x0000243f*/ /*0x000024bf*/}, //Extension channel backoff.
155 {TX_RTS_CFG, 0x00092b20},
156 {EXP_ACK_TIME, 0x002400ca}, // default value
157 {TXOP_HLDR_ET, 0x00000002},
159 /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
160 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
161 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
162 will always lost. So we change the SIFS of CCK from 10us to 16us. */
163 {XIFS_TIME_CFG, 0x33a41010},
164 {PWR_PIN_CFG, 0x00000003}, // patch for 2880-E
167 RTMP_REG_PAIR STAMACRegTable[] = {
168 {WMM_AIFSN_CFG, 0x00002273},
169 {WMM_CWMIN_CFG, 0x00002344},
170 {WMM_CWMAX_CFG, 0x000034aa},
173 #define NUM_MAC_REG_PARMS (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
174 #define NUM_STA_MAC_REG_PARMS (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
178 // RT2870 Firmware Spec only used 1 oct for version expression
180 #define FIRMWARE_MINOR_VERSION 7
184 // New 8k byte firmware size for RT3071/RT3072
185 #define FIRMWAREIMAGE_MAX_LENGTH 0x2000
186 #define FIRMWAREIMAGE_LENGTH (sizeof (FirmwareImage) / sizeof(UCHAR))
187 #define FIRMWARE_MAJOR_VERSION 0
189 #define FIRMWAREIMAGEV1_LENGTH 0x1000
190 #define FIRMWAREIMAGEV2_LENGTH 0x1000
193 #define FIRMWARE_MINOR_VERSION 2
198 ========================================================================
201 Allocate RTMP_ADAPTER data block and do some initialization
204 Adapter Pointer to our adapter
214 ========================================================================
216 NDIS_STATUS RTMPAllocAdapterBlock(
218 OUT PRTMP_ADAPTER *ppAdapter)
223 UCHAR *pBeaconBuf = NULL;
225 DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
231 // Allocate RTMP_ADAPTER memory block
232 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
233 if (pBeaconBuf == NULL)
235 Status = NDIS_STATUS_FAILURE;
236 DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
240 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
241 if (Status != NDIS_STATUS_SUCCESS)
243 DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
246 pAd->BeaconBuf = pBeaconBuf;
247 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
251 NdisAllocateSpinLock(&pAd->MgmtRingLock);
253 NdisAllocateSpinLock(&pAd->RxRingLock);
256 for (index =0 ; index < NUM_OF_TX_RING; index++)
258 NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
259 NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
260 pAd->DeQueueRunning[index] = FALSE;
263 NdisAllocateSpinLock(&pAd->irq_lock);
267 if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
272 DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
277 ========================================================================
280 Read initial Tx power per MCS and BW from EEPROM
283 Adapter Pointer to our adapter
292 ========================================================================
294 VOID RTMPReadTxPwrPerRate(
295 IN PRTMP_ADAPTER pAd)
297 ULONG data, Adata, Gdata;
298 USHORT i, value, value2;
299 INT Apwrdelta, Gpwrdelta;
301 BOOLEAN bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
304 // Get power delta for 20MHz and 40MHz.
306 DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
307 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
311 if ((value2 & 0xff) != 0xff)
314 Gpwrdelta = (value2&0xf);
317 bGpwrdeltaMinus = FALSE;
319 bGpwrdeltaMinus = TRUE;
321 if ((value2 & 0xff00) != 0xff00)
323 if ((value2 & 0x8000))
324 Apwrdelta = ((value2&0xf00)>>8);
326 if ((value2 & 0x4000))
327 bApwrdeltaMinus = FALSE;
329 bApwrdeltaMinus = TRUE;
331 DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
334 // Get Txpower per MCS for 20MHz in 2.4G.
338 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
340 if (bApwrdeltaMinus == FALSE)
342 t1 = (value&0xf)+(Apwrdelta);
345 t2 = ((value&0xf0)>>4)+(Apwrdelta);
348 t3 = ((value&0xf00)>>8)+(Apwrdelta);
351 t4 = ((value&0xf000)>>12)+(Apwrdelta);
357 if ((value&0xf) > Apwrdelta)
358 t1 = (value&0xf)-(Apwrdelta);
361 if (((value&0xf0)>>4) > Apwrdelta)
362 t2 = ((value&0xf0)>>4)-(Apwrdelta);
365 if (((value&0xf00)>>8) > Apwrdelta)
366 t3 = ((value&0xf00)>>8)-(Apwrdelta);
369 if (((value&0xf000)>>12) > Apwrdelta)
370 t4 = ((value&0xf000)>>12)-(Apwrdelta);
374 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
375 if (bGpwrdeltaMinus == FALSE)
377 t1 = (value&0xf)+(Gpwrdelta);
380 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
383 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
386 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
392 if ((value&0xf) > Gpwrdelta)
393 t1 = (value&0xf)-(Gpwrdelta);
396 if (((value&0xf0)>>4) > Gpwrdelta)
397 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
400 if (((value&0xf00)>>8) > Gpwrdelta)
401 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
404 if (((value&0xf000)>>12) > Gpwrdelta)
405 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
409 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
411 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
412 if (bApwrdeltaMinus == FALSE)
414 t1 = (value&0xf)+(Apwrdelta);
417 t2 = ((value&0xf0)>>4)+(Apwrdelta);
420 t3 = ((value&0xf00)>>8)+(Apwrdelta);
423 t4 = ((value&0xf000)>>12)+(Apwrdelta);
429 if ((value&0xf) > Apwrdelta)
430 t1 = (value&0xf)-(Apwrdelta);
433 if (((value&0xf0)>>4) > Apwrdelta)
434 t2 = ((value&0xf0)>>4)-(Apwrdelta);
437 if (((value&0xf00)>>8) > Apwrdelta)
438 t3 = ((value&0xf00)>>8)-(Apwrdelta);
441 if (((value&0xf000)>>12) > Apwrdelta)
442 t4 = ((value&0xf000)>>12)-(Apwrdelta);
446 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
447 if (bGpwrdeltaMinus == FALSE)
449 t1 = (value&0xf)+(Gpwrdelta);
452 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
455 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
458 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
464 if ((value&0xf) > Gpwrdelta)
465 t1 = (value&0xf)-(Gpwrdelta);
468 if (((value&0xf0)>>4) > Gpwrdelta)
469 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
472 if (((value&0xf00)>>8) > Gpwrdelta)
473 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
476 if (((value&0xf000)>>12) > Gpwrdelta)
477 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
481 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
484 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
485 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
487 if (data != 0xffffffff)
488 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
489 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx, Adata = %lx, Gdata = %lx \n", data, Adata, Gdata));
493 // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
498 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
499 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
507 // Get Txpower per MCS for 40MHz in 2.4G.
513 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
514 if (bGpwrdeltaMinus == FALSE)
516 t1 = (value&0xf)+(Gpwrdelta);
519 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
522 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
525 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
531 if ((value&0xf) > Gpwrdelta)
532 t1 = (value&0xf)-(Gpwrdelta);
535 if (((value&0xf0)>>4) > Gpwrdelta)
536 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
539 if (((value&0xf00)>>8) > Gpwrdelta)
540 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
543 if (((value&0xf000)>>12) > Gpwrdelta)
544 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
548 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
550 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
551 if (bGpwrdeltaMinus == FALSE)
553 t1 = (value&0xf)+(Gpwrdelta);
556 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
559 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
562 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
568 if ((value&0xf) > Gpwrdelta)
569 t1 = (value&0xf)-(Gpwrdelta);
572 if (((value&0xf0)>>4) > Gpwrdelta)
573 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
576 if (((value&0xf00)>>8) > Gpwrdelta)
577 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
580 if (((value&0xf000)>>12) > Gpwrdelta)
581 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
585 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
588 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
590 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
592 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
597 // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
602 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
603 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
611 // Get Txpower per MCS for 20MHz in 5G.
617 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
618 if (bApwrdeltaMinus == FALSE)
620 t1 = (value&0xf)+(Apwrdelta);
623 t2 = ((value&0xf0)>>4)+(Apwrdelta);
626 t3 = ((value&0xf00)>>8)+(Apwrdelta);
629 t4 = ((value&0xf000)>>12)+(Apwrdelta);
635 if ((value&0xf) > Apwrdelta)
636 t1 = (value&0xf)-(Apwrdelta);
639 if (((value&0xf0)>>4) > Apwrdelta)
640 t2 = ((value&0xf0)>>4)-(Apwrdelta);
643 if (((value&0xf00)>>8) > Apwrdelta)
644 t3 = ((value&0xf00)>>8)-(Apwrdelta);
647 if (((value&0xf000)>>12) > Apwrdelta)
648 t4 = ((value&0xf000)>>12)-(Apwrdelta);
652 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
654 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
655 if (bApwrdeltaMinus == FALSE)
657 t1 = (value&0xf)+(Apwrdelta);
660 t2 = ((value&0xf0)>>4)+(Apwrdelta);
663 t3 = ((value&0xf00)>>8)+(Apwrdelta);
666 t4 = ((value&0xf000)>>12)+(Apwrdelta);
672 if ((value&0xf) > Apwrdelta)
673 t1 = (value&0xf)-(Apwrdelta);
676 if (((value&0xf0)>>4) > Apwrdelta)
677 t2 = ((value&0xf0)>>4)-(Apwrdelta);
680 if (((value&0xf00)>>8) > Apwrdelta)
681 t3 = ((value&0xf00)>>8)-(Apwrdelta);
684 if (((value&0xf000)>>12) > Apwrdelta)
685 t4 = ((value&0xf000)>>12)-(Apwrdelta);
689 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
692 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
694 pAd->Tx20MPwrCfgABand[i] = Adata;
696 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
701 // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
706 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
707 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
715 // Get Txpower per MCS for 40MHz in 5G.
721 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
722 if (bApwrdeltaMinus == FALSE)
724 t1 = (value&0xf)+(Apwrdelta);
727 t2 = ((value&0xf0)>>4)+(Apwrdelta);
730 t3 = ((value&0xf00)>>8)+(Apwrdelta);
733 t4 = ((value&0xf000)>>12)+(Apwrdelta);
739 if ((value&0xf) > Apwrdelta)
740 t1 = (value&0xf)-(Apwrdelta);
743 if (((value&0xf0)>>4) > Apwrdelta)
744 t2 = ((value&0xf0)>>4)-(Apwrdelta);
747 if (((value&0xf00)>>8) > Apwrdelta)
748 t3 = ((value&0xf00)>>8)-(Apwrdelta);
751 if (((value&0xf000)>>12) > Apwrdelta)
752 t4 = ((value&0xf000)>>12)-(Apwrdelta);
756 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
758 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
759 if (bApwrdeltaMinus == FALSE)
761 t1 = (value&0xf)+(Apwrdelta);
764 t2 = ((value&0xf0)>>4)+(Apwrdelta);
767 t3 = ((value&0xf00)>>8)+(Apwrdelta);
770 t4 = ((value&0xf000)>>12)+(Apwrdelta);
776 if ((value&0xf) > Apwrdelta)
777 t1 = (value&0xf)-(Apwrdelta);
780 if (((value&0xf0)>>4) > Apwrdelta)
781 t2 = ((value&0xf0)>>4)-(Apwrdelta);
784 if (((value&0xf00)>>8) > Apwrdelta)
785 t3 = ((value&0xf00)>>8)-(Apwrdelta);
788 if (((value&0xf000)>>12) > Apwrdelta)
789 t4 = ((value&0xf000)>>12)-(Apwrdelta);
793 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
796 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
798 pAd->Tx40MPwrCfgABand[i+1] = Adata;
800 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
807 ========================================================================
810 Read initial channel power parameters from EEPROM
813 Adapter Pointer to our adapter
822 ========================================================================
824 VOID RTMPReadChannelPwr(
825 IN PRTMP_ADAPTER pAd)
828 EEPROM_TX_PWR_STRUC Power;
829 EEPROM_TX_PWR_STRUC Power2;
831 // Read Tx power value for all channels
832 // Value from 1 - 0x7f. Default value is 24.
833 // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
834 // : 5.5G 0xF9 (-7) ~ 0x0F (15)
836 // 0. 11b/g, ch1 - ch 14
837 for (i = 0; i < 7; i++)
839 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
840 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
841 pAd->TxPower[i * 2].Channel = i * 2 + 1;
842 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
844 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
845 pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
847 pAd->TxPower[i * 2].Power = Power.field.Byte0;
849 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
850 pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
852 pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
854 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
855 pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
857 pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
859 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
860 pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
862 pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
865 // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
866 // 1.1 Fill up channel
868 for (i = 0; i < 4; i++)
870 pAd->TxPower[3 * i + choffset + 0].Channel = 36 + i * 8 + 0;
871 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
872 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
874 pAd->TxPower[3 * i + choffset + 1].Channel = 36 + i * 8 + 2;
875 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
876 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
878 pAd->TxPower[3 * i + choffset + 2].Channel = 36 + i * 8 + 4;
879 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
880 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
884 for (i = 0; i < 6; i++)
886 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
887 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
889 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
890 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
892 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
893 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
895 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
896 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
898 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
899 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
902 // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
903 // 2.1 Fill up channel
905 for (i = 0; i < 5; i++)
907 pAd->TxPower[3 * i + choffset + 0].Channel = 100 + i * 8 + 0;
908 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
909 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
911 pAd->TxPower[3 * i + choffset + 1].Channel = 100 + i * 8 + 2;
912 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
913 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
915 pAd->TxPower[3 * i + choffset + 2].Channel = 100 + i * 8 + 4;
916 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
917 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
919 pAd->TxPower[3 * 5 + choffset + 0].Channel = 140;
920 pAd->TxPower[3 * 5 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
921 pAd->TxPower[3 * 5 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
924 for (i = 0; i < 8; i++)
926 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
927 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
929 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
930 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
932 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
933 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
935 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
936 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
938 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
939 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
942 // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
943 // 3.1 Fill up channel
944 choffset = 14 + 12 + 16;
945 for (i = 0; i < 2; i++)
947 pAd->TxPower[3 * i + choffset + 0].Channel = 149 + i * 8 + 0;
948 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
949 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
951 pAd->TxPower[3 * i + choffset + 1].Channel = 149 + i * 8 + 2;
952 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
953 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
955 pAd->TxPower[3 * i + choffset + 2].Channel = 149 + i * 8 + 4;
956 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
957 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
959 pAd->TxPower[3 * 2 + choffset + 0].Channel = 165;
960 pAd->TxPower[3 * 2 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
961 pAd->TxPower[3 * 2 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
964 for (i = 0; i < 4; i++)
966 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
967 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
969 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
970 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
972 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
973 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
975 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
976 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
978 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
979 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
982 // 4. Print and Debug
983 choffset = 14 + 12 + 16 + 7;
987 ========================================================================
990 Read the following from the registry
991 1. All the parameters
995 Adapter Pointer to our adapter
996 WrapperConfigurationContext For use by NdisOpenConfiguration
1001 NDIS_STATUS_RESOURCES
1003 IRQL = PASSIVE_LEVEL
1007 ========================================================================
1009 NDIS_STATUS NICReadRegParameters(
1010 IN PRTMP_ADAPTER pAd,
1011 IN NDIS_HANDLE WrapperConfigurationContext
1014 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1015 DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1022 ========================================================================
1024 Routine Description:
1025 For RF filter calibration purpose
1028 pAd Pointer to our adapter
1033 IRQL = PASSIVE_LEVEL
1035 ========================================================================
1037 VOID RTMPFilterCalibration(
1038 IN PRTMP_ADAPTER pAd)
1040 UCHAR R55x = 0, value, FilterTarget = 0x1E, BBPValue=0;
1041 UINT loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1042 UCHAR RF_R24_Value = 0;
1044 // Give bbp filter initial value
1046 pAd->Mlme.CaliBW20RfR24 = 0x16;
1047 pAd->Mlme.CaliBW40RfR24 = 0x36; //Bit[5] must be 1 for BW 40
1049 pAd->Mlme.CaliBW20RfR24 = 0x1F;
1050 pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40
1054 if (loop == 1) //BandWidth = 40 MHz
1056 // Write 0x27 to RF_R24 to program filter
1057 RF_R24_Value = 0x27;
1058 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1060 FilterTarget = 0x15;
1062 FilterTarget = 0x19;
1064 // when calibrate BW40, BBP mask must set to BW40.
1065 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1068 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1071 RT30xxReadRFRegister(pAd, RF_R31, &value);
1073 RT30xxWriteRFRegister(pAd, RF_R31, value);
1076 else //BandWidth = 20 MHz
1078 // Write 0x07 to RF_R24 to program filter
1079 RF_R24_Value = 0x07;
1080 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1082 FilterTarget = 0x13;
1084 FilterTarget = 0x16;
1087 RT30xxReadRFRegister(pAd, RF_R31, &value);
1089 RT30xxWriteRFRegister(pAd, RF_R31, value);
1093 // Write 0x01 to RF_R22 to enable baseband loopback mode
1094 RT30xxReadRFRegister(pAd, RF_R22, &value);
1096 RT30xxWriteRFRegister(pAd, RF_R22, value);
1098 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1099 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1103 // Write 0x90 to BBP_R25 to transmit test tone
1104 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1106 RTMPusecDelay(1000);
1107 // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1108 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1109 R55x = value & 0xFF;
1111 } while ((ReTry++ < 100) && (R55x == 0));
1113 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1114 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
1118 // Write 0x90 to BBP_R25 to transmit test tone
1119 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1121 //We need to wait for calibration
1122 RTMPusecDelay(1000);
1123 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1125 if ((R55x - value) < FilterTarget)
1129 else if ((R55x - value) == FilterTarget)
1139 // prevent infinite loop cause driver hang.
1140 if (loopcnt++ > 100)
1142 DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1146 // Write RF_R24 to program filter
1147 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1152 RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1155 // Store for future usage
1160 //BandWidth = 20 MHz
1161 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1165 //BandWidth = 40 MHz
1166 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1173 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1180 // Set back to initial state
1182 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1184 RT30xxReadRFRegister(pAd, RF_R22, &value);
1186 RT30xxWriteRFRegister(pAd, RF_R22, value);
1188 // set BBP back to BW20
1189 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1191 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1193 DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1196 VOID NICInitRT30xxRFRegisters(IN PRTMP_ADAPTER pAd)
1199 // Driver must read EEPROM to get RfIcType before initial RF registers
1200 // Initialize RF register to default value
1201 if (IS_RT3070(pAd) || IS_RT3071(pAd))
1203 // Init RF calibration
1204 // Driver should toggle RF R30 bit7 before init RF registers
1208 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1210 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1211 RTMPusecDelay(1000);
1213 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1215 // Initialize RF register to default value
1216 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1218 RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1223 // Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate
1224 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1225 data = ((data & 0xF0FFFFFF) | 0x0D000000);
1226 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1228 else if (IS_RT3071(pAd))
1230 // Driver should set RF R6 bit6 on before init RF registers
1231 RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
1233 RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
1236 RT30xxWriteRFRegister(pAd, RF_R31, 0x14);
1238 // RT3071 version E has fixed this issue
1239 if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
1241 // patch tx EVM issue temporarily
1242 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1243 data = ((data & 0xE0FFFFFF) | 0x0D000000);
1244 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1248 RTMP_IO_READ32(pAd, LDO_CFG0, &data);
1249 data = ((data & 0xE0FFFFFF) | 0x01000000);
1250 RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
1253 // patch LNA_PE_G1 failed issue
1254 RTUSBReadMACRegister(pAd, GPIO_SWITCH, &data);
1256 RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data);
1259 //For RF filter Calibration
1260 RTMPFilterCalibration(pAd);
1262 // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
1263 if ((pAd->MACVersion & 0xffff) < 0x0211)
1264 RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
1266 // set led open drain enable
1267 RTUSBReadMACRegister(pAd, OPT_14, &data);
1269 RTUSBWriteMACRegister(pAd, OPT_14, data);
1273 // add by johnli, RF power sequence setup, load RF normal operation-mode setup
1274 RT30xxLoadRFNormalModeSetup(pAd);
1282 ========================================================================
1284 Routine Description:
1285 Read initial parameters from EEPROM
1288 Adapter Pointer to our adapter
1293 IRQL = PASSIVE_LEVEL
1297 ========================================================================
1299 VOID NICReadEEPROMParameters(
1300 IN PRTMP_ADAPTER pAd,
1304 USHORT i, value, value2;
1306 EEPROM_TX_PWR_STRUC Power;
1307 EEPROM_VERSION_STRUC Version;
1308 EEPROM_ANTENNA_STRUC Antenna;
1309 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1311 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1313 // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1314 RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1315 DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1317 if((data & 0x30) == 0)
1318 pAd->EEPROMAddressNum = 6; // 93C46
1319 else if((data & 0x30) == 0x10)
1320 pAd->EEPROMAddressNum = 8; // 93C66
1322 pAd->EEPROMAddressNum = 8; // 93C86
1323 DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1325 // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1326 // MAC address registers according to E2PROM setting
1327 if (mac_addr == NULL ||
1328 strlen(mac_addr) != 17 ||
1329 mac_addr[2] != ':' || mac_addr[5] != ':' || mac_addr[8] != ':' ||
1330 mac_addr[11] != ':' || mac_addr[14] != ':')
1332 USHORT Addr01,Addr23,Addr45 ;
1334 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1335 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1336 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1338 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1339 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1340 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1341 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1342 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1343 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1345 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1354 for (j=0; j<MAC_ADDR_LEN; j++)
1356 AtoH(macptr, &pAd->PermanentAddress[j], 1);
1360 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1365 //more conveninet to test mbssid, so ap's bssid &0xf1
1366 if (pAd->PermanentAddress[0] == 0xff)
1367 pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1369 //if (pAd->PermanentAddress[5] == 0xff)
1370 // pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1372 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1373 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1374 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1375 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1376 if (pAd->bLocalAdminMAC == FALSE)
1380 COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1381 csr2.field.Byte0 = pAd->CurrentAddress[0];
1382 csr2.field.Byte1 = pAd->CurrentAddress[1];
1383 csr2.field.Byte2 = pAd->CurrentAddress[2];
1384 csr2.field.Byte3 = pAd->CurrentAddress[3];
1385 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1387 csr3.field.Byte4 = pAd->CurrentAddress[4];
1388 csr3.field.Byte5 = pAd->CurrentAddress[5];
1389 csr3.field.U2MeMask = 0xff;
1390 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1391 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1392 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1393 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1394 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1398 // if not return early. cause fail at emulation.
1399 // Init the channel number for TX channel power
1400 RTMPReadChannelPwr(pAd);
1402 // if E2PROM version mismatch with driver's expectation, then skip
1403 // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1404 RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1405 pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1406 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1408 if (Version.field.Version > VALID_EEPROM_VERSION)
1410 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1411 /*pAd->SystemErrorBitmap |= 0x00000001;
1413 // hard-code default value when no proper E2PROM installed
1414 pAd->bAutoTxAgcA = FALSE;
1415 pAd->bAutoTxAgcG = FALSE;
1417 // Default the channel power
1418 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1419 pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1421 // Default the channel power
1422 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1423 pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1425 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1426 pAd->EEPROMDefaultValue[i] = 0xffff;
1430 // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1431 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1432 pAd->EEPROMDefaultValue[0] = value;
1434 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1435 pAd->EEPROMDefaultValue[1] = value;
1437 RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1438 pAd->EEPROMDefaultValue[2] = value;
1440 for(i = 0; i < 8; i++)
1442 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1443 pAd->EEPROMDefaultValue[i+3] = value;
1446 // We have to parse NIC configuration 0 at here.
1447 // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1448 // Therefore, we have to read TxAutoAgc control beforehand.
1449 // Read Tx AGC control bit
1450 Antenna.word = pAd->EEPROMDefaultValue[0];
1451 if (Antenna.word == 0xFFFF)
1456 Antenna.field.RfIcType = RFIC_3020;
1457 Antenna.field.TxPath = 1;
1458 Antenna.field.RxPath = 1;
1463 Antenna.field.RfIcType = RFIC_2820;
1464 Antenna.field.TxPath = 1;
1465 Antenna.field.RxPath = 2;
1466 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1470 // Choose the desired Tx&Rx stream.
1471 if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1472 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1474 if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1476 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1478 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1479 (pAd->CommonCfg.RxStream > 2))
1481 // only 2 Rx streams for RT2860 series
1482 pAd->CommonCfg.RxStream = 2;
1487 // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1493 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1496 if ((NicConfig2.word & 0x00ff) == 0xff)
1498 NicConfig2.word &= 0xff00;
1501 if ((NicConfig2.word >> 8) == 0xff)
1503 NicConfig2.word &= 0x00ff;
1507 if (NicConfig2.field.DynamicTxAgcControl == 1)
1508 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1510 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1512 DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1514 // Save the antenna for future use
1515 pAd->Antenna.word = Antenna.word;
1518 // Reset PhyMode if we don't support 802.11a
1519 // Only RFIC_2850 & RFIC_2750 support 802.11a
1521 if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1523 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1524 (pAd->CommonCfg.PhyMode == PHY_11A))
1525 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1526 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) ||
1527 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) ||
1528 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) ||
1529 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1530 pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1533 // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1536 /* these are tempature reference value (0x00 ~ 0xFE)
1537 ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1538 TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1539 TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1540 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1541 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1542 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1543 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1544 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1545 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1546 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1547 pAd->TssiRefG = Power.field.Byte0; /* reference value [0] */
1548 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1549 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1550 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1551 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1552 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1553 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1554 pAd->TxAgcStepG = Power.field.Byte1;
1555 pAd->TxAgcCompensateG = 0;
1556 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1557 pAd->TssiPlusBoundaryG[0] = pAd->TssiRefG;
1559 // Disable TxAgc if the based value is not right
1560 if (pAd->TssiRefG == 0xff)
1561 pAd->bAutoTxAgcG = FALSE;
1563 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1564 pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1566 pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1567 pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1571 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1572 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1573 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1574 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1575 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1576 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1577 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1578 pAd->TssiRefA = Power.field.Byte0;
1579 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1580 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1581 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1582 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1583 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1584 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1585 pAd->TxAgcStepA = Power.field.Byte1;
1586 pAd->TxAgcCompensateA = 0;
1587 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1588 pAd->TssiPlusBoundaryA[0] = pAd->TssiRefA;
1590 // Disable TxAgc if the based value is not right
1591 if (pAd->TssiRefA == 0xff)
1592 pAd->bAutoTxAgcA = FALSE;
1594 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1595 pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1597 pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1598 pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1600 pAd->BbpRssiToDbmDelta = 0x0;
1602 // Read frequency offset setting for RF
1603 RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1604 if ((value & 0x00FF) != 0x00FF)
1605 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1607 pAd->RfFreqOffset = 0;
1608 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1610 //CountryRegion byte offset (38h)
1611 value = pAd->EEPROMDefaultValue[2] >> 8; // 2.4G band
1612 value2 = pAd->EEPROMDefaultValue[2] & 0x00FF; // 5G band
1614 if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1616 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1617 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1618 TmpPhy = pAd->CommonCfg.PhyMode;
1619 pAd->CommonCfg.PhyMode = 0xff;
1620 RTMPSetPhyMode(pAd, TmpPhy);
1625 // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1626 // The valid value are (-10 ~ 10)
1628 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1629 pAd->BGRssiOffset0 = value & 0x00ff;
1630 pAd->BGRssiOffset1 = (value >> 8);
1631 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1632 pAd->BGRssiOffset2 = value & 0x00ff;
1633 pAd->ALNAGain1 = (value >> 8);
1634 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1635 pAd->BLNAGain = value & 0x00ff;
1636 pAd->ALNAGain0 = (value >> 8);
1638 // Validate 11b/g RSSI_0 offset.
1639 if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1640 pAd->BGRssiOffset0 = 0;
1642 // Validate 11b/g RSSI_1 offset.
1643 if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1644 pAd->BGRssiOffset1 = 0;
1646 // Validate 11b/g RSSI_2 offset.
1647 if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1648 pAd->BGRssiOffset2 = 0;
1650 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1651 pAd->ARssiOffset0 = value & 0x00ff;
1652 pAd->ARssiOffset1 = (value >> 8);
1653 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1654 pAd->ARssiOffset2 = value & 0x00ff;
1655 pAd->ALNAGain2 = (value >> 8);
1657 if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1658 pAd->ALNAGain1 = pAd->ALNAGain0;
1659 if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1660 pAd->ALNAGain2 = pAd->ALNAGain0;
1662 // Validate 11a RSSI_0 offset.
1663 if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1664 pAd->ARssiOffset0 = 0;
1666 // Validate 11a RSSI_1 offset.
1667 if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1668 pAd->ARssiOffset1 = 0;
1670 //Validate 11a RSSI_2 offset.
1671 if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1672 pAd->ARssiOffset2 = 0;
1677 RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1678 pAd->LedCntl.word = (value&0xff00) >> 8;
1679 RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1681 RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1683 RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1686 RTMPReadTxPwrPerRate(pAd);
1688 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1692 ========================================================================
1694 Routine Description:
1695 Set default value from EEPROM
1698 Adapter Pointer to our adapter
1703 IRQL = PASSIVE_LEVEL
1707 ========================================================================
1709 VOID NICInitAsicFromEEPROM(
1710 IN PRTMP_ADAPTER pAd)
1715 EEPROM_ANTENNA_STRUC Antenna;
1716 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1719 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1720 for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1722 UCHAR BbpRegIdx, BbpValue;
1724 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1726 BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1727 BbpValue = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1728 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1733 Antenna.word = pAd->Antenna.word;
1735 Antenna.word = pAd->EEPROMDefaultValue[0];
1736 if (Antenna.word == 0xFFFF)
1738 DBGPRINT(RT_DEBUG_ERROR, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1739 BUG_ON(Antenna.word == 0xFFFF);
1742 pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1743 pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1746 DBGPRINT(RT_DEBUG_WARN, ("pAd->RfIcType = %d, RealRxPath=%d, TxPath = %d\n", pAd->RfIcType, pAd->Mlme.RealRxPath,Antenna.field.TxPath));
1748 // Save the antenna for future use
1749 pAd->Antenna.word = Antenna.word;
1751 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1755 if ((NicConfig2.word & 0x00ff) == 0xff)
1757 NicConfig2.word &= 0xff00;
1760 if ((NicConfig2.word >> 8) == 0xff)
1762 NicConfig2.word &= 0x00ff;
1766 // Save the antenna for future use
1767 pAd->NicConfig2.word = NicConfig2.word;
1770 // set default antenna as main
1771 if (pAd->RfIcType == RFIC_3020)
1772 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1775 // Send LED Setting to MCU.
1777 if (pAd->LedCntl.word == 0xFF)
1779 pAd->LedCntl.word = 0x01;
1791 AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1792 AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1793 AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1794 pAd->LedIndicatorStregth = 0xFF;
1795 RTMPSetSignalLED(pAd, -100); // Force signal strength Led to be turned off, before link up
1798 // Read Hardware controlled Radio state enable bit
1799 if (NicConfig2.field.HardwareRadioControl == 1)
1801 pAd->StaCfg.bHardwareRadio = TRUE;
1803 // Read GPIO pin2 as Hardware controlled radio state
1804 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1805 if ((data & 0x04) == 0)
1807 pAd->StaCfg.bHwRadio = FALSE;
1808 pAd->StaCfg.bRadio = FALSE;
1809 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1813 pAd->StaCfg.bHardwareRadio = FALSE;
1815 if (pAd->StaCfg.bRadio == FALSE)
1817 RTMPSetLED(pAd, LED_RADIO_OFF);
1821 RTMPSetLED(pAd, LED_RADIO_ON);
1823 AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1824 AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1825 // 2-1. wait command ok.
1826 AsicCheckCommanOk(pAd, PowerWakeCID);
1831 // Turn off patching for cardbus controller
1832 if (NicConfig2.field.CardbusAcceleration == 1)
1836 if (NicConfig2.field.DynamicTxAgcControl == 1)
1837 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1839 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1841 /* BBP has been programmed so reset to UNKNOWN_BAND */
1842 pAd->CommonCfg.BandState = UNKNOWN_BAND;
1844 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1846 if(pAd->Antenna.field.RxPath == 3)
1850 else if(pAd->Antenna.field.RxPath == 2)
1854 else if(pAd->Antenna.field.RxPath == 1)
1858 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1861 // Handle the difference when 1T
1862 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1863 if(pAd->Antenna.field.TxPath == 1)
1867 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1869 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1872 DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1873 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1877 ========================================================================
1879 Routine Description:
1880 Initialize NIC hardware
1883 Adapter Pointer to our adapter
1888 IRQL = PASSIVE_LEVEL
1892 ========================================================================
1894 NDIS_STATUS NICInitializeAdapter(
1895 IN PRTMP_ADAPTER pAd,
1896 IN BOOLEAN bHardReset)
1898 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1899 WPDMA_GLO_CFG_STRUC GloCfg;
1902 DELAY_INT_CFG_STRUC IntCfg;
1905 AC_TXOP_CSR0_STRUC csr0;
1907 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1909 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1914 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1915 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
1918 RTMPusecDelay(1000);
1921 DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1922 GloCfg.word &= 0xff0;
1923 GloCfg.field.EnTXWriteBackDDONE =1;
1924 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1926 // Record HW Beacon offset
1927 pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1928 pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1929 pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1930 pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1931 pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1932 pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1933 pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1934 pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1937 // write all shared Ring's base address into ASIC
1940 // asic simulation sequence put this ahead before loading firmware.
1941 // pbf hardware reset
1943 RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f); // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1944 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1945 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1948 // Initialze ASIC for TX & Rx operation
1949 if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1953 NICLoadFirmware(pAd);
1956 return NDIS_STATUS_FAILURE;
1961 // Write AC_BK base address register
1962 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1963 RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1964 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1966 // Write AC_BE base address register
1967 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1968 RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1969 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1971 // Write AC_VI base address register
1972 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1973 RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1974 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1976 // Write AC_VO base address register
1977 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1978 RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1979 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1981 // Write HCCA base address register
1982 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1983 RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1984 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1986 // Write MGMT_BASE_CSR register
1987 Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1988 RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1989 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1991 // Write RX_BASE_CSR register
1992 Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1993 RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1994 DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1996 // Init RX Ring index pointer
1997 pAd->RxRing.RxSwReadIdx = 0;
1998 pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1999 RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
2001 // Init TX rings index pointer
2003 for (i=0; i<NUM_OF_TX_RING; i++)
2005 pAd->TxRing[i].TxSwFreeIdx = 0;
2006 pAd->TxRing[i].TxCpuIdx = 0;
2007 RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) , pAd->TxRing[i].TxCpuIdx);
2011 // init MGMT ring index pointer
2012 pAd->MgmtRing.TxSwFreeIdx = 0;
2013 pAd->MgmtRing.TxCpuIdx = 0;
2014 RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX, pAd->MgmtRing.TxCpuIdx);
2017 // set each Ring's SIZE into ASIC. Descriptor Size is fixed by design.
2020 // Write TX_RING_CSR0 register
2021 Value = TX_RING_SIZE;
2022 RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
2023 RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
2024 RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
2025 RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
2026 RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
2027 Value = MGMT_RING_SIZE;
2028 RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
2030 // Write RX_RING_CSR register
2031 Value = RX_RING_SIZE;
2032 RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
2038 RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
2039 if (pAd->CommonCfg.PhyMode == PHY_11B)
2041 csr0.field.Ac0Txop = 192; // AC_VI: 192*32us ~= 6ms
2042 csr0.field.Ac1Txop = 96; // AC_VO: 96*32us ~= 3ms
2046 csr0.field.Ac0Txop = 96; // AC_VI: 96*32us ~= 3ms
2047 csr0.field.Ac1Txop = 48; // AC_VO: 48*32us ~= 1.5ms
2049 RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
2053 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
2057 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
2058 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
2061 RTMPusecDelay(1000);
2065 GloCfg.word &= 0xff0;
2066 GloCfg.field.EnTXWriteBackDDONE =1;
2067 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
2070 RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
2076 // Status = NICLoadFirmware(pAd);
2078 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
2083 ========================================================================
2085 Routine Description:
2089 Adapter Pointer to our adapter
2094 IRQL = PASSIVE_LEVEL
2098 ========================================================================
2100 NDIS_STATUS NICInitializeAsic(
2101 IN PRTMP_ADAPTER pAd,
2102 IN BOOLEAN bHardReset)
2106 UINT32 MacCsr12 = 0, Counter = 0;
2116 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
2119 if (bHardReset == TRUE)
2121 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2124 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2128 // Make sure MAC gets ready after NICLoadFirmware().
2132 //To avoid hang-on issue when interface up in kernel 2.4,
2133 //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
2136 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
2138 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
2142 } while (Index++ < 100);
2144 pAd->MACVersion = MacCsr0;
2145 DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
2146 // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
2147 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
2148 MacCsr12 &= (~0x2000);
2149 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
2151 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2152 RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
2153 Status = RTUSBVenderReset(pAd);
2156 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2158 // Initialize MAC register to default value
2160 for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
2162 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
2166 for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
2169 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd)))
2171 MACRegTable[Index].Value = 0x00000400;
2174 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
2179 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
2182 RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2185 RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2190 // Initialize RT3070 serial MAc registers which is different from RT2870 serial
2193 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2195 // RT3071 version E has fixed this issue
2196 if ((pAd->MACVersion & 0xffff) < 0x0211)
2198 if (pAd->NicConfig2.field.DACTestBit == 1)
2200 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2204 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
2209 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
2213 else if (IS_RT3070(pAd))
2215 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2216 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2221 // Before program BBP, we need to wait BBP/RF get wake up.
2226 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
2228 if ((MacCsr12 & 0x03) == 0) // if BB.RF is stable
2231 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG = Busy = %x\n", MacCsr12));
2232 RTMPusecDelay(1000);
2233 } while (Index++ < 100);
2235 // The commands to firmware should be after these commands, these commands will init firmware
2236 // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
2237 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
2238 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2239 RTMPusecDelay(1000);
2241 // Read BBP register, make sure BBP is up and running before write new data
2245 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
2246 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
2247 } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
2248 //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
2250 if ((R0 == 0xff) || (R0 == 0x00))
2251 return NDIS_STATUS_FAILURE;
2253 // Initialize BBP register to default value
2254 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
2256 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
2260 // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2261 if ((pAd->MACVersion&0xffff) != 0x0101)
2262 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2264 // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2265 // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
2266 if (((pAd->MACVersion&0xffff) != 0x0101) && (!IS_RT30xx(pAd)))
2267 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2269 // add by johnli, RF power sequence setup
2271 { //update for RT3070/71/72/90/91/92.
2272 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
2273 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
2274 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
2282 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2284 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
2287 // improve power consumption
2288 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
2289 if (pAd->Antenna.field.TxPath == 1)
2291 // turn off tx DAC_1
2292 bbpreg = (bbpreg | 0x20);
2295 if (pAd->Antenna.field.RxPath == 1)
2297 // turn off tx ADC_1
2300 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
2302 // improve power consumption in RT3071 Ver.E
2303 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2305 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
2307 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
2311 if (pAd->MACVersion == 0x28600100)
2313 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2314 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2317 if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
2319 // enlarge MAX_LEN_CFG
2321 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
2324 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
2329 UCHAR MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
2331 //Initialize WCID table
2333 for(Index =0 ;Index < 254;Index++)
2335 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
2340 // Add radio off control
2342 if (pAd->StaCfg.bRadio == FALSE)
2344 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2345 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2346 DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2350 // Clear raw counters
2351 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2352 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2353 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2354 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2355 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2356 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2358 // ASIC will keep garbage value after boot
2359 // Clear all seared key table when initial
2360 // This routine can be ignored in radio-ON/OFF operation.
2363 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2365 RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2368 // Clear all pairwise key table when initial
2369 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2371 RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2376 // It isn't necessary to clear this space when not hard reset.
2377 if (bHardReset == TRUE)
2379 // clear all on-chip BEACON frame space
2380 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2382 for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2383 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2387 AsicDisableSync(pAd);
2388 // Clear raw counters
2389 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2390 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2391 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2392 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2393 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2394 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2395 // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
2396 RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
2397 Counter&=0xffffff00;
2399 RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
2401 pAd->bUseEfuse=FALSE;
2402 RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrl);
2403 pAd->bUseEfuse = ( (eFuseCtrl & 0x80000000) == 0x80000000) ? 1 : 0;
2406 DBGPRINT(RT_DEBUG_TRACE, ("NVM is Efuse\n"));
2410 DBGPRINT(RT_DEBUG_TRACE, ("NVM is EEPROM\n"));
2415 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2416 if ((pAd->MACVersion&0xffff) != 0x0101)
2417 RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2420 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2421 return NDIS_STATUS_SUCCESS;
2426 VOID NICRestoreBBPValue(
2427 IN PRTMP_ADAPTER pAd)
2433 DBGPRINT(RT_DEBUG_TRACE, ("---> NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!! \n"));
2434 // Initialize BBP register to default value (rtmp_init.c)
2435 for (index = 0; index < NUM_BBP_REG_PARMS; index++)
2437 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[index].Register, BBPRegTable[index].Value);
2439 // copy from (rtmp_init.c)
2440 if (pAd->MACVersion == 0x28600100)
2442 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2443 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2446 // copy from (connect.c LinkUp function)
2449 // Change to AP channel
2450 if ((pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2452 // Must using 40MHz.
2453 pAd->CommonCfg.BBPCurrentBW = BW_40;
2454 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2455 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2457 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2460 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2462 // RX : control channel at lower
2463 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2465 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2466 // Record BBPR3 setting, But don't keep R Antenna # information.
2467 pAd->StaCfg.BBPR3 = Value;
2469 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2471 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2473 if (pAd->MACVersion == 0x28600100)
2475 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2476 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2477 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2478 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2481 DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower LINK UP !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
2483 else if ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2485 // Must using 40MHz.
2486 pAd->CommonCfg.BBPCurrentBW = BW_40;
2487 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2488 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2490 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2493 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2495 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2497 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2499 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2501 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2502 // Record BBPR3 setting, But don't keep R Antenna # information.
2503 pAd->StaCfg.BBPR3 = Value;
2505 if (pAd->MACVersion == 0x28600100)
2507 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2508 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2509 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2510 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2513 DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Upper LINK UP !!! Control Channel at UpperCentral = %d \n", pAd->CommonCfg.CentralChannel ));
2517 pAd->CommonCfg.BBPCurrentBW = BW_20;
2518 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
2519 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
2521 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2523 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2525 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2527 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2529 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2531 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2532 // Record BBPR3 setting, But don't keep R Antenna # information.
2533 pAd->StaCfg.BBPR3 = Value;
2535 if (pAd->MACVersion == 0x28600100)
2537 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2538 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
2539 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
2540 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2543 DBGPRINT(RT_DEBUG_TRACE, ("!!!20MHz LINK UP !!! \n" ));
2547 DBGPRINT(RT_DEBUG_TRACE, ("<--- NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!! \n"));
2552 ========================================================================
2554 Routine Description:
2558 Adapter Pointer to our adapter
2563 IRQL = PASSIVE_LEVEL
2566 Reset NIC to initial state AS IS system boot up time.
2568 ========================================================================
2571 IN PRTMP_ADAPTER pAd)
2574 DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2576 // Disable Rx, register value supposed will remain after reset
2577 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2578 Value &= (0xfffffff3);
2579 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2581 // Issue reset and clear from reset state
2582 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2583 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2585 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2589 ========================================================================
2591 Routine Description:
2592 Check ASIC registers and find any reason the system might hang
2595 Adapter Pointer to our adapter
2600 IRQL = DISPATCH_LEVEL
2602 ========================================================================
2604 BOOLEAN NICCheckForHang(
2605 IN PRTMP_ADAPTER pAd)
2610 VOID NICUpdateFifoStaCounters(
2611 IN PRTMP_ADAPTER pAd)
2613 TX_STA_FIFO_STRUC StaFifo;
2614 MAC_TABLE_ENTRY *pEntry;
2616 UCHAR pid = 0, wcid = 0;
2622 RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2624 if (StaFifo.field.bValid == 0)
2627 wcid = (UCHAR)StaFifo.field.wcid;
2630 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2631 if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2637 /* PID store Tx MCS Rate */
2638 pid = (UCHAR)StaFifo.field.PidType;
2640 pEntry = &pAd->MacTab.Content[wcid];
2642 pEntry->DebugFIFOCount++;
2644 if (StaFifo.field.TxBF) // 3*3
2645 pEntry->TxBFCount++;
2647 #ifdef UAPSD_AP_SUPPORT
2648 UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2649 #endif // UAPSD_AP_SUPPORT //
2651 if (!StaFifo.field.TxSuccess)
2653 pEntry->FIFOCount++;
2654 pEntry->OneSecTxFailCount++;
2656 if (pEntry->FIFOCount >= 1)
2658 DBGPRINT(RT_DEBUG_TRACE, ("#"));
2659 pEntry->NoBADataCountDown = 64;
2661 if(pEntry->PsMode == PWR_ACTIVE)
2664 for (tid=0; tid<NUM_OF_TID; tid++)
2666 BAOriSessionTearDown(pAd, pEntry->Aid, tid, FALSE, FALSE);
2669 // Update the continuous transmission counter except PS mode
2670 pEntry->ContinueTxFailCnt++;
2674 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2675 // this tx error happened due to sta just go to sleep.
2676 pEntry->FIFOCount = 0;
2677 pEntry->ContinueTxFailCnt = 0;
2683 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2685 pEntry->NoBADataCountDown--;
2686 if (pEntry->NoBADataCountDown==0)
2688 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2692 pEntry->FIFOCount = 0;
2693 pEntry->OneSecTxNoRetryOkCount++;
2694 // update NoDataIdleCount when sucessful send packet to STA.
2695 pEntry->NoDataIdleCount = 0;
2696 pEntry->ContinueTxFailCnt = 0;
2699 succMCS = StaFifo.field.SuccessRate & 0x7F;
2701 reTry = pid - succMCS;
2703 if (StaFifo.field.TxSuccess)
2705 pEntry->TXMCSExpected[pid]++;
2708 pEntry->TXMCSSuccessful[pid]++;
2712 pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2717 pEntry->TXMCSFailed[pid]++;
2722 if ((pid >= 12) && succMCS <=7)
2726 pEntry->OneSecTxRetryOkCount += reTry;
2730 // ASIC store 16 stack
2731 } while ( i < (2*TX_RING_SIZE) );
2736 ========================================================================
2738 Routine Description:
2739 Read statistical counters from hardware registers and record them
2740 in software variables for later on query
2743 pAd Pointer to our adapter
2748 IRQL = DISPATCH_LEVEL
2750 ========================================================================
2752 VOID NICUpdateRawCounters(
2753 IN PRTMP_ADAPTER pAd)
2756 RX_STA_CNT0_STRUC RxStaCnt0;
2757 RX_STA_CNT1_STRUC RxStaCnt1;
2758 RX_STA_CNT2_STRUC RxStaCnt2;
2759 TX_STA_CNT0_STRUC TxStaCnt0;
2760 TX_STA_CNT1_STRUC StaTx1;
2761 TX_STA_CNT2_STRUC StaTx2;
2762 TX_AGG_CNT_STRUC TxAggCnt;
2763 TX_AGG_CNT0_STRUC TxAggCnt0;
2764 TX_AGG_CNT1_STRUC TxAggCnt1;
2765 TX_AGG_CNT2_STRUC TxAggCnt2;
2766 TX_AGG_CNT3_STRUC TxAggCnt3;
2767 TX_AGG_CNT4_STRUC TxAggCnt4;
2768 TX_AGG_CNT5_STRUC TxAggCnt5;
2769 TX_AGG_CNT6_STRUC TxAggCnt6;
2770 TX_AGG_CNT7_STRUC TxAggCnt7;
2772 RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2773 RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2776 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2777 // Update RX PLCP error counter
2778 pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2779 // Update False CCA counter
2780 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2783 // Update FCS counters
2784 OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2785 pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2786 if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2787 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2789 // Add FCS error count to private counters
2790 pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2791 OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2792 pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2793 if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2794 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2796 // Update Duplicate Rcv check
2797 pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2798 pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2799 // Update RX Overflow counter
2800 pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2803 if (pAd->RalinkCounters.RxCount != pAd->watchDogRxCnt)
2805 pAd->watchDogRxCnt = pAd->RalinkCounters.RxCount;
2806 pAd->watchDogRxOverFlowCnt = 0;
2810 if (RxStaCnt2.field.RxFifoOverflowCount)
2811 pAd->watchDogRxOverFlowCnt++;
2813 pAd->watchDogRxOverFlowCnt = 0;
2818 if (!pAd->bUpdateBcnCntDone)
2820 // Update BEACON sent count
2821 RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2822 RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2823 RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2824 pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2825 pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2826 pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2827 pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2828 pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2829 pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2830 pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2834 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2835 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2836 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2837 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2838 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2839 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2840 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2841 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2842 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2843 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2844 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2845 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2846 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2848 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2849 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2850 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2851 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2853 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2854 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2855 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2856 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2858 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2859 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2860 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2861 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2863 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2864 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2866 // Calculate the transmitted A-MPDU count
2867 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2868 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2870 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2871 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2873 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2874 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2876 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2877 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2879 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2880 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2882 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2883 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2885 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2886 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2888 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2889 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2898 ========================================================================
2900 Routine Description:
2901 Reset NIC from error
2904 Adapter Pointer to our adapter
2909 IRQL = PASSIVE_LEVEL
2912 Reset NIC from error state
2914 ========================================================================
2916 VOID NICResetFromError(
2917 IN PRTMP_ADAPTER pAd)
2919 // Reset BBP (according to alex, reset ASIC will force reset BBP
2920 // Therefore, skip the reset BBP
2921 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2923 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2924 // Remove ASIC from reset state
2925 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2927 NICInitializeAdapter(pAd, FALSE);
2928 NICInitAsicFromEEPROM(pAd);
2930 // Switch to current channel, since during reset process, the connection should remains on.
2931 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2932 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2936 ========================================================================
2938 Routine Description:
2939 erase 8051 firmware image in MAC ASIC
2942 Adapter Pointer to our adapter
2944 IRQL = PASSIVE_LEVEL
2946 ========================================================================
2948 VOID NICEraseFirmware(
2949 IN PRTMP_ADAPTER pAd)
2953 for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2954 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2956 }/* End of NICEraseFirmware */
2959 ========================================================================
2961 Routine Description:
2962 Load 8051 firmware RT2561.BIN file into MAC ASIC
2965 Adapter Pointer to our adapter
2968 NDIS_STATUS_SUCCESS firmware image load ok
2969 NDIS_STATUS_FAILURE image not found
2971 IRQL = PASSIVE_LEVEL
2973 ========================================================================
2975 NDIS_STATUS NICLoadFirmware(
2976 IN PRTMP_ADAPTER pAd)
2978 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
2979 PUCHAR pFirmwareImage;
2980 ULONG FileLength, Index;
2984 UINT32 Version = (pAd->MACVersion >> 16);
2987 pFirmwareImage = FirmwareImage;
2988 FileLength = sizeof(FirmwareImage);
2990 // New 8k byte firmware size for RT3071/RT3072
2991 //printk("Usb Chip\n");
2992 if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
2993 //The firmware image consists of two parts. One is the origianl and the other is the new.
2996 if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
2997 { // Use Firmware V2.
2998 //printk("KH:Use New Version,part2\n");
2999 pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
3000 FileLength = FIRMWAREIMAGEV2_LENGTH;
3004 //printk("KH:Use New Version,part1\n");
3005 pFirmwareImage = FirmwareImage;
3006 FileLength = FIRMWAREIMAGEV1_LENGTH;
3011 DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
3012 Status = NDIS_STATUS_FAILURE;
3017 RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
3019 /* check if MCU is ready */
3023 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
3028 RTMPusecDelay(1000);
3029 } while (Index++ < 1000);
3033 Status = NDIS_STATUS_FAILURE;
3034 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
3037 DBGPRINT(RT_DEBUG_TRACE,
3038 ("<=== %s (status=%d)\n", __func__, Status));
3040 } /* End of NICLoadFirmware */
3044 ========================================================================
3046 Routine Description:
3047 Load Tx rate switching parameters
3050 Adapter Pointer to our adapter
3053 NDIS_STATUS_SUCCESS firmware image load ok
3054 NDIS_STATUS_FAILURE image not found
3056 IRQL = PASSIVE_LEVEL
3059 1. (B0: Valid Item number) (B1:Initial item from zero)
3060 2. Item Number(Dec) Mode(Hex) Current MCS(Dec) TrainUp(Dec) TrainDown(Dec)
3062 ========================================================================
3064 NDIS_STATUS NICLoadRateSwitchingParams(
3065 IN PRTMP_ADAPTER pAd)
3067 return NDIS_STATUS_SUCCESS;
3071 ========================================================================
3073 Routine Description:
3074 if pSrc1 all zero with length Length, return 0.
3075 If not all zero, return 1
3084 IRQL = DISPATCH_LEVEL
3088 ========================================================================
3090 ULONG RTMPNotAllZero(
3097 pMem1 = (PUCHAR) pSrc1;
3099 for (Index = 0; Index < Length; Index++)
3101 if (pMem1[Index] != 0x0)
3107 if (Index == Length)
3118 ========================================================================
3120 Routine Description:
3121 Compare two memory block
3124 pSrc1 Pointer to first memory address
3125 pSrc2 Pointer to second memory address
3129 1: pSrc1 memory is larger
3130 2: pSrc2 memory is larger
3132 IRQL = DISPATCH_LEVEL
3136 ========================================================================
3138 ULONG RTMPCompareMemory(
3147 pMem1 = (PUCHAR) pSrc1;
3148 pMem2 = (PUCHAR) pSrc2;
3150 for (Index = 0; Index < Length; Index++)
3152 if (pMem1[Index] > pMem2[Index])
3154 else if (pMem1[Index] < pMem2[Index])
3163 ========================================================================
3165 Routine Description:
3166 Zero out memory block
3169 pSrc1 Pointer to memory address
3175 IRQL = PASSIVE_LEVEL
3176 IRQL = DISPATCH_LEVEL
3180 ========================================================================
3182 VOID RTMPZeroMemory(
3189 pMem = (PUCHAR) pSrc;
3191 for (Index = 0; Index < Length; Index++)
3197 VOID RTMPFillMemory(
3205 pMem = (PUCHAR) pSrc;
3207 for (Index = 0; Index < Length; Index++)
3214 ========================================================================
3216 Routine Description:
3217 Copy data from memory block 1 to memory block 2
3220 pDest Pointer to destination memory address
3221 pSrc Pointer to source memory address
3227 IRQL = PASSIVE_LEVEL
3228 IRQL = DISPATCH_LEVEL
3232 ========================================================================
3234 VOID RTMPMoveMemory(
3243 ASSERT((Length==0) || (pDest && pSrc));
3245 pMem1 = (PUCHAR) pDest;
3246 pMem2 = (PUCHAR) pSrc;
3248 for (Index = 0; Index < Length; Index++)
3250 pMem1[Index] = pMem2[Index];
3255 ========================================================================
3257 Routine Description:
3258 Initialize port configuration structure
3261 Adapter Pointer to our adapter
3266 IRQL = PASSIVE_LEVEL
3270 ========================================================================
3273 IN PRTMP_ADAPTER pAd)
3275 UINT key_index, bss_index;
3277 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3280 // part I. intialize common configuration
3283 pAd->BulkOutReq = 0;
3285 pAd->BulkOutComplete = 0;
3286 pAd->BulkOutCompleteOther = 0;
3287 pAd->BulkOutCompleteCancel = 0;
3289 pAd->BulkInComplete = 0;
3290 pAd->BulkInCompleteFail = 0;
3292 //pAd->QuickTimerP = 100;
3293 //pAd->TurnAggrBulkInCount = 0;
3294 pAd->bUsbTxBulkAggre = 0;
3296 // init as unsed value to ensure driver will set to MCU once.
3297 pAd->LedIndicatorStregth = 0xFF;
3299 pAd->CommonCfg.MaxPktOneTxBulk = 2;
3300 pAd->CommonCfg.TxBulkFactor = 1;
3301 pAd->CommonCfg.RxBulkFactor =1;
3303 pAd->CommonCfg.TxPower = 100; //mW
3305 NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
3308 for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3310 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3312 pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3313 pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3318 pAd->EepromAccess = FALSE;
3320 pAd->Antenna.word = 0;
3321 pAd->CommonCfg.BBPCurrentBW = BW_20;
3323 pAd->LedCntl.word = 0;
3325 pAd->LedIndicatorStregth = 0;
3326 pAd->RLnkCtrlOffset = 0;
3327 pAd->HostLnkCtrlOffset = 0;
3328 pAd->CheckDmaBusyCount = 0;
3331 pAd->bAutoTxAgcA = FALSE; // Default is OFF
3332 pAd->bAutoTxAgcG = FALSE; // Default is OFF
3333 pAd->RfIcType = RFIC_2820;
3335 // Init timer for reset complete event
3336 pAd->CommonCfg.CentralChannel = 1;
3337 pAd->bForcePrintTX = FALSE;
3338 pAd->bForcePrintRX = FALSE;
3339 pAd->bStaFifoTest = FALSE;
3340 pAd->bProtectionTest = FALSE;
3341 pAd->bHCCATest = FALSE;
3342 pAd->bGenOneHCCA = FALSE;
3343 pAd->CommonCfg.Dsifs = 10; // in units of usec
3344 pAd->CommonCfg.TxPower = 100; //mW
3345 pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3346 pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3347 pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3348 pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3349 pAd->CommonCfg.RtsThreshold = 2347;
3350 pAd->CommonCfg.FragmentThreshold = 2346;
3351 pAd->CommonCfg.UseBGProtection = 0; // 0: AUTO
3352 pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3353 pAd->CommonCfg.PhyMode = 0xff; // unknown
3354 pAd->CommonCfg.BandState = UNKNOWN_BAND;
3355 pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3356 pAd->CommonCfg.RadarDetect.CSCount = 0;
3357 pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3358 pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3359 pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3360 pAd->CommonCfg.bAPSDCapable = FALSE;
3361 pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3362 pAd->CommonCfg.TriggerTimerCount = 0;
3363 pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3364 pAd->CommonCfg.bCountryFlag = FALSE;
3365 pAd->CommonCfg.TxStream = 0;
3366 pAd->CommonCfg.RxStream = 0;
3368 NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3370 NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3371 pAd->HTCEnable = FALSE;
3372 pAd->bBroadComHT = FALSE;
3373 pAd->CommonCfg.bRdg = FALSE;
3375 NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3376 pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3377 pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3378 pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3379 pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3380 pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3381 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3383 pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3384 BATableInit(pAd, &pAd->BATable);
3386 pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3387 pAd->CommonCfg.bHTProtect = 1;
3388 pAd->CommonCfg.bMIMOPSEnable = TRUE;
3389 pAd->CommonCfg.bBADecline = FALSE;
3390 pAd->CommonCfg.bDisableReordering = FALSE;
3392 pAd->CommonCfg.TxBASize = 7;
3394 pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3396 //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3397 //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3398 //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3399 //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3400 pAd->CommonCfg.TxRate = RATE_6;
3402 pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3403 pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3404 pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3406 pAd->CommonCfg.BeaconPeriod = 100; // in mSec
3409 // part II. intialize STA specific configuration
3412 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3413 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3414 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3415 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3417 pAd->StaCfg.Psm = PWR_ACTIVE;
3419 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3420 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3421 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3422 pAd->StaCfg.bMixCipher = FALSE;
3423 pAd->StaCfg.DefaultKeyId = 0;
3425 // 802.1x port control
3426 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3427 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3428 pAd->StaCfg.LastMicErrorTime = 0;
3429 pAd->StaCfg.MicErrCnt = 0;
3430 pAd->StaCfg.bBlockAssoc = FALSE;
3431 pAd->StaCfg.WpaState = SS_NOTUSE;
3433 pAd->CommonCfg.NdisRadioStateOff = FALSE; // New to support microsoft disable radio with OID command
3435 pAd->StaCfg.RssiTrigger = 0;
3436 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3437 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3438 pAd->StaCfg.AtimWin = 0;
3439 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3440 pAd->StaCfg.BssType = BSS_INFRA; // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3441 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3442 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3443 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3445 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3446 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3449 // global variables mXXXX used in MAC protocol state machines
3450 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3451 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3452 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3454 // PHY specification
3455 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED; // default PHY mode
3456 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED); // CCK use LONG preamble
3459 // user desired power mode
3460 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3461 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3462 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3464 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3465 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3468 pAd->StaCfg.ScanCnt = 0;
3470 // CCX 2.0 control flag init
3471 pAd->StaCfg.CCXEnable = FALSE;
3472 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3473 pAd->StaCfg.CCXQosECWMin = 4;
3474 pAd->StaCfg.CCXQosECWMax = 10;
3476 pAd->StaCfg.bHwRadio = TRUE; // Default Hardware Radio status is On
3477 pAd->StaCfg.bSwRadio = TRUE; // Default Software Radio status is On
3478 pAd->StaCfg.bRadio = TRUE; // bHwRadio && bSwRadio
3479 pAd->StaCfg.bHardwareRadio = FALSE; // Default is OFF
3480 pAd->StaCfg.bShowHiddenSSID = FALSE; // Default no show
3482 // Nitro mode control
3483 pAd->StaCfg.bAutoReconnect = TRUE;
3485 // Save the init time as last scan time, the system should do scan after 2 seconds.
3486 // This patch is for driver wake up from standby mode, system will do scan right away.
3487 pAd->StaCfg.LastScanTime = 0;
3488 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3489 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3490 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3491 pAd->StaCfg.IEEE8021X = FALSE;
3492 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3493 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3494 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3497 // Default for extra information is not valid
3498 pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3500 // Default Config change flag
3501 pAd->bConfigChanged = FALSE;
3504 // part III. AP configurations
3511 // dynamic BBP R66:sensibity tuning to overcome background noise
3512 pAd->BbpTuning.bEnable = TRUE;
3513 pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3514 pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3515 pAd->BbpTuning.R66Delta = 4;
3516 pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3519 // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3520 // if not initial this value, the default value will be 0.
3522 pAd->BbpTuning.R66CurrentValue = 0x38;
3524 pAd->Bbp94 = BBPR94_DEFAULT;
3525 pAd->BbpForCCK = FALSE;
3527 // initialize MAC table and allocate spin lock
3528 NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3529 InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3530 NdisAllocateSpinLock(&pAd->MacTabLock);
3532 pAd->CommonCfg.bWiFiTest = FALSE;
3534 pAd->bPCIclkOff = FALSE;
3536 RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
3538 DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3541 // IRQL = PASSIVE_LEVEL
3544 if (ch >= '0' && ch <= '9') return (ch - '0'); // Handle numerals
3545 if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA); // Handle capitol hex digits
3546 if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA); // Handle small hex digits
3551 // FUNCTION: AtoH(char *, UCHAR *, int)
3553 // PURPOSE: Converts ascii string to network order hex
3556 // src - pointer to input ascii string
3557 // dest - pointer to output hex
3558 // destlen - size of dest
3562 // 2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3563 // into upper nibble and 2nd ascii byte of pair into lower nibble.
3565 // IRQL = PASSIVE_LEVEL
3567 void AtoH(char * src, UCHAR * dest, int destlen)
3573 destTemp = (PUCHAR) dest;
3577 *destTemp = BtoH(*srcptr++) << 4; // Put 1st ascii byte in upper nibble.
3578 *destTemp += BtoH(*srcptr++); // Add 2nd ascii byte to above.
3583 VOID RTMPPatchMacBbpBug(
3584 IN PRTMP_ADAPTER pAd)
3588 // Initialize BBP register to default value
3589 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3591 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3594 // Initialize RF register to default value
3595 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3596 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3598 // Re-init BBP register from EEPROM value
3599 NICInitAsicFromEEPROM(pAd);
3603 ========================================================================
3605 Routine Description:
3609 pAd Pointer to our adapter
3610 pTimer Timer structure
3611 pTimerFunc Function to execute when timer expired
3612 Repeat Ture for period timer
3619 ========================================================================
3622 IN PRTMP_ADAPTER pAd,
3623 IN PRALINK_TIMER_STRUCT pTimer,
3624 IN PVOID pTimerFunc,
3629 // Set Valid to TRUE for later used.
3630 // It will crash if we cancel a timer or set a timer
3631 // that we haven't initialize before.
3633 pTimer->Valid = TRUE;
3635 pTimer->PeriodicType = Repeat;
3636 pTimer->State = FALSE;
3637 pTimer->cookie = (ULONG) pData;
3643 RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj, pTimerFunc, (PVOID) pTimer);
3647 ========================================================================
3649 Routine Description:
3653 pTimer Timer structure
3654 Value Timer value in milliseconds
3660 To use this routine, must call RTMPInitTimer before.
3662 ========================================================================
3665 IN PRALINK_TIMER_STRUCT pTimer,
3670 pTimer->TimerValue = Value;
3671 pTimer->State = FALSE;
3672 if (pTimer->PeriodicType == TRUE)
3674 pTimer->Repeat = TRUE;
3675 RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3679 pTimer->Repeat = FALSE;
3680 RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3685 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3691 ========================================================================
3693 Routine Description:
3697 pTimer Timer structure
3698 Value Timer value in milliseconds
3704 To use this routine, must call RTMPInitTimer before.
3706 ========================================================================
3709 IN PRALINK_TIMER_STRUCT pTimer,
3716 pTimer->TimerValue = Value;
3717 pTimer->State = FALSE;
3718 if (pTimer->PeriodicType == TRUE)
3720 RTMPCancelTimer(pTimer, &Cancel);
3721 RTMPSetTimer(pTimer, Value);
3725 RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3730 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3735 ========================================================================
3737 Routine Description:
3738 Cancel timer objects
3741 Adapter Pointer to our adapter
3746 IRQL = PASSIVE_LEVEL
3747 IRQL = DISPATCH_LEVEL
3750 1.) To use this routine, must call RTMPInitTimer before.
3751 2.) Reset NIC to initial state AS IS system boot up time.
3753 ========================================================================
3755 VOID RTMPCancelTimer(
3756 IN PRALINK_TIMER_STRUCT pTimer,
3757 OUT BOOLEAN *pCancelled)
3761 if (pTimer->State == FALSE)
3762 pTimer->Repeat = FALSE;
3763 RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3765 if (*pCancelled == TRUE)
3766 pTimer->State = TRUE;
3769 // We need to go-through the TimerQ to findout this timer handler and remove it if
3770 // it's still waiting for execution.
3772 RT2870_TimerQ_Remove(pTimer->pAd, pTimer);
3778 // NdisMCancelTimer just canced the timer and not mean release the timer.
3779 // And don't set the "Valid" to False. So that we can use this timer again.
3781 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3786 ========================================================================
3788 Routine Description:
3792 pAd Pointer to our adapter
3798 IRQL = PASSIVE_LEVEL
3799 IRQL = DISPATCH_LEVEL
3803 ========================================================================
3806 IN PRTMP_ADAPTER pAd,
3813 LowByte = pAd->LedCntl.field.LedMode&0x7f;
3818 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3819 pAd->LedIndicatorStregth = 0;
3822 if (pAd->CommonCfg.Channel > 14)
3826 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3830 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3833 LowByte = 0; // Driver sets MAC register and MAC controls LED
3836 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3840 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3842 case LED_ON_SITE_SURVEY:
3844 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3848 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3851 DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3856 // Keep LED status for LED SiteSurvey mode.
3857 // After SiteSurvey, we will set the LED mode to previous status.
3859 if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3860 pAd->LedStatus = Status;
3862 DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3866 ========================================================================
3868 Routine Description:
3869 Set LED Signal Stregth
3872 pAd Pointer to our adapter
3878 IRQL = PASSIVE_LEVEL
3881 Can be run on any IRQL level.
3883 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3890 ========================================================================
3892 VOID RTMPSetSignalLED(
3893 IN PRTMP_ADAPTER pAd,
3894 IN NDIS_802_11_RSSI Dbm)
3899 // if not Signal Stregth, then do nothing.
3901 if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3908 else if (Dbm <= -81)
3910 else if (Dbm <= -71)
3912 else if (Dbm <= -67)
3914 else if (Dbm <= -57)
3920 // Update Signal Stregth to firmware if changed.
3922 if (pAd->LedIndicatorStregth != nLed)
3924 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3925 pAd->LedIndicatorStregth = nLed;
3930 ========================================================================
3932 Routine Description:
3936 pAd Pointer to our adapter
3941 IRQL <= DISPATCH_LEVEL
3944 Before Enable RX, make sure you have enabled Interrupt.
3945 ========================================================================
3947 VOID RTMPEnableRxTx(
3948 IN PRTMP_ADAPTER pAd)
3950 DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3953 RT28XXDMAEnable(pAd);
3955 // enable RX of MAC block
3956 if (pAd->OpMode == OPMODE_AP)
3958 UINT32 rx_filter_flag = APNORMAL;
3961 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag); // enable RX of DMA block
3965 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL); // Staion not drop control frame will fail WiFi Certification.
3968 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3969 DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));