1 #include <linux/interrupt.h>
3 #include <linux/gpio.h>
4 #include <linux/workqueue.h>
5 #include <linux/mutex.h>
6 #include <linux/device.h>
7 #include <linux/kernel.h>
8 #include <linux/spi/spi.h>
9 #include <linux/sysfs.h>
10 #include <linux/list.h>
11 #include <linux/slab.h>
15 #include "../ring_sw.h"
17 #include "../trigger.h"
18 #include "lis3l02dq.h"
21 * combine_8_to_16() utility function to munge to u8s into u16
23 static inline u16 combine_8_to_16(u8 lower, u8 upper)
27 return _lower | (_upper << 8);
31 * lis3l02dq_scan_el_set_state() set whether a scan contains a given channel
32 * @scan_el: associtate iio scan element attribute
33 * @indio_dev: the device structure
34 * @bool: desired state
36 * mlock already held when this is called.
38 static int lis3l02dq_scan_el_set_state(struct iio_scan_el *scan_el,
39 struct iio_dev *indio_dev,
45 ret = lis3l02dq_spi_read_reg_8(&indio_dev->dev,
46 LIS3L02DQ_REG_CTRL_1_ADDR,
50 switch (scan_el->label) {
51 case LIS3L02DQ_REG_OUT_X_L_ADDR:
52 mask = LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE;
54 case LIS3L02DQ_REG_OUT_Y_L_ADDR:
55 mask = LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE;
57 case LIS3L02DQ_REG_OUT_Z_L_ADDR:
58 mask = LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
65 if (!(mask & t) == state) {
70 ret = lis3l02dq_spi_write_reg_8(&indio_dev->dev,
71 LIS3L02DQ_REG_CTRL_1_ADDR,
78 static IIO_SCAN_EL_C(accel_x, 0, IIO_SIGNED(16),
79 LIS3L02DQ_REG_OUT_X_L_ADDR,
80 &lis3l02dq_scan_el_set_state);
81 static IIO_SCAN_EL_C(accel_y, 1, IIO_SIGNED(16),
82 LIS3L02DQ_REG_OUT_Y_L_ADDR,
83 &lis3l02dq_scan_el_set_state);
84 static IIO_SCAN_EL_C(accel_z, 2, IIO_SIGNED(16),
85 LIS3L02DQ_REG_OUT_Z_L_ADDR,
86 &lis3l02dq_scan_el_set_state);
87 static IIO_SCAN_EL_TIMESTAMP(3);
89 static struct attribute *lis3l02dq_scan_el_attrs[] = {
90 &iio_scan_el_accel_x.dev_attr.attr,
91 &iio_scan_el_accel_y.dev_attr.attr,
92 &iio_scan_el_accel_z.dev_attr.attr,
93 &iio_scan_el_timestamp.dev_attr.attr,
97 static struct attribute_group lis3l02dq_scan_el_group = {
98 .attrs = lis3l02dq_scan_el_attrs,
99 .name = "scan_elements",
103 * lis3l02dq_poll_func_th() top half interrupt handler called by trigger
104 * @private_data: iio_dev
106 static void lis3l02dq_poll_func_th(struct iio_dev *indio_dev, s64 time)
108 struct iio_sw_ring_helper_state *h
109 = iio_dev_get_devdata(indio_dev);
110 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
111 /* in this case we need to slightly extend the helper function */
112 iio_sw_poll_func_th(indio_dev, time);
114 /* Indicate that this interrupt is being handled */
115 /* Technically this is trigger related, but without this
116 * handler running there is currently now way for the interrupt
123 * lis3l02dq_data_rdy_trig_poll() the event handler for the data rdy trig
125 static int lis3l02dq_data_rdy_trig_poll(struct iio_dev *indio_dev,
130 struct iio_sw_ring_helper_state *h
131 = iio_dev_get_devdata(indio_dev);
132 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
134 iio_trigger_poll(st->trig, timestamp);
139 /* This is an event as it is a response to a physical interrupt */
140 IIO_EVENT_SH(data_rdy_trig, &lis3l02dq_data_rdy_trig_poll);
143 * lis3l02dq_read_accel_from_ring() individual acceleration read from ring
145 ssize_t lis3l02dq_read_accel_from_ring(struct device *dev,
146 struct device_attribute *attr,
149 struct iio_scan_el *el = NULL;
150 int ret, len = 0, i = 0;
151 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
152 struct iio_dev *dev_info = dev_get_drvdata(dev);
155 while (dev_info->scan_el_attrs->attrs[i]) {
156 el = to_iio_scan_el((struct device_attribute *)
157 (dev_info->scan_el_attrs->attrs[i]));
158 /* label is in fact the address */
159 if (el->label == this_attr->address)
163 if (!dev_info->scan_el_attrs->attrs[i]) {
167 /* If this element is in the scan mask */
168 ret = iio_scan_mask_query(dev_info, el->number);
172 data = kmalloc(dev_info->ring->access.get_bpd(dev_info->ring),
176 ret = dev_info->ring->access.read_last(dev_info->ring,
179 goto error_free_data;
184 len = iio_scan_mask_count_to_right(dev_info, el->number);
187 goto error_free_data;
189 len = sprintf(buf, "ring %d\n", data[len]);
193 return ret ? ret : len;
197 static const u8 read_all_tx_array[] = {
198 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_L_ADDR), 0,
199 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_H_ADDR), 0,
200 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Y_L_ADDR), 0,
201 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Y_H_ADDR), 0,
202 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Z_L_ADDR), 0,
203 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Z_H_ADDR), 0,
207 * lis3l02dq_read_all() Reads all channels currently selected
208 * @st: device specific state
209 * @rx_array: (dma capable) recieve array, must be at least
210 * 4*number of channels
212 static int lis3l02dq_read_all(struct lis3l02dq_state *st, u8 *rx_array)
214 struct spi_transfer *xfers;
215 struct spi_message msg;
218 xfers = kzalloc((st->help.indio_dev->scan_count) * 2
219 * sizeof(*xfers), GFP_KERNEL);
223 mutex_lock(&st->buf_lock);
225 for (i = 0; i < ARRAY_SIZE(read_all_tx_array)/4; i++) {
226 if (st->help.indio_dev->scan_mask & (1 << i)) {
228 xfers[j].tx_buf = st->tx + 2*j;
229 st->tx[2*j] = read_all_tx_array[i*4];
232 xfers[j].rx_buf = rx_array + j*2;
233 xfers[j].bits_per_word = 8;
235 xfers[j].cs_change = 1;
239 xfers[j].tx_buf = st->tx + 2*j;
240 st->tx[2*j] = read_all_tx_array[i*4 + 2];
243 xfers[j].rx_buf = rx_array + j*2;
244 xfers[j].bits_per_word = 8;
246 xfers[j].cs_change = 1;
250 /* After these are transmitted, the rx_buff should have
251 * values in alternate bytes
253 spi_message_init(&msg);
254 for (j = 0; j < st->help.indio_dev->scan_count * 2; j++)
255 spi_message_add_tail(&xfers[j], &msg);
257 ret = spi_sync(st->us, &msg);
258 mutex_unlock(&st->buf_lock);
264 static void lis3l02dq_trigger_bh_to_ring(struct work_struct *work_s)
266 struct iio_sw_ring_helper_state *h
267 = container_of(work_s, struct iio_sw_ring_helper_state,
268 work_trigger_to_ring);
269 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
272 iio_sw_trigger_bh_to_ring(work_s);
275 static int lis3l02dq_get_ring_element(struct iio_sw_ring_helper_state *h,
280 s16 *data = (s16 *)buf;
282 rx_array = kzalloc(4 * (h->indio_dev->scan_count), GFP_KERNEL);
283 if (rx_array == NULL)
285 ret = lis3l02dq_read_all(lis3l02dq_h_to_s(h), rx_array);
288 for (i = 0; i < h->indio_dev->scan_count; i++)
289 data[i] = combine_8_to_16(rx_array[i*4+1],
293 return i*sizeof(data[0]);
296 /* Caller responsible for locking as necessary. */
298 __lis3l02dq_write_data_ready_config(struct device *dev,
299 struct iio_event_handler_list *list,
305 struct iio_dev *indio_dev = dev_get_drvdata(dev);
307 /* Get the current event mask register */
308 ret = lis3l02dq_spi_read_reg_8(dev,
309 LIS3L02DQ_REG_CTRL_2_ADDR,
313 /* Find out if data ready is already on */
315 = valold & LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
317 /* Disable requested */
318 if (!state && currentlyset) {
320 valold &= ~LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
321 /* The double write is to overcome a hardware bug?*/
322 ret = lis3l02dq_spi_write_reg_8(dev,
323 LIS3L02DQ_REG_CTRL_2_ADDR,
327 ret = lis3l02dq_spi_write_reg_8(dev,
328 LIS3L02DQ_REG_CTRL_2_ADDR,
333 iio_remove_event_from_list(list,
334 &indio_dev->interrupts[0]
337 /* Enable requested */
338 } else if (state && !currentlyset) {
339 /* if not set, enable requested */
340 valold |= LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
341 iio_add_event_to_list(list, &indio_dev->interrupts[0]->ev_list);
342 ret = lis3l02dq_spi_write_reg_8(dev,
343 LIS3L02DQ_REG_CTRL_2_ADDR,
355 * lis3l02dq_data_rdy_trigger_set_state() set datardy interrupt state
357 * If disabling the interrupt also does a final read to ensure it is clear.
358 * This is only important in some cases where the scan enable elements are
359 * switched before the ring is reenabled.
361 static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig,
364 struct lis3l02dq_state *st = trig->private_data;
367 __lis3l02dq_write_data_ready_config(&st->help.indio_dev->dev,
368 &iio_event_data_rdy_trig,
370 if (state == false) {
371 /* possible quirk with handler currently worked around
372 by ensuring the work queue is empty */
373 flush_scheduled_work();
374 /* Clear any outstanding ready events */
375 ret = lis3l02dq_read_all(st, NULL);
377 lis3l02dq_spi_read_reg_8(&st->help.indio_dev->dev,
378 LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
382 static DEVICE_ATTR(name, S_IRUGO, iio_trigger_read_name, NULL);
384 static struct attribute *lis3l02dq_trigger_attrs[] = {
389 static const struct attribute_group lis3l02dq_trigger_attr_group = {
390 .attrs = lis3l02dq_trigger_attrs,
394 * lis3l02dq_trig_try_reen() try renabling irq for data rdy trigger
395 * @trig: the datardy trigger
397 * As the trigger may occur on any data element being updated it is
398 * really rather likely to occur during the read from the previous
399 * trigger event. The only way to discover if this has occured on
400 * boards not supporting level interrupts is to take a look at the line.
401 * If it is indicating another interrupt and we don't seem to have a
402 * handler looking at it, then we need to notify the core that we need
403 * to tell the triggering core to try reading all these again.
405 static int lis3l02dq_trig_try_reen(struct iio_trigger *trig)
407 struct lis3l02dq_state *st = trig->private_data;
408 enable_irq(st->us->irq);
409 /* If gpio still high (or high again) */
410 if (gpio_get_value(irq_to_gpio(st->us->irq)))
411 if (st->inter == 0) {
412 /* already interrupt handler dealing with it */
413 disable_irq_nosync(st->us->irq);
414 if (st->inter == 1) {
415 /* interrupt handler snuck in between test
417 enable_irq(st->us->irq);
422 /* irq reenabled so success! */
426 int lis3l02dq_probe_trigger(struct iio_dev *indio_dev)
429 struct lis3l02dq_state *state = indio_dev->dev_data;
431 state->trig = iio_allocate_trigger();
435 state->trig->name = kasprintf(GFP_KERNEL,
438 if (!state->trig->name) {
440 goto error_free_trig;
443 state->trig->dev.parent = &state->us->dev;
444 state->trig->owner = THIS_MODULE;
445 state->trig->private_data = state;
446 state->trig->set_trigger_state = &lis3l02dq_data_rdy_trigger_set_state;
447 state->trig->try_reenable = &lis3l02dq_trig_try_reen;
448 state->trig->control_attrs = &lis3l02dq_trigger_attr_group;
449 ret = iio_trigger_register(state->trig);
451 goto error_free_trig_name;
455 error_free_trig_name:
456 kfree(state->trig->name);
458 iio_free_trigger(state->trig);
463 void lis3l02dq_remove_trigger(struct iio_dev *indio_dev)
465 struct lis3l02dq_state *state = indio_dev->dev_data;
467 iio_trigger_unregister(state->trig);
468 kfree(state->trig->name);
469 iio_free_trigger(state->trig);
472 void lis3l02dq_unconfigure_ring(struct iio_dev *indio_dev)
474 kfree(indio_dev->pollfunc);
475 iio_sw_rb_free(indio_dev->ring);
478 int lis3l02dq_configure_ring(struct iio_dev *indio_dev)
481 struct iio_sw_ring_helper_state *h = iio_dev_get_devdata(indio_dev);
483 INIT_WORK(&h->work_trigger_to_ring, lis3l02dq_trigger_bh_to_ring);
484 /* Set default scan mode */
485 h->get_ring_element = &lis3l02dq_get_ring_element;
486 iio_scan_mask_set(indio_dev, iio_scan_el_accel_x.number);
487 iio_scan_mask_set(indio_dev, iio_scan_el_accel_y.number);
488 iio_scan_mask_set(indio_dev, iio_scan_el_accel_z.number);
489 indio_dev->scan_timestamp = true;
491 indio_dev->scan_el_attrs = &lis3l02dq_scan_el_group;
493 indio_dev->ring = iio_sw_rb_allocate(indio_dev);
494 if (!indio_dev->ring)
497 /* Effectively select the ring buffer implementation */
498 iio_ring_sw_register_funcs(&indio_dev->ring->access);
499 indio_dev->ring->bpe = 2;
500 indio_dev->ring->preenable = &iio_sw_ring_preenable;
501 indio_dev->ring->postenable = &iio_triggered_ring_postenable;
502 indio_dev->ring->predisable = &iio_triggered_ring_predisable;
503 indio_dev->ring->owner = THIS_MODULE;
505 ret = iio_alloc_pollfunc(indio_dev, NULL, &lis3l02dq_poll_func_th);
507 goto error_iio_sw_rb_free;;
508 indio_dev->modes |= INDIO_RING_TRIGGERED;
511 error_iio_sw_rb_free:
512 iio_sw_rb_free(indio_dev->ring);