2 * IRQ chip definitions for INTC IRQs.
4 * Copyright (C) 2007, 2008 Magnus Damm
5 * Copyright (C) 2009, 2010 Paul Mundt
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
11 #include <linux/cpumask.h>
13 #include "internals.h"
15 void _intc_enable(unsigned int irq, unsigned long handle)
17 struct intc_desc_int *d = get_intc_desc(irq);
21 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) {
23 if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity))
26 addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu);
27 intc_enable_fns[_INTC_MODE(handle)](addr, handle, intc_reg_fns\
28 [_INTC_FN(handle)], irq);
31 intc_balancing_enable(irq);
34 static void intc_enable(unsigned int irq)
36 _intc_enable(irq, (unsigned long)get_irq_chip_data(irq));
39 static void intc_disable(unsigned int irq)
41 struct intc_desc_int *d = get_intc_desc(irq);
42 unsigned long handle = (unsigned long)get_irq_chip_data(irq);
46 intc_balancing_disable(irq);
48 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) {
50 if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity))
53 addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu);
54 intc_disable_fns[_INTC_MODE(handle)](addr, handle,intc_reg_fns\
55 [_INTC_FN(handle)], irq);
59 static int intc_set_wake(unsigned int irq, unsigned int on)
61 return 0; /* allow wakeup, but setup hardware in intc_suspend() */
66 * This is held with the irq desc lock held, so we don't require any
67 * additional locking here at the intc desc level. The affinity mask is
68 * later tested in the enable/disable paths.
70 static int intc_set_affinity(unsigned int irq, const struct cpumask *cpumask)
72 if (!cpumask_intersects(cpumask, cpu_online_mask))
75 cpumask_copy(irq_to_desc(irq)->affinity, cpumask);
81 static void intc_mask_ack(unsigned int irq)
83 struct intc_desc_int *d = get_intc_desc(irq);
84 unsigned long handle = intc_get_ack_handle(irq);
89 /* read register and write zero only to the associated bit */
93 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
94 value = intc_set_field_from_handle(0, 1, handle);
96 switch (_INTC_FN(handle)) {
97 case REG_FN_MODIFY_BASE + 0: /* 8bit */
99 __raw_writeb(0xff ^ value, addr);
101 case REG_FN_MODIFY_BASE + 1: /* 16bit */
103 __raw_writew(0xffff ^ value, addr);
105 case REG_FN_MODIFY_BASE + 3: /* 32bit */
107 __raw_writel(0xffffffff ^ value, addr);
116 static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
123 * this doesn't scale well, but...
125 * this function should only be used for cerain uncommon
126 * operations such as intc_set_priority() and intc_set_type()
127 * and in those rare cases performance doesn't matter that much.
128 * keeping the memory footprint low is more important.
130 * one rather simple way to speed this up and still keep the
131 * memory footprint down is to make sure the array is sorted
132 * and then perform a bisect to lookup the irq.
134 for (i = 0; i < nr_hp; i++) {
135 if ((hp + i)->irq != irq)
144 int intc_set_priority(unsigned int irq, unsigned int prio)
146 struct intc_desc_int *d = get_intc_desc(irq);
147 struct intc_handle_int *ihp;
149 if (!intc_get_prio_level(irq) || prio <= 1)
152 ihp = intc_find_irq(d->prio, d->nr_prio, irq);
154 if (prio >= (1 << _INTC_WIDTH(ihp->handle)))
157 intc_set_prio_level(irq, prio);
160 * only set secondary masking method directly
161 * primary masking method is using intc_prio_level[irq]
162 * priority level will be set during next enable()
164 if (_INTC_FN(ihp->handle) != REG_FN_ERR)
165 _intc_enable(irq, ihp->handle);
170 #define VALID(x) (x | 0x80)
172 static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {
173 [IRQ_TYPE_EDGE_FALLING] = VALID(0),
174 [IRQ_TYPE_EDGE_RISING] = VALID(1),
175 [IRQ_TYPE_LEVEL_LOW] = VALID(2),
176 /* SH7706, SH7707 and SH7709 do not support high level triggered */
177 #if !defined(CONFIG_CPU_SUBTYPE_SH7706) && \
178 !defined(CONFIG_CPU_SUBTYPE_SH7707) && \
179 !defined(CONFIG_CPU_SUBTYPE_SH7709)
180 [IRQ_TYPE_LEVEL_HIGH] = VALID(3),
184 static int intc_set_type(unsigned int irq, unsigned int type)
186 struct intc_desc_int *d = get_intc_desc(irq);
187 unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK];
188 struct intc_handle_int *ihp;
194 ihp = intc_find_irq(d->sense, d->nr_sense, irq);
196 addr = INTC_REG(d, _INTC_ADDR_E(ihp->handle), 0);
197 intc_reg_fns[_INTC_FN(ihp->handle)](addr, ihp->handle, value);
203 struct irq_chip intc_irq_chip = {
204 .mask = intc_disable,
205 .unmask = intc_enable,
206 .mask_ack = intc_mask_ack,
207 .enable = intc_enable,
208 .disable = intc_disable,
209 .shutdown = intc_disable,
210 .set_type = intc_set_type,
211 .set_wake = intc_set_wake,
213 .set_affinity = intc_set_affinity,