drivers/net/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2008 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/types.h>
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/vmalloc.h>
  33 #include <linux/string.h>
  34 #include <linux/in.h>
  35 #include <linux/ip.h>
  36 #include <linux/tcp.h>
  37 #include <linux/ipv6.h>
  38 #include <net/checksum.h>
  39 #include <net/ip6_checksum.h>
  40 #include <linux/ethtool.h>
  41 #include <linux/if_vlan.h>
  42
  43 #include "ixgbe.h"
  44 #include "ixgbe_common.h"
  45
  46 char ixgbe_driver_name[] = "ixgbe";
  47 static const char ixgbe_driver_string[] =
  48                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  49
  50 #define DRV_VERSION "1.3.30-k2"
  51 const char ixgbe_driver_version[] = DRV_VERSION;
  52 static char ixgbe_copyright[] = "Copyright (c) 1999-2007 Intel Corporation.";
  53
  54 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  55         [board_82598] = &ixgbe_82598_info,
  56 };
  57
  58 /* ixgbe_pci_tbl - PCI Device ID Table
  59  *
  60  * Wildcard entries (PCI_ANY_ID) should come last
  61  * Last entry must be all 0s
  62  *
  63  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  64  *   Class, Class Mask, private data (not used) }
  65  */
  66 static struct pci_device_id ixgbe_pci_tbl[] = {
  67         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598),
  68          board_82598 },
  69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  70          board_82598 },
  71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  72          board_82598 },
  73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
  74          board_82598 },
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  76          board_82598 },
  77         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
  78          board_82598 },
  79         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
  80          board_82598 },
  81         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
  82          board_82598 },
  83         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
  84          board_82598 },
  85         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
  86          board_82598 },
  87
  88         /* required last entry */
  89         {0, }
  90 };
  91 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  92
  93 #ifdef CONFIG_IXGBE_DCA
  94 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
  95                             void *p);
  96 static struct notifier_block dca_notifier = {
  97         .notifier_call = ixgbe_notify_dca,
  98         .next          = NULL,
  99         .priority      = 0
 100 };
 101 #endif
 102
 103 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 104 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 105 MODULE_LICENSE("GPL");
 106 MODULE_VERSION(DRV_VERSION);
 107
 108 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
 109
 110 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 111 {
 112         u32 ctrl_ext;
 113
 114         /* Let firmware take over control of h/w */
 115         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 116         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 117                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 118 }
 119
 120 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 121 {
 122         u32 ctrl_ext;
 123
 124         /* Let firmware know the driver has taken over */
 125         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 126         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 127                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 128 }
 129
 130 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
 131                            u8 msix_vector)
 132 {
 133         u32 ivar, index;
 134
 135         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 136         index = (int_alloc_entry >> 2) & 0x1F;
 137         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
 138         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
 139         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
 140         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 141 }
 142
 143 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 144                                              struct ixgbe_tx_buffer
 145                                              *tx_buffer_info)
 146 {
 147         if (tx_buffer_info->dma) {
 148                 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
 149                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 150                 tx_buffer_info->dma = 0;
 151         }
 152         if (tx_buffer_info->skb) {
 153                 dev_kfree_skb_any(tx_buffer_info->skb);
 154                 tx_buffer_info->skb = NULL;
 155         }
 156         /* tx_buffer_info must be completely set up in the transmit path */
 157 }
 158
 159 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 160                                        struct ixgbe_ring *tx_ring,
 161                                        unsigned int eop)
 162 {
 163         struct ixgbe_hw *hw = &adapter->hw;
 164         u32 head, tail;
 165
 166         /* Detect a transmit hang in hardware, this serializes the
 167          * check with the clearing of time_stamp and movement of eop */
 168         head = IXGBE_READ_REG(hw, tx_ring->head);
 169         tail = IXGBE_READ_REG(hw, tx_ring->tail);
 170         adapter->detect_tx_hung = false;
 171         if ((head != tail) &&
 172             tx_ring->tx_buffer_info[eop].time_stamp &&
 173             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 174             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 175                 /* detected Tx unit hang */
 176                 union ixgbe_adv_tx_desc *tx_desc;
 177                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 178                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 179                         "  Tx Queue             <%d>\n"
 180                         "  TDH, TDT             <%x>, <%x>\n"
 181                         "  next_to_use          <%x>\n"
 182                         "  next_to_clean        <%x>\n"
 183                         "tx_buffer_info[next_to_clean]\n"
 184                         "  time_stamp           <%lx>\n"
 185                         "  jiffies              <%lx>\n",
 186                         tx_ring->queue_index,
 187                         head, tail,
 188                         tx_ring->next_to_use, eop,
 189                         tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
 190                 return true;
 191         }
 192
 193         return false;
 194 }
 195
 196 #define IXGBE_MAX_TXD_PWR       14
 197 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 198
 199 /* Tx Descriptors needed, worst case */
 200 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 201                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 202 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 203         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
 204
 205 #define GET_TX_HEAD_FROM_RING(ring) (\
 206         *(volatile u32 *) \
 207         ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
 208 static void ixgbe_tx_timeout(struct net_device *netdev);
 209
 210 /**
 211  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 212  * @adapter: board private structure
 213  * @tx_ring: tx ring to clean
 214  **/
 215 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 216                                struct ixgbe_ring *tx_ring)
 217 {
 218         union ixgbe_adv_tx_desc *tx_desc;
 219         struct ixgbe_tx_buffer *tx_buffer_info;
 220         struct net_device *netdev = adapter->netdev;
 221         struct sk_buff *skb;
 222         unsigned int i;
 223         u32 head, oldhead;
 224         unsigned int count = 0;
 225         unsigned int total_bytes = 0, total_packets = 0;
 226
 227         rmb();
 228         head = GET_TX_HEAD_FROM_RING(tx_ring);
 229         head = le32_to_cpu(head);
 230         i = tx_ring->next_to_clean;
 231         while (1) {
 232                 while (i != head) {
 233                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 234                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 235                         skb = tx_buffer_info->skb;
 236
 237                         if (skb) {
 238                                 unsigned int segs, bytecount;
 239
 240                                 /* gso_segs is currently only valid for tcp */
 241                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 242                                 /* multiply data chunks by size of headers */
 243                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 244                                             skb->len;
 245                                 total_packets += segs;
 246                                 total_bytes += bytecount;
 247                         }
 248
 249                         ixgbe_unmap_and_free_tx_resource(adapter,
 250                                                          tx_buffer_info);
 251
 252                         i++;
 253                         if (i == tx_ring->count)
 254                                 i = 0;
 255
 256                         count++;
 257                         if (count == tx_ring->count)
 258                                 goto done_cleaning;
 259                 }
 260                 oldhead = head;
 261                 rmb();
 262                 head = GET_TX_HEAD_FROM_RING(tx_ring);
 263                 head = le32_to_cpu(head);
 264                 if (head == oldhead)
 265                         goto done_cleaning;
 266         } /* while (1) */
 267
 268 done_cleaning:
 269         tx_ring->next_to_clean = i;
 270
 271 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 272         if (unlikely(count && netif_carrier_ok(netdev) &&
 273                      (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
 274                 /* Make sure that anybody stopping the queue after this
 275                  * sees the new next_to_clean.
 276                  */
 277                 smp_mb();
 278                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 279                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 280                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 281                         ++adapter->restart_queue;
 282                 }
 283         }
 284
 285         if (adapter->detect_tx_hung) {
 286                 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
 287                         /* schedule immediate reset if we believe we hung */
 288                         DPRINTK(PROBE, INFO,
 289                                 "tx hang %d detected, resetting adapter\n",
 290                                 adapter->tx_timeout_count + 1);
 291                         ixgbe_tx_timeout(adapter->netdev);
 292                 }
 293         }
 294
 295         /* re-arm the interrupt */
 296         if ((total_packets >= tx_ring->work_limit) ||
 297             (count == tx_ring->count))
 298                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
 299
 300         tx_ring->total_bytes += total_bytes;
 301         tx_ring->total_packets += total_packets;
 302         tx_ring->stats.bytes += total_bytes;
 303         tx_ring->stats.packets += total_packets;
 304         adapter->net_stats.tx_bytes += total_bytes;
 305         adapter->net_stats.tx_packets += total_packets;
 306         return (total_packets ? true : false);
 307 }
 308
 309 #ifdef CONFIG_IXGBE_DCA
 310 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 311                                 struct ixgbe_ring *rx_ring)
 312 {
 313         u32 rxctrl;
 314         int cpu = get_cpu();
 315         int q = rx_ring - adapter->rx_ring;
 316
 317         if (rx_ring->cpu != cpu) {
 318                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 319                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 320                 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 321                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 322                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 323                 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN);
 324                 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN |
 325                             IXGBE_DCA_RXCTRL_DESC_HSRO_EN);
 326                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 327                 rx_ring->cpu = cpu;
 328         }
 329         put_cpu();
 330 }
 331
 332 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 333                                 struct ixgbe_ring *tx_ring)
 334 {
 335         u32 txctrl;
 336         int cpu = get_cpu();
 337         int q = tx_ring - adapter->tx_ring;
 338
 339         if (tx_ring->cpu != cpu) {
 340                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 341                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 342                 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 343                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 344                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 345                 tx_ring->cpu = cpu;
 346         }
 347         put_cpu();
 348 }
 349
 350 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 351 {
 352         int i;
 353
 354         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 355                 return;
 356
 357         for (i = 0; i < adapter->num_tx_queues; i++) {
 358                 adapter->tx_ring[i].cpu = -1;
 359                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 360         }
 361         for (i = 0; i < adapter->num_rx_queues; i++) {
 362                 adapter->rx_ring[i].cpu = -1;
 363                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 364         }
 365 }
 366
 367 static int __ixgbe_notify_dca(struct device *dev, void *data)
 368 {
 369         struct net_device *netdev = dev_get_drvdata(dev);
 370         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 371         unsigned long event = *(unsigned long *)data;
 372
 373         switch (event) {
 374         case DCA_PROVIDER_ADD:
 375                 /* if we're already enabled, don't do it again */
 376                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 377                         break;
 378                 /* Always use CB2 mode, difference is masked
 379                  * in the CB driver. */
 380                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 381                 if (dca_add_requester(dev) == 0) {
 382                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 383                         ixgbe_setup_dca(adapter);
 384                         break;
 385                 }
 386                 /* Fall Through since DCA is disabled. */
 387         case DCA_PROVIDER_REMOVE:
 388                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 389                         dca_remove_requester(dev);
 390                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 391                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 392                 }
 393                 break;
 394         }
 395
 396         return 0;
 397 }
 398
 399 #endif /* CONFIG_IXGBE_DCA */
 400 /**
 401  * ixgbe_receive_skb - Send a completed packet up the stack
 402  * @adapter: board private structure
 403  * @skb: packet to send up
 404  * @status: hardware indication of status of receive
 405  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 406  * @rx_desc: rx descriptor
 407  **/
 408 static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
 409                               struct sk_buff *skb, u8 status,
 410                               union ixgbe_adv_rx_desc *rx_desc)
 411 {
 412         struct ixgbe_adapter *adapter = q_vector->adapter;
 413         struct napi_struct *napi = &q_vector->napi;
 414         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 415         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 416
 417         if (skb->ip_summed == CHECKSUM_UNNECESSARY) {
 418                 if (adapter->vlgrp && is_vlan && (tag != 0))
 419                         vlan_gro_receive(napi, adapter->vlgrp, tag, skb);
 420                 else
 421                         napi_gro_receive(napi, skb);
 422         } else {
 423                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 424                         if (adapter->vlgrp && is_vlan && (tag != 0))
 425                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 426                         else
 427                                 netif_receive_skb(skb);
 428                 } else {
 429                         if (adapter->vlgrp && is_vlan && (tag != 0))
 430                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 431                         else
 432                                 netif_rx(skb);
 433                 }
 434         }
 435 }
 436
 437 /**
 438  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 439  * @adapter: address of board private structure
 440  * @status_err: hardware indication of status of receive
 441  * @skb: skb currently being received and modified
 442  **/
 443 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 444                                      u32 status_err, struct sk_buff *skb)
 445 {
 446         skb->ip_summed = CHECKSUM_NONE;
 447
 448         /* Rx csum disabled */
 449         if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 450                 return;
 451
 452         /* if IP and error */
 453         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 454             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 455                 adapter->hw_csum_rx_error++;
 456                 return;
 457         }
 458
 459         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 460                 return;
 461
 462         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 463                 adapter->hw_csum_rx_error++;
 464                 return;
 465         }
 466
 467         /* It must be a TCP or UDP packet with a valid checksum */
 468         skb->ip_summed = CHECKSUM_UNNECESSARY;
 469         adapter->hw_csum_rx_good++;
 470 }
 471
 472 /**
 473  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 474  * @adapter: address of board private structure
 475  **/
 476 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 477                                    struct ixgbe_ring *rx_ring,
 478                                    int cleaned_count)
 479 {
 480         struct pci_dev *pdev = adapter->pdev;
 481         union ixgbe_adv_rx_desc *rx_desc;
 482         struct ixgbe_rx_buffer *bi;
 483         unsigned int i;
 484
 485         i = rx_ring->next_to_use;
 486         bi = &rx_ring->rx_buffer_info[i];
 487
 488         while (cleaned_count--) {
 489                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 490
 491                 if (!bi->page_dma &&
 492                     (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 493                         if (!bi->page) {
 494                                 bi->page = alloc_page(GFP_ATOMIC);
 495                                 if (!bi->page) {
 496                                         adapter->alloc_rx_page_failed++;
 497                                         goto no_buffers;
 498                                 }
 499                                 bi->page_offset = 0;
 500                         } else {
 501                                 /* use a half page if we're re-using */
 502                                 bi->page_offset ^= (PAGE_SIZE / 2);
 503                         }
 504
 505                         bi->page_dma = pci_map_page(pdev, bi->page,
 506                                                     bi->page_offset,
 507                                                     (PAGE_SIZE / 2),
 508                                                     PCI_DMA_FROMDEVICE);
 509                 }
 510
 511                 if (!bi->skb) {
 512                         struct sk_buff *skb;
 513                         skb = netdev_alloc_skb(adapter->netdev,
 514                                                (rx_ring->rx_buf_len +
 515                                                 NET_IP_ALIGN));
 516
 517                         if (!skb) {
 518                                 adapter->alloc_rx_buff_failed++;
 519                                 goto no_buffers;
 520                         }
 521
 522                         /*
 523                          * Make buffer alignment 2 beyond a 16 byte boundary
 524                          * this will result in a 16 byte aligned IP header after
 525                          * the 14 byte MAC header is removed
 526                          */
 527                         skb_reserve(skb, NET_IP_ALIGN);
 528
 529                         bi->skb = skb;
 530                         bi->dma = pci_map_single(pdev, skb->data,
 531                                                  rx_ring->rx_buf_len,
 532                                                  PCI_DMA_FROMDEVICE);
 533                 }
 534                 /* Refresh the desc even if buffer_addrs didn't change because
 535                  * each write-back erases this info. */
 536                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 537                         rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
 538                         rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
 539                 } else {
 540                         rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
 541                 }
 542
 543                 i++;
 544                 if (i == rx_ring->count)
 545                         i = 0;
 546                 bi = &rx_ring->rx_buffer_info[i];
 547         }
 548
 549 no_buffers:
 550         if (rx_ring->next_to_use != i) {
 551                 rx_ring->next_to_use = i;
 552                 if (i-- == 0)
 553                         i = (rx_ring->count - 1);
 554
 555                 /*
 556                  * Force memory writes to complete before letting h/w
 557                  * know there are new descriptors to fetch.  (Only
 558                  * applicable for weak-ordered memory model archs,
 559                  * such as IA-64).
 560                  */
 561                 wmb();
 562                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
 563         }
 564 }
 565
 566 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
 567 {
 568         return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
 569 }
 570
 571 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
 572 {
 573         return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
 574 }
 575
 576 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
 577                                struct ixgbe_ring *rx_ring,
 578                                int *work_done, int work_to_do)
 579 {
 580         struct ixgbe_adapter *adapter = q_vector->adapter;
 581         struct pci_dev *pdev = adapter->pdev;
 582         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 583         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 584         struct sk_buff *skb;
 585         unsigned int i;
 586         u32 len, staterr;
 587         u16 hdr_info;
 588         bool cleaned = false;
 589         int cleaned_count = 0;
 590         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 591
 592         i = rx_ring->next_to_clean;
 593         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 594         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 595         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 596
 597         while (staterr & IXGBE_RXD_STAT_DD) {
 598                 u32 upper_len = 0;
 599                 if (*work_done >= work_to_do)
 600                         break;
 601                 (*work_done)++;
 602
 603                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 604                         hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
 605                         len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 606                                IXGBE_RXDADV_HDRBUFLEN_SHIFT;
 607                         if (hdr_info & IXGBE_RXDADV_SPH)
 608                                 adapter->rx_hdr_split++;
 609                         if (len > IXGBE_RX_HDR_SIZE)
 610                                 len = IXGBE_RX_HDR_SIZE;
 611                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 612                 } else {
 613                         len = le16_to_cpu(rx_desc->wb.upper.length);
 614                 }
 615
 616                 cleaned = true;
 617                 skb = rx_buffer_info->skb;
 618                 prefetch(skb->data - NET_IP_ALIGN);
 619                 rx_buffer_info->skb = NULL;
 620
 621                 if (len && !skb_shinfo(skb)->nr_frags) {
 622                         pci_unmap_single(pdev, rx_buffer_info->dma,
 623                                          rx_ring->rx_buf_len,
 624                                          PCI_DMA_FROMDEVICE);
 625                         skb_put(skb, len);
 626                 }
 627
 628                 if (upper_len) {
 629                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 630                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
 631                         rx_buffer_info->page_dma = 0;
 632                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 633                                            rx_buffer_info->page,
 634                                            rx_buffer_info->page_offset,
 635                                            upper_len);
 636
 637                         if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
 638                             (page_count(rx_buffer_info->page) != 1))
 639                                 rx_buffer_info->page = NULL;
 640                         else
 641                                 get_page(rx_buffer_info->page);
 642
 643                         skb->len += upper_len;
 644                         skb->data_len += upper_len;
 645                         skb->truesize += upper_len;
 646                 }
 647
 648                 i++;
 649                 if (i == rx_ring->count)
 650                         i = 0;
 651                 next_buffer = &rx_ring->rx_buffer_info[i];
 652
 653                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 654                 prefetch(next_rxd);
 655
 656                 cleaned_count++;
 657                 if (staterr & IXGBE_RXD_STAT_EOP) {
 658                         rx_ring->stats.packets++;
 659                         rx_ring->stats.bytes += skb->len;
 660                 } else {
 661                         rx_buffer_info->skb = next_buffer->skb;
 662                         rx_buffer_info->dma = next_buffer->dma;
 663                         next_buffer->skb = skb;
 664                         next_buffer->dma = 0;
 665                         adapter->non_eop_descs++;
 666                         goto next_desc;
 667                 }
 668
 669                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 670                         dev_kfree_skb_irq(skb);
 671                         goto next_desc;
 672                 }
 673
 674                 ixgbe_rx_checksum(adapter, staterr, skb);
 675
 676                 /* probably a little skewed due to removing CRC */
 677                 total_rx_bytes += skb->len;
 678                 total_rx_packets++;
 679
 680                 skb->protocol = eth_type_trans(skb, adapter->netdev);
 681                 ixgbe_receive_skb(q_vector, skb, staterr, rx_desc);
 682
 683 next_desc:
 684                 rx_desc->wb.upper.status_error = 0;
 685
 686                 /* return some buffers to hardware, one at a time is too slow */
 687                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 688                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 689                         cleaned_count = 0;
 690                 }
 691
 692                 /* use prefetched values */
 693                 rx_desc = next_rxd;
 694                 rx_buffer_info = next_buffer;
 695
 696                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 697         }
 698
 699         rx_ring->next_to_clean = i;
 700         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 701
 702         if (cleaned_count)
 703                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 704
 705         rx_ring->total_packets += total_rx_packets;
 706         rx_ring->total_bytes += total_rx_bytes;
 707         adapter->net_stats.rx_bytes += total_rx_bytes;
 708         adapter->net_stats.rx_packets += total_rx_packets;
 709
 710         return cleaned;
 711 }
 712
 713 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 714 /**
 715  * ixgbe_configure_msix - Configure MSI-X hardware
 716  * @adapter: board private structure
 717  *
 718  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 719  * interrupts.
 720  **/
 721 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 722 {
 723         struct ixgbe_q_vector *q_vector;
 724         int i, j, q_vectors, v_idx, r_idx;
 725         u32 mask;
 726
 727         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 728
 729         /* Populate the IVAR table and set the ITR values to the
 730          * corresponding register.
 731          */
 732         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 733                 q_vector = &adapter->q_vector[v_idx];
 734                 /* XXX for_each_bit(...) */
 735                 r_idx = find_first_bit(q_vector->rxr_idx,
 736                                        adapter->num_rx_queues);
 737
 738                 for (i = 0; i < q_vector->rxr_count; i++) {
 739                         j = adapter->rx_ring[r_idx].reg_idx;
 740                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
 741                         r_idx = find_next_bit(q_vector->rxr_idx,
 742                                               adapter->num_rx_queues,
 743                                               r_idx + 1);
 744                 }
 745                 r_idx = find_first_bit(q_vector->txr_idx,
 746                                        adapter->num_tx_queues);
 747
 748                 for (i = 0; i < q_vector->txr_count; i++) {
 749                         j = adapter->tx_ring[r_idx].reg_idx;
 750                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
 751                         r_idx = find_next_bit(q_vector->txr_idx,
 752                                               adapter->num_tx_queues,
 753                                               r_idx + 1);
 754                 }
 755
 756                 /* if this is a tx only vector halve the interrupt rate */
 757                 if (q_vector->txr_count && !q_vector->rxr_count)
 758                         q_vector->eitr = (adapter->eitr_param >> 1);
 759                 else
 760                         /* rx only */
 761                         q_vector->eitr = adapter->eitr_param;
 762
 763                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 764                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 765         }
 766
 767         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
 768         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 769
 770         /* set up to autoclear timer, and the vectors */
 771         mask = IXGBE_EIMS_ENABLE_MASK;
 772         mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
 773         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 774 }
 775
 776 enum latency_range {
 777         lowest_latency = 0,
 778         low_latency = 1,
 779         bulk_latency = 2,
 780         latency_invalid = 255
 781 };
 782
 783 /**
 784  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 785  * @adapter: pointer to adapter
 786  * @eitr: eitr setting (ints per sec) to give last timeslice
 787  * @itr_setting: current throttle rate in ints/second
 788  * @packets: the number of packets during this measurement interval
 789  * @bytes: the number of bytes during this measurement interval
 790  *
 791  *      Stores a new ITR value based on packets and byte
 792  *      counts during the last interrupt.  The advantage of per interrupt
 793  *      computation is faster updates and more accurate ITR for the current
 794  *      traffic pattern.  Constants in this function were computed
 795  *      based on theoretical maximum wire speed and thresholds were set based
 796  *      on testing data as well as attempting to minimize response time
 797  *      while increasing bulk throughput.
 798  *      this functionality is controlled by the InterruptThrottleRate module
 799  *      parameter (see ixgbe_param.c)
 800  **/
 801 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 802                            u32 eitr, u8 itr_setting,
 803                            int packets, int bytes)
 804 {
 805         unsigned int retval = itr_setting;
 806         u32 timepassed_us;
 807         u64 bytes_perint;
 808
 809         if (packets == 0)
 810                 goto update_itr_done;
 811
 812
 813         /* simple throttlerate management
 814          *    0-20MB/s lowest (100000 ints/s)
 815          *   20-100MB/s low   (20000 ints/s)
 816          *  100-1249MB/s bulk (8000 ints/s)
 817          */
 818         /* what was last interrupt timeslice? */
 819         timepassed_us = 1000000/eitr;
 820         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 821
 822         switch (itr_setting) {
 823         case lowest_latency:
 824                 if (bytes_perint > adapter->eitr_low)
 825                         retval = low_latency;
 826                 break;
 827         case low_latency:
 828                 if (bytes_perint > adapter->eitr_high)
 829                         retval = bulk_latency;
 830                 else if (bytes_perint <= adapter->eitr_low)
 831                         retval = lowest_latency;
 832                 break;
 833         case bulk_latency:
 834                 if (bytes_perint <= adapter->eitr_high)
 835                         retval = low_latency;
 836                 break;
 837         }
 838
 839 update_itr_done:
 840         return retval;
 841 }
 842
 843 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 844 {
 845         struct ixgbe_adapter *adapter = q_vector->adapter;
 846         struct ixgbe_hw *hw = &adapter->hw;
 847         u32 new_itr;
 848         u8 current_itr, ret_itr;
 849         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 850                                sizeof(struct ixgbe_q_vector);
 851         struct ixgbe_ring *rx_ring, *tx_ring;
 852
 853         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 854         for (i = 0; i < q_vector->txr_count; i++) {
 855                 tx_ring = &(adapter->tx_ring[r_idx]);
 856                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 857                                            q_vector->tx_itr,
 858                                            tx_ring->total_packets,
 859                                            tx_ring->total_bytes);
 860                 /* if the result for this queue would decrease interrupt
 861                  * rate for this vector then use that result */
 862                 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
 863                                     q_vector->tx_itr - 1 : ret_itr);
 864                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 865                                       r_idx + 1);
 866         }
 867
 868         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 869         for (i = 0; i < q_vector->rxr_count; i++) {
 870                 rx_ring = &(adapter->rx_ring[r_idx]);
 871                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 872                                            q_vector->rx_itr,
 873                                            rx_ring->total_packets,
 874                                            rx_ring->total_bytes);
 875                 /* if the result for this queue would decrease interrupt
 876                  * rate for this vector then use that result */
 877                 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
 878                                     q_vector->rx_itr - 1 : ret_itr);
 879                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 880                                       r_idx + 1);
 881         }
 882
 883         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
 884
 885         switch (current_itr) {
 886         /* counts and packets in update_itr are dependent on these numbers */
 887         case lowest_latency:
 888                 new_itr = 100000;
 889                 break;
 890         case low_latency:
 891                 new_itr = 20000; /* aka hwitr = ~200 */
 892                 break;
 893         case bulk_latency:
 894         default:
 895                 new_itr = 8000;
 896                 break;
 897         }
 898
 899         if (new_itr != q_vector->eitr) {
 900                 u32 itr_reg;
 901                 /* do an exponential smoothing */
 902                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 903                 q_vector->eitr = new_itr;
 904                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 905                 /* must write high and low 16 bits to reset counter */
 906                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
 907                         itr_reg);
 908                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
 909         }
 910
 911         return;
 912 }
 913
 914 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
 915 {
 916         struct ixgbe_hw *hw = &adapter->hw;
 917
 918         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
 919             (eicr & IXGBE_EICR_GPI_SDP1)) {
 920                 DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n");
 921                 /* write to clear the interrupt */
 922                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
 923         }
 924 }
 925
 926 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
 927 {
 928         struct ixgbe_hw *hw = &adapter->hw;
 929
 930         adapter->lsc_int++;
 931         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
 932         adapter->link_check_timeout = jiffies;
 933         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
 934                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
 935                 schedule_work(&adapter->watchdog_task);
 936         }
 937 }
 938
 939 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
 940 {
 941         struct net_device *netdev = data;
 942         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 943         struct ixgbe_hw *hw = &adapter->hw;
 944         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 945
 946         if (eicr & IXGBE_EICR_LSC)
 947                 ixgbe_check_lsc(adapter);
 948
 949         ixgbe_check_fan_failure(adapter, eicr);
 950
 951         if (!test_bit(__IXGBE_DOWN, &adapter->state))
 952                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 953
 954         return IRQ_HANDLED;
 955 }
 956
 957 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
 958 {
 959         struct ixgbe_q_vector *q_vector = data;
 960         struct ixgbe_adapter  *adapter = q_vector->adapter;
 961         struct ixgbe_ring     *tx_ring;
 962         int i, r_idx;
 963
 964         if (!q_vector->txr_count)
 965                 return IRQ_HANDLED;
 966
 967         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 968         for (i = 0; i < q_vector->txr_count; i++) {
 969                 tx_ring = &(adapter->tx_ring[r_idx]);
 970 #ifdef CONFIG_IXGBE_DCA
 971                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 972                         ixgbe_update_tx_dca(adapter, tx_ring);
 973 #endif
 974                 tx_ring->total_bytes = 0;
 975                 tx_ring->total_packets = 0;
 976                 ixgbe_clean_tx_irq(adapter, tx_ring);
 977                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 978                                       r_idx + 1);
 979         }
 980
 981         return IRQ_HANDLED;
 982 }
 983
 984 /**
 985  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
 986  * @irq: unused
 987  * @data: pointer to our q_vector struct for this interrupt vector
 988  **/
 989 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
 990 {
 991         struct ixgbe_q_vector *q_vector = data;
 992         struct ixgbe_adapter  *adapter = q_vector->adapter;
 993         struct ixgbe_ring  *rx_ring;
 994         int r_idx;
 995         int i;
 996
 997         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 998         for (i = 0;  i < q_vector->rxr_count; i++) {
 999                 rx_ring = &(adapter->rx_ring[r_idx]);
1000                 rx_ring->total_bytes = 0;
1001                 rx_ring->total_packets = 0;
1002                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1003                                       r_idx + 1);
1004         }
1005
1006         if (!q_vector->rxr_count)
1007                 return IRQ_HANDLED;
1008
1009         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1010         rx_ring = &(adapter->rx_ring[r_idx]);
1011         /* disable interrupts on this vector only */
1012         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
1013         napi_schedule(&q_vector->napi);
1014
1015         return IRQ_HANDLED;
1016 }
1017
1018 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1019 {
1020         ixgbe_msix_clean_rx(irq, data);
1021         ixgbe_msix_clean_tx(irq, data);
1022
1023         return IRQ_HANDLED;
1024 }
1025
1026 /**
1027  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1028  * @napi: napi struct with our devices info in it
1029  * @budget: amount of work driver is allowed to do this pass, in packets
1030  *
1031  * This function is optimized for cleaning one queue only on a single
1032  * q_vector!!!
1033  **/
1034 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1035 {
1036         struct ixgbe_q_vector *q_vector =
1037                                container_of(napi, struct ixgbe_q_vector, napi);
1038         struct ixgbe_adapter *adapter = q_vector->adapter;
1039         struct ixgbe_ring *rx_ring = NULL;
1040         int work_done = 0;
1041         long r_idx;
1042
1043         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1044         rx_ring = &(adapter->rx_ring[r_idx]);
1045 #ifdef CONFIG_IXGBE_DCA
1046         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1047                 ixgbe_update_rx_dca(adapter, rx_ring);
1048 #endif
1049
1050         ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1051
1052         /* If all Rx work done, exit the polling mode */
1053         if (work_done < budget) {
1054                 napi_complete(napi);
1055                 if (adapter->itr_setting & 3)
1056                         ixgbe_set_itr_msix(q_vector);
1057                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1058                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1059         }
1060
1061         return work_done;
1062 }
1063
1064 /**
1065  * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1066  * @napi: napi struct with our devices info in it
1067  * @budget: amount of work driver is allowed to do this pass, in packets
1068  *
1069  * This function will clean more than one rx queue associated with a
1070  * q_vector.
1071  **/
1072 static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1073 {
1074         struct ixgbe_q_vector *q_vector =
1075                                container_of(napi, struct ixgbe_q_vector, napi);
1076         struct ixgbe_adapter *adapter = q_vector->adapter;
1077         struct ixgbe_ring *rx_ring = NULL;
1078         int work_done = 0, i;
1079         long r_idx;
1080         u16 enable_mask = 0;
1081
1082         /* attempt to distribute budget to each queue fairly, but don't allow
1083          * the budget to go below 1 because we'll exit polling */
1084         budget /= (q_vector->rxr_count ?: 1);
1085         budget = max(budget, 1);
1086         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1087         for (i = 0; i < q_vector->rxr_count; i++) {
1088                 rx_ring = &(adapter->rx_ring[r_idx]);
1089 #ifdef CONFIG_IXGBE_DCA
1090                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1091                         ixgbe_update_rx_dca(adapter, rx_ring);
1092 #endif
1093                 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1094                 enable_mask |= rx_ring->v_idx;
1095                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1096                                       r_idx + 1);
1097         }
1098
1099         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1100         rx_ring = &(adapter->rx_ring[r_idx]);
1101         /* If all Rx work done, exit the polling mode */
1102         if (work_done < budget) {
1103                 napi_complete(napi);
1104                 if (adapter->itr_setting & 3)
1105                         ixgbe_set_itr_msix(q_vector);
1106                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1107                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask);
1108                 return 0;
1109         }
1110
1111         return work_done;
1112 }
1113 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1114                                      int r_idx)
1115 {
1116         a->q_vector[v_idx].adapter = a;
1117         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1118         a->q_vector[v_idx].rxr_count++;
1119         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1120 }
1121
1122 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1123                                      int r_idx)
1124 {
1125         a->q_vector[v_idx].adapter = a;
1126         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1127         a->q_vector[v_idx].txr_count++;
1128         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1129 }
1130
1131 /**
1132  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1133  * @adapter: board private structure to initialize
1134  * @vectors: allotted vector count for descriptor rings
1135  *
1136  * This function maps descriptor rings to the queue-specific vectors
1137  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1138  * one vector per ring/queue, but on a constrained vector budget, we
1139  * group the rings as "efficiently" as possible.  You would add new
1140  * mapping configurations in here.
1141  **/
1142 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1143                                       int vectors)
1144 {
1145         int v_start = 0;
1146         int rxr_idx = 0, txr_idx = 0;
1147         int rxr_remaining = adapter->num_rx_queues;
1148         int txr_remaining = adapter->num_tx_queues;
1149         int i, j;
1150         int rqpv, tqpv;
1151         int err = 0;
1152
1153         /* No mapping required if MSI-X is disabled. */
1154         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1155                 goto out;
1156
1157         /*
1158          * The ideal configuration...
1159          * We have enough vectors to map one per queue.
1160          */
1161         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1162                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1163                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1164
1165                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1166                         map_vector_to_txq(adapter, v_start, txr_idx);
1167
1168                 goto out;
1169         }
1170
1171         /*
1172          * If we don't have enough vectors for a 1-to-1
1173          * mapping, we'll have to group them so there are
1174          * multiple queues per vector.
1175          */
1176         /* Re-adjusting *qpv takes care of the remainder. */
1177         for (i = v_start; i < vectors; i++) {
1178                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1179                 for (j = 0; j < rqpv; j++) {
1180                         map_vector_to_rxq(adapter, i, rxr_idx);
1181                         rxr_idx++;
1182                         rxr_remaining--;
1183                 }
1184         }
1185         for (i = v_start; i < vectors; i++) {
1186                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1187                 for (j = 0; j < tqpv; j++) {
1188                         map_vector_to_txq(adapter, i, txr_idx);
1189                         txr_idx++;
1190                         txr_remaining--;
1191                 }
1192         }
1193
1194 out:
1195         return err;
1196 }
1197
1198 /**
1199  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1200  * @adapter: board private structure
1201  *
1202  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1203  * interrupts from the kernel.
1204  **/
1205 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1206 {
1207         struct net_device *netdev = adapter->netdev;
1208         irqreturn_t (*handler)(int, void *);
1209         int i, vector, q_vectors, err;
1210         int ri=0, ti=0;
1211
1212         /* Decrement for Other and TCP Timer vectors */
1213         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1214
1215         /* Map the Tx/Rx rings to the vectors we were allotted. */
1216         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1217         if (err)
1218                 goto out;
1219
1220 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1221                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1222                          &ixgbe_msix_clean_many)
1223         for (vector = 0; vector < q_vectors; vector++) {
1224                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1225
1226                 if(handler == &ixgbe_msix_clean_rx) {
1227                         sprintf(adapter->name[vector], "%s-%s-%d",
1228                                 netdev->name, "rx", ri++);
1229                 }
1230                 else if(handler == &ixgbe_msix_clean_tx) {
1231                         sprintf(adapter->name[vector], "%s-%s-%d",
1232                                 netdev->name, "tx", ti++);
1233                 }
1234                 else
1235                         sprintf(adapter->name[vector], "%s-%s-%d",
1236                                 netdev->name, "TxRx", vector);
1237
1238                 err = request_irq(adapter->msix_entries[vector].vector,
1239                                   handler, 0, adapter->name[vector],
1240                                   &(adapter->q_vector[vector]));
1241                 if (err) {
1242                         DPRINTK(PROBE, ERR,
1243                                 "request_irq failed for MSIX interrupt "
1244                                 "Error: %d\n", err);
1245                         goto free_queue_irqs;
1246                 }
1247         }
1248
1249         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1250         err = request_irq(adapter->msix_entries[vector].vector,
1251                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1252         if (err) {
1253                 DPRINTK(PROBE, ERR,
1254                         "request_irq for msix_lsc failed: %d\n", err);
1255                 goto free_queue_irqs;
1256         }
1257
1258         return 0;
1259
1260 free_queue_irqs:
1261         for (i = vector - 1; i >= 0; i--)
1262                 free_irq(adapter->msix_entries[--vector].vector,
1263                          &(adapter->q_vector[i]));
1264         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1265         pci_disable_msix(adapter->pdev);
1266         kfree(adapter->msix_entries);
1267         adapter->msix_entries = NULL;
1268 out:
1269         return err;
1270 }
1271
1272 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1273 {
1274         struct ixgbe_hw *hw = &adapter->hw;
1275         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1276         u8 current_itr;
1277         u32 new_itr = q_vector->eitr;
1278         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1279         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1280
1281         q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1282                                             q_vector->tx_itr,
1283                                             tx_ring->total_packets,
1284                                             tx_ring->total_bytes);
1285         q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1286                                             q_vector->rx_itr,
1287                                             rx_ring->total_packets,
1288                                             rx_ring->total_bytes);
1289
1290         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1291
1292         switch (current_itr) {
1293         /* counts and packets in update_itr are dependent on these numbers */
1294         case lowest_latency:
1295                 new_itr = 100000;
1296                 break;
1297         case low_latency:
1298                 new_itr = 20000; /* aka hwitr = ~200 */
1299                 break;
1300         case bulk_latency:
1301                 new_itr = 8000;
1302                 break;
1303         default:
1304                 break;
1305         }
1306
1307         if (new_itr != q_vector->eitr) {
1308                 u32 itr_reg;
1309                 /* do an exponential smoothing */
1310                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1311                 q_vector->eitr = new_itr;
1312                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1313                 /* must write high and low 16 bits to reset counter */
1314                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1315         }
1316
1317         return;
1318 }
1319
1320 /**
1321  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1322  * @adapter: board private structure
1323  **/
1324 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1325 {
1326         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1327         IXGBE_WRITE_FLUSH(&adapter->hw);
1328         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1329                 int i;
1330                 for (i = 0; i < adapter->num_msix_vectors; i++)
1331                         synchronize_irq(adapter->msix_entries[i].vector);
1332         } else {
1333                 synchronize_irq(adapter->pdev->irq);
1334         }
1335 }
1336
1337 /**
1338  * ixgbe_irq_enable - Enable default interrupt generation settings
1339  * @adapter: board private structure
1340  **/
1341 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1342 {
1343         u32 mask;
1344         mask = IXGBE_EIMS_ENABLE_MASK;
1345         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1346                 mask |= IXGBE_EIMS_GPI_SDP1;
1347         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1348         IXGBE_WRITE_FLUSH(&adapter->hw);
1349 }
1350
1351 /**
1352  * ixgbe_intr - legacy mode Interrupt Handler
1353  * @irq: interrupt number
1354  * @data: pointer to a network interface device structure
1355  **/
1356 static irqreturn_t ixgbe_intr(int irq, void *data)
1357 {
1358         struct net_device *netdev = data;
1359         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1360         struct ixgbe_hw *hw = &adapter->hw;
1361         u32 eicr;
1362
1363         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1364          * therefore no explict interrupt disable is necessary */
1365         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1366         if (!eicr) {
1367                 /* shared interrupt alert!
1368                  * make sure interrupts are enabled because the read will
1369                  * have disabled interrupts due to EIAM */
1370                 ixgbe_irq_enable(adapter);
1371                 return IRQ_NONE;        /* Not our interrupt */
1372         }
1373
1374         if (eicr & IXGBE_EICR_LSC)
1375                 ixgbe_check_lsc(adapter);
1376
1377         ixgbe_check_fan_failure(adapter, eicr);
1378
1379         if (napi_schedule_prep(&adapter->q_vector[0].napi)) {
1380                 adapter->tx_ring[0].total_packets = 0;
1381                 adapter->tx_ring[0].total_bytes = 0;
1382                 adapter->rx_ring[0].total_packets = 0;
1383                 adapter->rx_ring[0].total_bytes = 0;
1384                 /* would disable interrupts here but EIAM disabled it */
1385                 __napi_schedule(&adapter->q_vector[0].napi);
1386         }
1387
1388         return IRQ_HANDLED;
1389 }
1390
1391 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1392 {
1393         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1394
1395         for (i = 0; i < q_vectors; i++) {
1396                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1397                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1398                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1399                 q_vector->rxr_count = 0;
1400                 q_vector->txr_count = 0;
1401         }
1402 }
1403
1404 /**
1405  * ixgbe_request_irq - initialize interrupts
1406  * @adapter: board private structure
1407  *
1408  * Attempts to configure interrupts using the best available
1409  * capabilities of the hardware and kernel.
1410  **/
1411 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1412 {
1413         struct net_device *netdev = adapter->netdev;
1414         int err;
1415
1416         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1417                 err = ixgbe_request_msix_irqs(adapter);
1418         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1419                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1420                                   netdev->name, netdev);
1421         } else {
1422                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1423                                   netdev->name, netdev);
1424         }
1425
1426         if (err)
1427                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1428
1429         return err;
1430 }
1431
1432 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1433 {
1434         struct net_device *netdev = adapter->netdev;
1435
1436         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1437                 int i, q_vectors;
1438
1439                 q_vectors = adapter->num_msix_vectors;
1440
1441                 i = q_vectors - 1;
1442                 free_irq(adapter->msix_entries[i].vector, netdev);
1443
1444                 i--;
1445                 for (; i >= 0; i--) {
1446                         free_irq(adapter->msix_entries[i].vector,
1447                                  &(adapter->q_vector[i]));
1448                 }
1449
1450                 ixgbe_reset_q_vectors(adapter);
1451         } else {
1452                 free_irq(adapter->pdev->irq, netdev);
1453         }
1454 }
1455
1456 /**
1457  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1458  *
1459  **/
1460 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1461 {
1462         struct ixgbe_hw *hw = &adapter->hw;
1463
1464         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1465                         EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1466
1467         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1468         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1469
1470         map_vector_to_rxq(adapter, 0, 0);
1471         map_vector_to_txq(adapter, 0, 0);
1472
1473         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1474 }
1475
1476 /**
1477  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1478  * @adapter: board private structure
1479  *
1480  * Configure the Tx unit of the MAC after a reset.
1481  **/
1482 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1483 {
1484         u64 tdba, tdwba;
1485         struct ixgbe_hw *hw = &adapter->hw;
1486         u32 i, j, tdlen, txctrl;
1487
1488         /* Setup the HW Tx Head and Tail descriptor pointers */
1489         for (i = 0; i < adapter->num_tx_queues; i++) {
1490                 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1491                 j = ring->reg_idx;
1492                 tdba = ring->dma;
1493                 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1494                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1495                                 (tdba & DMA_32BIT_MASK));
1496                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1497                 tdwba = ring->dma +
1498                         (ring->count * sizeof(union ixgbe_adv_tx_desc));
1499                 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1500                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1501                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1502                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1503                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1504                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1505                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1506                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1507                 /* Disable Tx Head Writeback RO bit, since this hoses
1508                  * bookkeeping if things aren't delivered in order.
1509                  */
1510                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1511                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1512                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1513         }
1514 }
1515
1516 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1517
1518 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1519 {
1520         struct ixgbe_ring *rx_ring;
1521         u32 srrctl;
1522         int queue0;
1523         unsigned long mask;
1524
1525         /* program one srrctl register per VMDq index */
1526         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1527                 long shift, len;
1528                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1529                 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1530                 shift = find_first_bit(&mask, len);
1531                 queue0 = index & mask;
1532                 index = (index & mask) >> shift;
1533         /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1534         } else {
1535                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1536                 queue0 = index & mask;
1537                 index = index & mask;
1538         }
1539
1540         rx_ring = &adapter->rx_ring[queue0];
1541
1542         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1543
1544         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1545         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1546
1547         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1548                 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1549                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1550                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1551                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1552                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1553         } else {
1554                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1555
1556                 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1557                         srrctl |= IXGBE_RXBUFFER_2048 >>
1558                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1559                 else
1560                         srrctl |= rx_ring->rx_buf_len >>
1561                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1562         }
1563         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1564 }
1565
1566 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1567                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1568
1569 /**
1570  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1571  * @adapter: board private structure
1572  *
1573  * Configure the Rx unit of the MAC after a reset.
1574  **/
1575 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1576 {
1577         u64 rdba;
1578         struct ixgbe_hw *hw = &adapter->hw;
1579         struct net_device *netdev = adapter->netdev;
1580         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1581         int i, j;
1582         u32 rdlen, rxctrl, rxcsum;
1583         static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1584                           0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1585                           0x6A3E67EA, 0x14364D17, 0x3BED200D};
1586         u32 fctrl, hlreg0;
1587         u32 pages;
1588         u32 reta = 0, mrqc;
1589         u32 rdrxctl;
1590         int rx_buf_len;
1591
1592         /* Decide whether to use packet split mode or not */
1593         adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1594
1595         /* Set the RX buffer length according to the mode */
1596         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1597                 rx_buf_len = IXGBE_RX_HDR_SIZE;
1598         } else {
1599                 if (netdev->mtu <= ETH_DATA_LEN)
1600                         rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1601                 else
1602                         rx_buf_len = ALIGN(max_frame, 1024);
1603         }
1604
1605         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1606         fctrl |= IXGBE_FCTRL_BAM;
1607         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1608         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1609
1610         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1611         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1612                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1613         else
1614                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1615         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1616
1617         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1618
1619         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1620         /* disable receives while setting up the descriptors */
1621         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1622         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1623
1624         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1625          * the Base and Length of the Rx Descriptor Ring */
1626         for (i = 0; i < adapter->num_rx_queues; i++) {
1627                 rdba = adapter->rx_ring[i].dma;
1628                 j = adapter->rx_ring[i].reg_idx;
1629                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1630                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1631                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1632                 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1633                 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1634                 adapter->rx_ring[i].head = IXGBE_RDH(j);
1635                 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1636                 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1637
1638                 ixgbe_configure_srrctl(adapter, j);
1639         }
1640
1641         /*
1642          * For VMDq support of different descriptor types or
1643          * buffer sizes through the use of multiple SRRCTL
1644          * registers, RDRXCTL.MVMEN must be set to 1
1645          *
1646          * also, the manual doesn't mention it clearly but DCA hints
1647          * will only use queue 0's tags unless this bit is set.  Side
1648          * effects of setting this bit are only that SRRCTL must be
1649          * fully programmed [0..15]
1650          */
1651         if (adapter->flags &
1652             (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED)) {
1653                 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1654                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1655                 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1656         }
1657
1658         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1659                 /* Fill out redirection table */
1660                 for (i = 0, j = 0; i < 128; i++, j++) {
1661                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1662                                 j = 0;
1663                         /* reta = 4-byte sliding window of
1664                          * 0x00..(indices-1)(indices-1)00..etc. */
1665                         reta = (reta << 8) | (j * 0x11);
1666                         if ((i & 3) == 3)
1667                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1668                 }
1669
1670                 /* Fill out hash function seeds */
1671                 for (i = 0; i < 10; i++)
1672                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1673
1674                 mrqc = IXGBE_MRQC_RSSEN
1675                     /* Perform hash on these packet types */
1676                        | IXGBE_MRQC_RSS_FIELD_IPV4
1677                        | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1678                        | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1679                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1680                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1681                        | IXGBE_MRQC_RSS_FIELD_IPV6
1682                        | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1683                        | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1684                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1685                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1686         }
1687
1688         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1689
1690         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1691             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1692                 /* Disable indicating checksum in descriptor, enables
1693                  * RSS hash */
1694                 rxcsum |= IXGBE_RXCSUM_PCSD;
1695         }
1696         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1697                 /* Enable IPv4 payload checksum for UDP fragments
1698                  * if PCSD is not set */
1699                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1700         }
1701
1702         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1703 }
1704
1705 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1706 {
1707         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1708         struct ixgbe_hw *hw = &adapter->hw;
1709
1710         /* add VID to filter table */
1711         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
1712 }
1713
1714 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1715 {
1716         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1717         struct ixgbe_hw *hw = &adapter->hw;
1718
1719         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1720                 ixgbe_irq_disable(adapter);
1721
1722         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1723
1724         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1725                 ixgbe_irq_enable(adapter);
1726
1727         /* remove VID from filter table */
1728         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
1729 }
1730
1731 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1732                                    struct vlan_group *grp)
1733 {
1734         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1735         u32 ctrl;
1736
1737         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1738                 ixgbe_irq_disable(adapter);
1739         adapter->vlgrp = grp;
1740
1741         /*
1742          * For a DCB driver, always enable VLAN tag stripping so we can
1743          * still receive traffic from a DCB-enabled host even if we're
1744          * not in DCB mode.
1745          */
1746         ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1747         ctrl |= IXGBE_VLNCTRL_VME;
1748         ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1749         IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1750         ixgbe_vlan_rx_add_vid(netdev, 0);
1751
1752         if (grp) {
1753                 /* enable VLAN tag insert/strip */
1754                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1755                 ctrl |= IXGBE_VLNCTRL_VME;
1756                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1757                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1758         }
1759
1760         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1761                 ixgbe_irq_enable(adapter);
1762 }
1763
1764 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1765 {
1766         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1767
1768         if (adapter->vlgrp) {
1769                 u16 vid;
1770                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1771                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1772                                 continue;
1773                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1774                 }
1775         }
1776 }
1777
1778 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1779 {
1780         struct dev_mc_list *mc_ptr;
1781         u8 *addr = *mc_addr_ptr;
1782         *vmdq = 0;
1783
1784         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1785         if (mc_ptr->next)
1786                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1787         else
1788                 *mc_addr_ptr = NULL;
1789
1790         return addr;
1791 }
1792
1793 /**
1794  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1795  * @netdev: network interface device structure
1796  *
1797  * The set_rx_method entry point is called whenever the unicast/multicast
1798  * address list or the network interface flags are updated.  This routine is
1799  * responsible for configuring the hardware for proper unicast, multicast and
1800  * promiscuous mode.
1801  **/
1802 static void ixgbe_set_rx_mode(struct net_device *netdev)
1803 {
1804         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1805         struct ixgbe_hw *hw = &adapter->hw;
1806         u32 fctrl, vlnctrl;
1807         u8 *addr_list = NULL;
1808         int addr_count = 0;
1809
1810         /* Check for Promiscuous and All Multicast modes */
1811
1812         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1813         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1814
1815         if (netdev->flags & IFF_PROMISC) {
1816                 hw->addr_ctrl.user_set_promisc = 1;
1817                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1818                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1819         } else {
1820                 if (netdev->flags & IFF_ALLMULTI) {
1821                         fctrl |= IXGBE_FCTRL_MPE;
1822                         fctrl &= ~IXGBE_FCTRL_UPE;
1823                 } else {
1824                         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1825                 }
1826                 vlnctrl |= IXGBE_VLNCTRL_VFE;
1827                 hw->addr_ctrl.user_set_promisc = 0;
1828         }
1829
1830         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1831         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1832
1833         /* reprogram secondary unicast list */
1834         addr_count = netdev->uc_count;
1835         if (addr_count)
1836                 addr_list = netdev->uc_list->dmi_addr;
1837         hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
1838                                           ixgbe_addr_list_itr);
1839
1840         /* reprogram multicast list */
1841         addr_count = netdev->mc_count;
1842         if (addr_count)
1843                 addr_list = netdev->mc_list->dmi_addr;
1844         hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1845                                         ixgbe_addr_list_itr);
1846 }
1847
1848 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1849 {
1850         int q_idx;
1851         struct ixgbe_q_vector *q_vector;
1852         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1853
1854         /* legacy and MSI only use one vector */
1855         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1856                 q_vectors = 1;
1857
1858         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1859                 struct napi_struct *napi;
1860                 q_vector = &adapter->q_vector[q_idx];
1861                 if (!q_vector->rxr_count)
1862                         continue;
1863                 napi = &q_vector->napi;
1864                 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) &&
1865                     (q_vector->rxr_count > 1))
1866                         napi->poll = &ixgbe_clean_rxonly_many;
1867
1868                 napi_enable(napi);
1869         }
1870 }
1871
1872 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1873 {
1874         int q_idx;
1875         struct ixgbe_q_vector *q_vector;
1876         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1877
1878         /* legacy and MSI only use one vector */
1879         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1880                 q_vectors = 1;
1881
1882         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1883                 q_vector = &adapter->q_vector[q_idx];
1884                 if (!q_vector->rxr_count)
1885                         continue;
1886                 napi_disable(&q_vector->napi);
1887         }
1888 }
1889
1890 #ifdef CONFIG_IXGBE_DCB
1891 /*
1892  * ixgbe_configure_dcb - Configure DCB hardware
1893  * @adapter: ixgbe adapter struct
1894  *
1895  * This is called by the driver on open to configure the DCB hardware.
1896  * This is also called by the gennetlink interface when reconfiguring
1897  * the DCB state.
1898  */
1899 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
1900 {
1901         struct ixgbe_hw *hw = &adapter->hw;
1902         u32 txdctl, vlnctrl;
1903         int i, j;
1904
1905         ixgbe_dcb_check_config(&adapter->dcb_cfg);
1906         ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
1907         ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
1908
1909         /* reconfigure the hardware */
1910         ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
1911
1912         for (i = 0; i < adapter->num_tx_queues; i++) {
1913                 j = adapter->tx_ring[i].reg_idx;
1914                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1915                 /* PThresh workaround for Tx hang with DFP enabled. */
1916                 txdctl |= 32;
1917                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1918         }
1919         /* Enable VLAN tag insert/strip */
1920         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1921         vlnctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1922         vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
1923         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1924         hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
1925 }
1926
1927 #endif
1928 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1929 {
1930         struct net_device *netdev = adapter->netdev;
1931         int i;
1932
1933         ixgbe_set_rx_mode(netdev);
1934
1935         ixgbe_restore_vlan(adapter);
1936 #ifdef CONFIG_IXGBE_DCB
1937         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1938                 netif_set_gso_max_size(netdev, 32768);
1939                 ixgbe_configure_dcb(adapter);
1940         } else {
1941                 netif_set_gso_max_size(netdev, 65536);
1942         }
1943 #else
1944         netif_set_gso_max_size(netdev, 65536);
1945 #endif
1946
1947         ixgbe_configure_tx(adapter);
1948         ixgbe_configure_rx(adapter);
1949         for (i = 0; i < adapter->num_rx_queues; i++)
1950                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1951                                        (adapter->rx_ring[i].count - 1));
1952 }
1953
1954 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1955 {
1956         struct net_device *netdev = adapter->netdev;
1957         struct ixgbe_hw *hw = &adapter->hw;
1958         int i, j = 0;
1959         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1960         u32 txdctl, rxdctl, mhadd;
1961         u32 gpie;
1962
1963         ixgbe_get_hw_control(adapter);
1964
1965         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1966             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1967                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1968                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1969                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1970                 } else {
1971                         /* MSI only */
1972                         gpie = 0;
1973                 }
1974                 /* XXX: to interrupt immediately for EICS writes, enable this */
1975                 /* gpie |= IXGBE_GPIE_EIMEN; */
1976                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1977         }
1978
1979         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1980                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1981                  * specifically only auto mask tx and rx interrupts */
1982                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
1983         }
1984
1985         /* Enable fan failure interrupt if media type is copper */
1986         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
1987                 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
1988                 gpie |= IXGBE_SDP1_GPIEN;
1989                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1990         }
1991
1992         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1993         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1994                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1995                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1996
1997                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1998         }
1999
2000         for (i = 0; i < adapter->num_tx_queues; i++) {
2001                 j = adapter->tx_ring[i].reg_idx;
2002                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2003                 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2004                 txdctl |= (8 << 16);
2005                 txdctl |= IXGBE_TXDCTL_ENABLE;
2006                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2007         }
2008
2009         for (i = 0; i < adapter->num_rx_queues; i++) {
2010                 j = adapter->rx_ring[i].reg_idx;
2011                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2012                 /* enable PTHRESH=32 descriptors (half the internal cache)
2013                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
2014                  * this also removes a pesky rx_no_buffer_count increment */
2015                 rxdctl |= 0x0020;
2016                 rxdctl |= IXGBE_RXDCTL_ENABLE;
2017                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
2018         }
2019         /* enable all receives */
2020         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2021         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
2022         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
2023
2024         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2025                 ixgbe_configure_msix(adapter);
2026         else
2027                 ixgbe_configure_msi_and_legacy(adapter);
2028
2029         ixgbe_napi_add_all(adapter);
2030
2031         clear_bit(__IXGBE_DOWN, &adapter->state);
2032         ixgbe_napi_enable_all(adapter);
2033
2034         /* clear any pending interrupts, may auto mask */
2035         IXGBE_READ_REG(hw, IXGBE_EICR);
2036
2037         ixgbe_irq_enable(adapter);
2038
2039         /* enable transmits */
2040         netif_tx_start_all_queues(netdev);
2041
2042         /* bring the link up in the watchdog, this could race with our first
2043          * link up interrupt but shouldn't be a problem */
2044         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2045         adapter->link_check_timeout = jiffies;
2046         mod_timer(&adapter->watchdog_timer, jiffies);
2047         return 0;
2048 }
2049
2050 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
2051 {
2052         WARN_ON(in_interrupt());
2053         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
2054                 msleep(1);
2055         ixgbe_down(adapter);
2056         ixgbe_up(adapter);
2057         clear_bit(__IXGBE_RESETTING, &adapter->state);
2058 }
2059
2060 int ixgbe_up(struct ixgbe_adapter *adapter)
2061 {
2062         /* hardware has been reset, we need to reload some things */
2063         ixgbe_configure(adapter);
2064
2065         return ixgbe_up_complete(adapter);
2066 }
2067
2068 void ixgbe_reset(struct ixgbe_adapter *adapter)
2069 {
2070         struct ixgbe_hw *hw = &adapter->hw;
2071         if (hw->mac.ops.init_hw(hw))
2072                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
2073
2074         /* reprogram the RAR[0] in case user changed it. */
2075         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
2076
2077 }
2078
2079 /**
2080  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2081  * @adapter: board private structure
2082  * @rx_ring: ring to free buffers from
2083  **/
2084 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2085                                 struct ixgbe_ring *rx_ring)
2086 {
2087         struct pci_dev *pdev = adapter->pdev;
2088         unsigned long size;
2089         unsigned int i;
2090
2091         /* Free all the Rx ring sk_buffs */
2092
2093         for (i = 0; i < rx_ring->count; i++) {
2094                 struct ixgbe_rx_buffer *rx_buffer_info;
2095
2096                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2097                 if (rx_buffer_info->dma) {
2098                         pci_unmap_single(pdev, rx_buffer_info->dma,
2099                                          rx_ring->rx_buf_len,
2100                                          PCI_DMA_FROMDEVICE);
2101                         rx_buffer_info->dma = 0;
2102                 }
2103                 if (rx_buffer_info->skb) {
2104                         dev_kfree_skb(rx_buffer_info->skb);
2105                         rx_buffer_info->skb = NULL;
2106                 }
2107                 if (!rx_buffer_info->page)
2108                         continue;
2109                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
2110                                PCI_DMA_FROMDEVICE);
2111                 rx_buffer_info->page_dma = 0;
2112                 put_page(rx_buffer_info->page);
2113                 rx_buffer_info->page = NULL;
2114                 rx_buffer_info->page_offset = 0;
2115         }
2116
2117         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2118         memset(rx_ring->rx_buffer_info, 0, size);
2119
2120         /* Zero out the descriptor ring */
2121         memset(rx_ring->desc, 0, rx_ring->size);
2122
2123         rx_ring->next_to_clean = 0;
2124         rx_ring->next_to_use = 0;
2125
2126         writel(0, adapter->hw.hw_addr + rx_ring->head);
2127         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2128 }
2129
2130 /**
2131  * ixgbe_clean_tx_ring - Free Tx Buffers
2132  * @adapter: board private structure
2133  * @tx_ring: ring to be cleaned
2134  **/
2135 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2136                                 struct ixgbe_ring *tx_ring)
2137 {
2138         struct ixgbe_tx_buffer *tx_buffer_info;
2139         unsigned long size;
2140         unsigned int i;
2141
2142         /* Free all the Tx ring sk_buffs */
2143
2144         for (i = 0; i < tx_ring->count; i++) {
2145                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2146                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2147         }
2148
2149         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2150         memset(tx_ring->tx_buffer_info, 0, size);
2151
2152         /* Zero out the descriptor ring */
2153         memset(tx_ring->desc, 0, tx_ring->size);
2154
2155         tx_ring->next_to_use = 0;
2156         tx_ring->next_to_clean = 0;
2157
2158         writel(0, adapter->hw.hw_addr + tx_ring->head);
2159         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2160 }
2161
2162 /**
2163  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2164  * @adapter: board private structure
2165  **/
2166 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2167 {
2168         int i;
2169
2170         for (i = 0; i < adapter->num_rx_queues; i++)
2171                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2172 }
2173
2174 /**
2175  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2176  * @adapter: board private structure
2177  **/
2178 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2179 {
2180         int i;
2181
2182         for (i = 0; i < adapter->num_tx_queues; i++)
2183                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2184 }
2185
2186 void ixgbe_down(struct ixgbe_adapter *adapter)
2187 {
2188         struct net_device *netdev = adapter->netdev;
2189         struct ixgbe_hw *hw = &adapter->hw;
2190         u32 rxctrl;
2191         u32 txdctl;
2192         int i, j;
2193
2194         /* signal that we are down to the interrupt handler */
2195         set_bit(__IXGBE_DOWN, &adapter->state);
2196
2197         /* disable receives */
2198         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2199         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2200
2201         netif_tx_disable(netdev);
2202
2203         IXGBE_WRITE_FLUSH(hw);
2204         msleep(10);
2205
2206         netif_tx_stop_all_queues(netdev);
2207
2208         ixgbe_irq_disable(adapter);
2209
2210         ixgbe_napi_disable_all(adapter);
2211
2212         del_timer_sync(&adapter->watchdog_timer);
2213         cancel_work_sync(&adapter->watchdog_task);
2214
2215         /* disable transmits in the hardware now that interrupts are off */
2216         for (i = 0; i < adapter->num_tx_queues; i++) {
2217                 j = adapter->tx_ring[i].reg_idx;
2218                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2219                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2220                                 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2221         }
2222
2223         netif_carrier_off(netdev);
2224
2225 #ifdef CONFIG_IXGBE_DCA
2226         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2227                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2228                 dca_remove_requester(&adapter->pdev->dev);
2229         }
2230
2231 #endif
2232         if (!pci_channel_offline(adapter->pdev))
2233                 ixgbe_reset(adapter);
2234         ixgbe_clean_all_tx_rings(adapter);
2235         ixgbe_clean_all_rx_rings(adapter);
2236
2237 #ifdef CONFIG_IXGBE_DCA
2238         /* since we reset the hardware DCA settings were cleared */
2239         if (dca_add_requester(&adapter->pdev->dev) == 0) {
2240                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2241                 /* always use CB2 mode, difference is masked
2242                  * in the CB driver */
2243                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2244                 ixgbe_setup_dca(adapter);
2245         }
2246 #endif
2247 }
2248
2249 /**
2250  * ixgbe_poll - NAPI Rx polling callback
2251  * @napi: structure for representing this polling device
2252  * @budget: how many packets driver is allowed to clean
2253  *
2254  * This function is used for legacy and MSI, NAPI mode
2255  **/
2256 static int ixgbe_poll(struct napi_struct *napi, int budget)
2257 {
2258         struct ixgbe_q_vector *q_vector = container_of(napi,
2259                                                   struct ixgbe_q_vector, napi);
2260         struct ixgbe_adapter *adapter = q_vector->adapter;
2261         int tx_cleaned, work_done = 0;
2262
2263 #ifdef CONFIG_IXGBE_DCA
2264         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2265                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2266                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2267         }
2268 #endif
2269
2270         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2271         ixgbe_clean_rx_irq(q_vector, adapter->rx_ring, &work_done, budget);
2272
2273         if (tx_cleaned)
2274                 work_done = budget;
2275
2276         /* If budget not fully consumed, exit the polling mode */
2277         if (work_done < budget) {
2278                 napi_complete(napi);
2279                 if (adapter->itr_setting & 3)
2280                         ixgbe_set_itr(adapter);
2281                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2282                         ixgbe_irq_enable(adapter);
2283         }
2284         return work_done;
2285 }
2286
2287 /**
2288  * ixgbe_tx_timeout - Respond to a Tx Hang
2289  * @netdev: network interface device structure
2290  **/
2291 static void ixgbe_tx_timeout(struct net_device *netdev)
2292 {
2293         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2294
2295         /* Do the reset outside of interrupt context */
2296         schedule_work(&adapter->reset_task);
2297 }
2298
2299 static void ixgbe_reset_task(struct work_struct *work)
2300 {
2301         struct ixgbe_adapter *adapter;
2302         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2303
2304         /* If we're already down or resetting, just bail */
2305         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
2306             test_bit(__IXGBE_RESETTING, &adapter->state))
2307                 return;
2308
2309         adapter->tx_timeout_count++;
2310
2311         ixgbe_reinit_locked(adapter);
2312 }
2313
2314 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2315 {
2316         int nrq = 1, ntq = 1;
2317         int feature_mask = 0, rss_i, rss_m;
2318         int dcb_i, dcb_m;
2319
2320         /* Number of supported queues */
2321         switch (adapter->hw.mac.type) {
2322         case ixgbe_mac_82598EB:
2323                 dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2324                 dcb_m = 0;
2325                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2326                 rss_m = 0;
2327                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2328                 feature_mask |= IXGBE_FLAG_DCB_ENABLED;
2329
2330                 switch (adapter->flags & feature_mask) {
2331                 case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_DCB_ENABLED):
2332                         dcb_m = 0x7 << 3;
2333                         rss_i = min(8, rss_i);
2334                         rss_m = 0x7;
2335                         nrq = dcb_i * rss_i;
2336                         ntq = min(MAX_TX_QUEUES, dcb_i * rss_i);
2337                         break;
2338                 case (IXGBE_FLAG_DCB_ENABLED):
2339                         dcb_m = 0x7 << 3;
2340                         nrq = dcb_i;
2341                         ntq = dcb_i;
2342                         break;
2343                 case (IXGBE_FLAG_RSS_ENABLED):
2344                         rss_m = 0xF;
2345                         nrq = rss_i;
2346                         ntq = rss_i;
2347                         break;
2348                 case 0:
2349                 default:
2350                         dcb_i = 0;
2351                         dcb_m = 0;
2352                         rss_i = 0;
2353                         rss_m = 0;
2354                         nrq = 1;
2355                         ntq = 1;
2356                         break;
2357                 }
2358
2359                 /* Sanity check, we should never have zero queues */
2360                 nrq = (nrq ?:1);
2361                 ntq = (ntq ?:1);
2362
2363                 adapter->ring_feature[RING_F_DCB].indices = dcb_i;
2364                 adapter->ring_feature[RING_F_DCB].mask = dcb_m;
2365                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2366                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2367                 break;
2368         default:
2369                 nrq = 1;
2370                 ntq = 1;
2371                 break;
2372         }
2373
2374         adapter->num_rx_queues = nrq;
2375         adapter->num_tx_queues = ntq;
2376 }
2377
2378 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2379                                        int vectors)
2380 {
2381         int err, vector_threshold;
2382
2383         /* We'll want at least 3 (vector_threshold):
2384          * 1) TxQ[0] Cleanup
2385          * 2) RxQ[0] Cleanup
2386          * 3) Other (Link Status Change, etc.)
2387          * 4) TCP Timer (optional)
2388          */
2389         vector_threshold = MIN_MSIX_COUNT;
2390
2391         /* The more we get, the more we will assign to Tx/Rx Cleanup
2392          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2393          * Right now, we simply care about how many we'll get; we'll
2394          * set them up later while requesting irq's.
2395          */
2396         while (vectors >= vector_threshold) {
2397                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2398                                       vectors);
2399                 if (!err) /* Success in acquiring all requested vectors. */
2400                         break;
2401                 else if (err < 0)
2402                         vectors = 0; /* Nasty failure, quit now */
2403                 else /* err == number of vectors we should try again with */
2404                         vectors = err;
2405         }
2406
2407         if (vectors < vector_threshold) {
2408                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2409                  * This just means we'll go with either a single MSI
2410                  * vector or fall back to legacy interrupts.
2411                  */
2412                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2413                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2414                 kfree(adapter->msix_entries);
2415                 adapter->msix_entries = NULL;
2416                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2417                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2418                 ixgbe_set_num_queues(adapter);
2419         } else {
2420                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2421                 adapter->num_msix_vectors = vectors;
2422         }
2423 }
2424
2425 /**
2426  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2427  * @adapter: board private structure to initialize
2428  *
2429  * Once we know the feature-set enabled for the device, we'll cache
2430  * the register offset the descriptor ring is assigned to.
2431  **/
2432 static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2433 {
2434         int feature_mask = 0, rss_i;
2435         int i, txr_idx, rxr_idx;
2436         int dcb_i;
2437
2438         /* Number of supported queues */
2439         switch (adapter->hw.mac.type) {
2440         case ixgbe_mac_82598EB:
2441                 dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2442                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2443                 txr_idx = 0;
2444                 rxr_idx = 0;
2445                 feature_mask |= IXGBE_FLAG_DCB_ENABLED;
2446                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2447                 switch (adapter->flags & feature_mask) {
2448                 case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_DCB_ENABLED):
2449                         for (i = 0; i < dcb_i; i++) {
2450                                 int j;
2451                                 /* Rx first */
2452                                 for (j = 0; j < adapter->num_rx_queues; j++) {
2453                                         adapter->rx_ring[rxr_idx].reg_idx =
2454                                                 i << 3 | j;
2455                                         rxr_idx++;
2456                                 }
2457                                 /* Tx now */
2458                                 for (j = 0; j < adapter->num_tx_queues; j++) {
2459                                         adapter->tx_ring[txr_idx].reg_idx =
2460                                                 i << 2 | (j >> 1);
2461                                         if (j & 1)
2462                                                 txr_idx++;
2463                                 }
2464                         }
2465                 case (IXGBE_FLAG_DCB_ENABLED):
2466                         /* the number of queues is assumed to be symmetric */
2467                         for (i = 0; i < dcb_i; i++) {
2468                                 adapter->rx_ring[i].reg_idx = i << 3;
2469                                 adapter->tx_ring[i].reg_idx = i << 2;
2470                         }
2471                         break;
2472                 case (IXGBE_FLAG_RSS_ENABLED):
2473                         for (i = 0; i < adapter->num_rx_queues; i++)
2474                                 adapter->rx_ring[i].reg_idx = i;
2475                         for (i = 0; i < adapter->num_tx_queues; i++)
2476                                 adapter->tx_ring[i].reg_idx = i;
2477                         break;
2478                 case 0:
2479                 default:
2480                         break;
2481                 }
2482                 break;
2483         default:
2484                 break;
2485         }
2486 }
2487
2488 /**
2489  * ixgbe_alloc_queues - Allocate memory for all rings
2490  * @adapter: board private structure to initialize
2491  *
2492  * We allocate one ring per queue at run-time since we don't know the
2493  * number of queues at compile-time.
2494  **/
2495 static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2496 {
2497         int i;
2498
2499         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2500                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2501         if (!adapter->tx_ring)
2502                 goto err_tx_ring_allocation;
2503
2504         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2505                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2506         if (!adapter->rx_ring)
2507                 goto err_rx_ring_allocation;
2508
2509         for (i = 0; i < adapter->num_tx_queues; i++) {
2510                 adapter->tx_ring[i].count = adapter->tx_ring_count;
2511                 adapter->tx_ring[i].queue_index = i;
2512         }
2513
2514         for (i = 0; i < adapter->num_rx_queues; i++) {
2515                 adapter->rx_ring[i].count = adapter->rx_ring_count;
2516                 adapter->rx_ring[i].queue_index = i;
2517         }
2518
2519         ixgbe_cache_ring_register(adapter);
2520
2521         return 0;
2522
2523 err_rx_ring_allocation:
2524         kfree(adapter->tx_ring);
2525 err_tx_ring_allocation:
2526         return -ENOMEM;
2527 }
2528
2529 /**
2530  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2531  * @adapter: board private structure to initialize
2532  *
2533  * Attempt to configure the interrupts using the best available
2534  * capabilities of the hardware and the kernel.
2535  **/
2536 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
2537 {
2538         int err = 0;
2539         int vector, v_budget;
2540
2541         /*
2542          * It's easy to be greedy for MSI-X vectors, but it really
2543          * doesn't do us much good if we have a lot more vectors
2544          * than CPU's.  So let's be conservative and only ask for
2545          * (roughly) twice the number of vectors as there are CPU's.
2546          */
2547         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2548                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2549
2550         /*
2551          * At the same time, hardware can only support a maximum of
2552          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2553          * we can easily reach upwards of 64 Rx descriptor queues and
2554          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2555          * the cpu count also exceeds our vector limit.
2556          */
2557         v_budget = min(v_budget, MAX_MSIX_COUNT);
2558
2559         /* A failure in MSI-X entry allocation isn't fatal, but it does
2560          * mean we disable MSI-X capabilities of the adapter. */
2561         adapter->msix_entries = kcalloc(v_budget,
2562                                         sizeof(struct msix_entry), GFP_KERNEL);
2563         if (!adapter->msix_entries) {
2564                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2565                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2566                 ixgbe_set_num_queues(adapter);
2567                 kfree(adapter->tx_ring);
2568                 kfree(adapter->rx_ring);
2569                 err = ixgbe_alloc_queues(adapter);
2570                 if (err) {
2571                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2572                                 "for queues\n");
2573                         goto out;
2574                 }
2575
2576                 goto try_msi;
2577         }
2578
2579         for (vector = 0; vector < v_budget; vector++)
2580                 adapter->msix_entries[vector].entry = vector;
2581
2582         ixgbe_acquire_msix_vectors(adapter, v_budget);
2583
2584         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2585                 goto out;
2586
2587 try_msi:
2588         err = pci_enable_msi(adapter->pdev);
2589         if (!err) {
2590                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2591         } else {
2592                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2593                         "falling back to legacy.  Error: %d\n", err);
2594                 /* reset err */
2595                 err = 0;
2596         }
2597
2598 out:
2599         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2600         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2601
2602         return err;
2603 }
2604
2605 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2606 {
2607         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2608                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2609                 pci_disable_msix(adapter->pdev);
2610                 kfree(adapter->msix_entries);
2611                 adapter->msix_entries = NULL;
2612         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2613                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2614                 pci_disable_msi(adapter->pdev);
2615         }
2616         return;
2617 }
2618
2619 /**
2620  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2621  * @adapter: board private structure to initialize
2622  *
2623  * We determine which interrupt scheme to use based on...
2624  * - Kernel support (MSI, MSI-X)
2625  *   - which can be user-defined (via MODULE_PARAM)
2626  * - Hardware queue count (num_*_queues)
2627  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2628  **/
2629 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2630 {
2631         int err;
2632
2633         /* Number of supported queues */
2634         ixgbe_set_num_queues(adapter);
2635
2636         err = ixgbe_alloc_queues(adapter);
2637         if (err) {
2638                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2639                 goto err_alloc_queues;
2640         }
2641
2642         err = ixgbe_set_interrupt_capability(adapter);
2643         if (err) {
2644                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2645                 goto err_set_interrupt;
2646         }
2647
2648         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2649                 "Tx Queue count = %u\n",
2650                 (adapter->num_rx_queues > 1) ? "Enabled" :
2651                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2652
2653         set_bit(__IXGBE_DOWN, &adapter->state);
2654
2655         return 0;
2656
2657 err_set_interrupt:
2658         kfree(adapter->tx_ring);
2659         kfree(adapter->rx_ring);
2660 err_alloc_queues:
2661         return err;
2662 }
2663
2664 /**
2665  * ixgbe_sfp_timer - worker thread to find a missing module
2666  * @data: pointer to our adapter struct
2667  **/
2668 static void ixgbe_sfp_timer(unsigned long data)
2669 {
2670         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2671
2672         /* Do the sfp_timer outside of interrupt context due to the
2673          * delays that sfp+ detection requires
2674          */
2675         schedule_work(&adapter->sfp_task);
2676 }
2677
2678 /**
2679  * ixgbe_sfp_task - worker thread to find a missing module
2680  * @work: pointer to work_struct containing our data
2681  **/
2682 static void ixgbe_sfp_task(struct work_struct *work)
2683 {
2684         struct ixgbe_adapter *adapter = container_of(work,
2685                                                      struct ixgbe_adapter,
2686                                                      sfp_task);
2687         struct ixgbe_hw *hw = &adapter->hw;
2688
2689         if ((hw->phy.type == ixgbe_phy_nl) &&
2690             (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
2691                 s32 ret = hw->phy.ops.identify_sfp(hw);
2692                 if (ret)
2693                         goto reschedule;
2694                 ret = hw->phy.ops.reset(hw);
2695                 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
2696                         DPRINTK(PROBE, ERR, "failed to initialize because an "
2697                                 "unsupported SFP+ module type was detected.\n"
2698                                 "Reload the driver after installing a "
2699                                 "supported module.\n");
2700                         unregister_netdev(adapter->netdev);
2701                 } else {
2702                         DPRINTK(PROBE, INFO, "detected SFP+: %d\n",
2703                                 hw->phy.sfp_type);
2704                 }
2705                 /* don't need this routine any more */
2706                 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
2707         }
2708         return;
2709 reschedule:
2710         if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
2711                 mod_timer(&adapter->sfp_timer,
2712                           round_jiffies(jiffies + (2 * HZ)));
2713 }
2714
2715 /**
2716  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2717  * @adapter: board private structure to initialize
2718  *
2719  * ixgbe_sw_init initializes the Adapter private data structure.
2720  * Fields are initialized based on PCI device information and
2721  * OS network device settings (MTU size).
2722  **/
2723 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2724 {
2725         struct ixgbe_hw *hw = &adapter->hw;
2726         struct pci_dev *pdev = adapter->pdev;
2727         unsigned int rss;
2728 #ifdef CONFIG_IXGBE_DCB
2729         int j;
2730         struct tc_configuration *tc;
2731 #endif
2732
2733         /* PCI config space info */
2734
2735         hw->vendor_id = pdev->vendor;
2736         hw->device_id = pdev->device;
2737         hw->revision_id = pdev->revision;
2738         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2739         hw->subsystem_device_id = pdev->subsystem_device;
2740
2741         /* Set capability flags */
2742         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2743         adapter->ring_feature[RING_F_RSS].indices = rss;
2744         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2745         adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
2746
2747 #ifdef CONFIG_IXGBE_DCB
2748         /* Configure DCB traffic classes */
2749         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
2750                 tc = &adapter->dcb_cfg.tc_config[j];
2751                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
2752                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
2753                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
2754                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
2755                 tc->dcb_pfc = pfc_disabled;
2756         }
2757         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
2758         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
2759         adapter->dcb_cfg.rx_pba_cfg = pba_equal;
2760         adapter->dcb_cfg.round_robin_enable = false;
2761         adapter->dcb_set_bitmap = 0x00;
2762         ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
2763                            adapter->ring_feature[RING_F_DCB].indices);
2764
2765 #endif
2766         if (hw->mac.ops.get_media_type &&
2767             (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper))
2768                 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
2769
2770         /* default flow control settings */
2771         hw->fc.original_type = ixgbe_fc_none;
2772         hw->fc.type = ixgbe_fc_none;
2773         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2774         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2775         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2776         hw->fc.send_xon = true;
2777
2778         /* select 10G link by default */
2779         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2780
2781         /* enable itr by default in dynamic mode */
2782         adapter->itr_setting = 1;
2783         adapter->eitr_param = 20000;
2784
2785         /* set defaults for eitr in MegaBytes */
2786         adapter->eitr_low = 10;
2787         adapter->eitr_high = 20;
2788
2789         /* set default ring sizes */
2790         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
2791         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
2792
2793         /* initialize eeprom parameters */
2794         if (ixgbe_init_eeprom_params_generic(hw)) {
2795                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2796                 return -EIO;
2797         }
2798
2799         /* enable rx csum by default */
2800         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2801
2802         set_bit(__IXGBE_DOWN, &adapter->state);
2803
2804         return 0;
2805 }
2806
2807 /**
2808  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2809  * @adapter: board private structure
2810  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
2811  *
2812  * Return 0 on success, negative on failure
2813  **/
2814 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2815                              struct ixgbe_ring *tx_ring)
2816 {
2817         struct pci_dev *pdev = adapter->pdev;
2818         int size;
2819
2820         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2821         tx_ring->tx_buffer_info = vmalloc(size);
2822         if (!tx_ring->tx_buffer_info)
2823                 goto err;
2824         memset(tx_ring->tx_buffer_info, 0, size);
2825
2826         /* round up to nearest 4K */
2827         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2828                         sizeof(u32);
2829         tx_ring->size = ALIGN(tx_ring->size, 4096);
2830
2831         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2832                                              &tx_ring->dma);
2833         if (!tx_ring->desc)
2834                 goto err;
2835
2836         tx_ring->next_to_use = 0;
2837         tx_ring->next_to_clean = 0;
2838         tx_ring->work_limit = tx_ring->count;
2839         return 0;
2840
2841 err:
2842         vfree(tx_ring->tx_buffer_info);
2843         tx_ring->tx_buffer_info = NULL;
2844         DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2845                             "descriptor ring\n");
2846         return -ENOMEM;
2847 }
2848
2849 /**
2850  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2851  * @adapter: board private structure
2852  *
2853  * If this function returns with an error, then it's possible one or
2854  * more of the rings is populated (while the rest are not).  It is the
2855  * callers duty to clean those orphaned rings.
2856  *
2857  * Return 0 on success, negative on failure
2858  **/
2859 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2860 {
2861         int i, err = 0;
2862
2863         for (i = 0; i < adapter->num_tx_queues; i++) {
2864                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2865                 if (!err)
2866                         continue;
2867                 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
2868                 break;
2869         }
2870
2871         return err;
2872 }
2873
2874 /**
2875  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2876  * @adapter: board private structure
2877  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2878  *
2879  * Returns 0 on success, negative on failure
2880  **/
2881 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2882                              struct ixgbe_ring *rx_ring)
2883 {
2884         struct pci_dev *pdev = adapter->pdev;
2885         int size;
2886
2887         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2888         rx_ring->rx_buffer_info = vmalloc(size);
2889         if (!rx_ring->rx_buffer_info) {
2890                 DPRINTK(PROBE, ERR,
2891                         "vmalloc allocation failed for the rx desc ring\n");
2892                 goto alloc_failed;
2893         }
2894         memset(rx_ring->rx_buffer_info, 0, size);
2895
2896         /* Round up to nearest 4K */
2897         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2898         rx_ring->size = ALIGN(rx_ring->size, 4096);
2899
2900         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2901
2902         if (!rx_ring->desc) {
2903                 DPRINTK(PROBE, ERR,
2904                         "Memory allocation failed for the rx desc ring\n");
2905                 vfree(rx_ring->rx_buffer_info);
2906                 goto alloc_failed;
2907         }
2908
2909         rx_ring->next_to_clean = 0;
2910         rx_ring->next_to_use = 0;
2911
2912         return 0;
2913
2914 alloc_failed:
2915         return -ENOMEM;
2916 }
2917
2918 /**
2919  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2920  * @adapter: board private structure
2921  *
2922  * If this function returns with an error, then it's possible one or
2923  * more of the rings is populated (while the rest are not).  It is the
2924  * callers duty to clean those orphaned rings.
2925  *
2926  * Return 0 on success, negative on failure
2927  **/
2928
2929 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2930 {
2931         int i, err = 0;
2932
2933         for (i = 0; i < adapter->num_rx_queues; i++) {
2934                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2935                 if (!err)
2936                         continue;
2937                 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
2938                 break;
2939         }
2940
2941         return err;
2942 }
2943
2944 /**
2945  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2946  * @adapter: board private structure
2947  * @tx_ring: Tx descriptor ring for a specific queue
2948  *
2949  * Free all transmit software resources
2950  **/
2951 void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2952                              struct ixgbe_ring *tx_ring)
2953 {
2954         struct pci_dev *pdev = adapter->pdev;
2955
2956         ixgbe_clean_tx_ring(adapter, tx_ring);
2957
2958         vfree(tx_ring->tx_buffer_info);
2959         tx_ring->tx_buffer_info = NULL;
2960
2961         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2962
2963         tx_ring->desc = NULL;
2964 }
2965
2966 /**
2967  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2968  * @adapter: board private structure
2969  *
2970  * Free all transmit software resources
2971  **/
2972 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2973 {
2974         int i;
2975
2976         for (i = 0; i < adapter->num_tx_queues; i++)
2977                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
2978 }
2979
2980 /**
2981  * ixgbe_free_rx_resources - Free Rx Resources
2982  * @adapter: board private structure
2983  * @rx_ring: ring to clean the resources from
2984  *
2985  * Free all receive software resources
2986  **/
2987 void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2988                              struct ixgbe_ring *rx_ring)
2989 {
2990         struct pci_dev *pdev = adapter->pdev;
2991
2992         ixgbe_clean_rx_ring(adapter, rx_ring);
2993
2994         vfree(rx_ring->rx_buffer_info);
2995         rx_ring->rx_buffer_info = NULL;
2996
2997         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2998
2999         rx_ring->desc = NULL;
3000 }
3001
3002 /**
3003  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
3004  * @adapter: board private structure
3005  *
3006  * Free all receive software resources
3007  **/
3008 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
3009 {
3010         int i;
3011
3012         for (i = 0; i < adapter->num_rx_queues; i++)
3013                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
3014 }
3015
3016 /**
3017  * ixgbe_change_mtu - Change the Maximum Transfer Unit
3018  * @netdev: network interface device structure
3019  * @new_mtu: new value for maximum frame size
3020  *
3021  * Returns 0 on success, negative on failure
3022  **/
3023 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
3024 {
3025         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3026         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3027
3028         /* MTU < 68 is an error and causes problems on some kernels */
3029         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
3030                 return -EINVAL;
3031
3032         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
3033                 netdev->mtu, new_mtu);
3034         /* must set new MTU before calling down or up */
3035         netdev->mtu = new_mtu;
3036
3037         if (netif_running(netdev))
3038                 ixgbe_reinit_locked(adapter);
3039
3040         return 0;
3041 }
3042
3043 /**
3044  * ixgbe_open - Called when a network interface is made active
3045  * @netdev: network interface device structure
3046  *
3047  * Returns 0 on success, negative value on failure
3048  *
3049  * The open entry point is called when a network interface is made
3050  * active by the system (IFF_UP).  At this point all resources needed
3051  * for transmit and receive operations are allocated, the interrupt
3052  * handler is registered with the OS, the watchdog timer is started,
3053  * and the stack is notified that the interface is ready.
3054  **/
3055 static int ixgbe_open(struct net_device *netdev)
3056 {
3057         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3058         int err;
3059
3060         /* disallow open during test */
3061         if (test_bit(__IXGBE_TESTING, &adapter->state))
3062                 return -EBUSY;
3063
3064         /* allocate transmit descriptors */
3065         err = ixgbe_setup_all_tx_resources(adapter);
3066         if (err)
3067                 goto err_setup_tx;
3068
3069         /* allocate receive descriptors */
3070         err = ixgbe_setup_all_rx_resources(adapter);
3071         if (err)
3072                 goto err_setup_rx;
3073
3074         ixgbe_configure(adapter);
3075
3076         err = ixgbe_request_irq(adapter);
3077         if (err)
3078                 goto err_req_irq;
3079
3080         err = ixgbe_up_complete(adapter);
3081         if (err)
3082                 goto err_up;
3083
3084         netif_tx_start_all_queues(netdev);
3085
3086         return 0;
3087
3088 err_up:
3089         ixgbe_release_hw_control(adapter);
3090         ixgbe_free_irq(adapter);
3091 err_req_irq:
3092         ixgbe_free_all_rx_resources(adapter);
3093 err_setup_rx:
3094         ixgbe_free_all_tx_resources(adapter);
3095 err_setup_tx:
3096         ixgbe_reset(adapter);
3097
3098         return err;
3099 }
3100
3101 /**
3102  * ixgbe_close - Disables a network interface
3103  * @netdev: network interface device structure
3104  *
3105  * Returns 0, this is not allowed to fail
3106  *
3107  * The close entry point is called when an interface is de-activated
3108  * by the OS.  The hardware is still under the drivers control, but
3109  * needs to be disabled.  A global MAC reset is issued to stop the
3110  * hardware, and all transmit and receive resources are freed.
3111  **/
3112 static int ixgbe_close(struct net_device *netdev)
3113 {
3114         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3115
3116         ixgbe_down(adapter);
3117         ixgbe_free_irq(adapter);
3118
3119         ixgbe_free_all_tx_resources(adapter);
3120         ixgbe_free_all_rx_resources(adapter);
3121
3122         ixgbe_release_hw_control(adapter);
3123
3124         return 0;
3125 }
3126
3127 /**
3128  * ixgbe_napi_add_all - prep napi structs for use
3129  * @adapter: private struct
3130  * helper function to napi_add each possible q_vector->napi
3131  */
3132 void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3133 {
3134         int q_idx, q_vectors;
3135         struct net_device *netdev = adapter->netdev;
3136         int (*poll)(struct napi_struct *, int);
3137
3138         /* check if we already have our netdev->napi_list populated */
3139         if (&netdev->napi_list != netdev->napi_list.next)
3140                 return;
3141
3142         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3143                 poll = &ixgbe_clean_rxonly;
3144                 /* Only enable as many vectors as we have rx queues. */
3145                 q_vectors = adapter->num_rx_queues;
3146         } else {
3147                 poll = &ixgbe_poll;
3148                 /* only one q_vector for legacy modes */
3149                 q_vectors = 1;
3150         }
3151
3152         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3153                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3154                 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
3155         }
3156 }
3157
3158 void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
3159 {
3160         int q_idx;
3161         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3162
3163         /* legacy and MSI only use one vector */
3164         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3165                 q_vectors = 1;
3166
3167         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3168                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3169                 if (!q_vector->rxr_count)
3170                         continue;
3171                 netif_napi_del(&q_vector->napi);
3172         }
3173 }
3174
3175 #ifdef CONFIG_PM
3176 static int ixgbe_resume(struct pci_dev *pdev)
3177 {
3178         struct net_device *netdev = pci_get_drvdata(pdev);
3179         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3180         u32 err;
3181
3182         pci_set_power_state(pdev, PCI_D0);
3183         pci_restore_state(pdev);
3184         err = pci_enable_device(pdev);
3185         if (err) {
3186                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
3187                                 "suspend\n");
3188                 return err;
3189         }
3190         pci_set_master(pdev);
3191
3192         pci_enable_wake(pdev, PCI_D3hot, 0);
3193         pci_enable_wake(pdev, PCI_D3cold, 0);
3194
3195         err = ixgbe_init_interrupt_scheme(adapter);
3196         if (err) {
3197                 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
3198                                 "device\n");
3199                 return err;
3200         }
3201
3202         ixgbe_napi_add_all(adapter);
3203         ixgbe_reset(adapter);
3204
3205         if (netif_running(netdev)) {
3206                 err = ixgbe_open(adapter->netdev);
3207                 if (err)
3208                         return err;
3209         }
3210
3211         netif_device_attach(netdev);
3212
3213         return 0;
3214 }
3215
3216 #endif /* CONFIG_PM */
3217 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
3218 {
3219         struct net_device *netdev = pci_get_drvdata(pdev);
3220         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3221 #ifdef CONFIG_PM
3222         int retval = 0;
3223 #endif
3224
3225         netif_device_detach(netdev);
3226
3227         if (netif_running(netdev)) {
3228                 ixgbe_down(adapter);
3229                 ixgbe_free_irq(adapter);
3230                 ixgbe_free_all_tx_resources(adapter);
3231                 ixgbe_free_all_rx_resources(adapter);
3232         }
3233         ixgbe_reset_interrupt_capability(adapter);
3234         ixgbe_napi_del_all(adapter);
3235         INIT_LIST_HEAD(&netdev->napi_list);
3236         kfree(adapter->tx_ring);
3237         kfree(adapter->rx_ring);
3238
3239 #ifdef CONFIG_PM
3240         retval = pci_save_state(pdev);
3241         if (retval)
3242                 return retval;
3243 #endif
3244
3245         pci_enable_wake(pdev, PCI_D3hot, 0);
3246         pci_enable_wake(pdev, PCI_D3cold, 0);
3247
3248         ixgbe_release_hw_control(adapter);
3249
3250         pci_disable_device(pdev);
3251
3252         pci_set_power_state(pdev, pci_choose_state(pdev, state));
3253
3254         return 0;
3255 }
3256
3257 static void ixgbe_shutdown(struct pci_dev *pdev)
3258 {
3259         ixgbe_suspend(pdev, PMSG_SUSPEND);
3260 }
3261
3262 /**
3263  * ixgbe_update_stats - Update the board statistics counters.
3264  * @adapter: board private structure
3265  **/
3266 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3267 {
3268         struct ixgbe_hw *hw = &adapter->hw;
3269         u64 total_mpc = 0;
3270         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
3271
3272         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
3273         for (i = 0; i < 8; i++) {
3274                 /* for packet buffers not used, the register should read 0 */
3275                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
3276                 missed_rx += mpc;
3277                 adapter->stats.mpc[i] += mpc;
3278                 total_mpc += adapter->stats.mpc[i];
3279                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
3280                 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
3281                 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
3282                 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
3283                 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
3284                 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
3285                                                             IXGBE_PXONRXC(i));
3286                 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
3287                                                             IXGBE_PXONTXC(i));
3288                 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
3289                                                             IXGBE_PXOFFRXC(i));
3290                 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
3291                                                             IXGBE_PXOFFTXC(i));
3292         }
3293         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
3294         /* work around hardware counting issue */
3295         adapter->stats.gprc -= missed_rx;
3296
3297         /* 82598 hardware only has a 32 bit counter in the high register */
3298         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
3299         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
3300         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
3301         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
3302         adapter->stats.bprc += bprc;
3303         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
3304         adapter->stats.mprc -= bprc;
3305         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
3306         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
3307         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
3308         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
3309         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
3310         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
3311         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
3312         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
3313         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
3314         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
3315         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
3316         adapter->stats.lxontxc += lxon;
3317         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
3318         adapter->stats.lxofftxc += lxoff;
3319         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3320         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
3321         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
3322         /*
3323          * 82598 errata - tx of flow control packets is included in tx counters
3324          */
3325         xon_off_tot = lxon + lxoff;
3326         adapter->stats.gptc -= xon_off_tot;
3327         adapter->stats.mptc -= xon_off_tot;
3328         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
3329         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3330         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
3331         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
3332         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3333         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3334         adapter->stats.ptc64 -= xon_off_tot;
3335         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3336         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3337         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3338         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3339         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3340         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3341
3342         /* Fill out the OS statistics structure */
3343         adapter->net_stats.multicast = adapter->stats.mprc;
3344
3345         /* Rx Errors */
3346         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3347                                        adapter->stats.rlec;
3348         adapter->net_stats.rx_dropped = 0;
3349         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3350         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3351         adapter->net_stats.rx_missed_errors = total_mpc;
3352 }
3353
3354 /**
3355  * ixgbe_watchdog - Timer Call-back
3356  * @data: pointer to adapter cast into an unsigned long
3357  **/
3358 static void ixgbe_watchdog(unsigned long data)
3359 {
3360         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3361         struct ixgbe_hw *hw = &adapter->hw;
3362
3363         /* Do the watchdog outside of interrupt context due to the lovely
3364          * delays that some of the newer hardware requires */
3365         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3366                 /* Cause software interrupt to ensure rx rings are cleaned */
3367                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3368                         u32 eics =
3369                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3370                         IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3371                 } else {
3372                         /* For legacy and MSI interrupts don't set any bits that
3373                          * are enabled for EIAM, because this operation would
3374                          * set *both* EIMS and EICS for any bit in EIAM */
3375                         IXGBE_WRITE_REG(hw, IXGBE_EICS,
3376                                     (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3377                 }
3378                 /* Reset the timer */
3379                 mod_timer(&adapter->watchdog_timer,
3380                           round_jiffies(jiffies + 2 * HZ));
3381         }
3382
3383         schedule_work(&adapter->watchdog_task);
3384 }
3385
3386 /**
3387  * ixgbe_watchdog_task - worker thread to bring link up
3388  * @work: pointer to work_struct containing our data
3389  **/
3390 static void ixgbe_watchdog_task(struct work_struct *work)
3391 {
3392         struct ixgbe_adapter *adapter = container_of(work,
3393                                                      struct ixgbe_adapter,
3394                                                      watchdog_task);
3395         struct net_device *netdev = adapter->netdev;
3396         struct ixgbe_hw *hw = &adapter->hw;
3397         u32 link_speed = adapter->link_speed;
3398         bool link_up = adapter->link_up;
3399
3400         adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3401
3402         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3403                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3404                 if (link_up ||
3405                     time_after(jiffies, (adapter->link_check_timeout +
3406                                          IXGBE_TRY_LINK_TIMEOUT))) {
3407                         IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3408                         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3409                 }
3410                 adapter->link_up = link_up;
3411                 adapter->link_speed = link_speed;
3412         }
3413
3414         if (link_up) {
3415                 if (!netif_carrier_ok(netdev)) {
3416                         u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3417                         u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3418 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3419 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3420                         printk(KERN_INFO "ixgbe: %s NIC Link is Up %s, "
3421                                "Flow Control: %s\n",
3422                                netdev->name,
3423                                (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3424                                 "10 Gbps" :
3425                                 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3426                                  "1 Gbps" : "unknown speed")),
3427                                ((FLOW_RX && FLOW_TX) ? "RX/TX" :
3428                                 (FLOW_RX ? "RX" :
3429                                 (FLOW_TX ? "TX" : "None"))));
3430
3431                         netif_carrier_on(netdev);
3432                 } else {
3433                         /* Force detection of hung controller */
3434                         adapter->detect_tx_hung = true;
3435                 }
3436         } else {
3437                 adapter->link_up = false;
3438                 adapter->link_speed = 0;
3439                 if (netif_carrier_ok(netdev)) {
3440                         printk(KERN_INFO "ixgbe: %s NIC Link is Down\n",
3441                                netdev->name);
3442                         netif_carrier_off(netdev);
3443                 }
3444         }
3445
3446         ixgbe_update_stats(adapter);
3447         adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3448 }
3449
3450 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3451                      struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3452                      u32 tx_flags, u8 *hdr_len)
3453 {
3454         struct ixgbe_adv_tx_context_desc *context_desc;
3455         unsigned int i;
3456         int err;
3457         struct ixgbe_tx_buffer *tx_buffer_info;
3458         u32 vlan_macip_lens = 0, type_tucmd_mlhl;
3459         u32 mss_l4len_idx, l4len;
3460
3461         if (skb_is_gso(skb)) {
3462                 if (skb_header_cloned(skb)) {
3463                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3464                         if (err)
3465                                 return err;
3466                 }
3467                 l4len = tcp_hdrlen(skb);
3468                 *hdr_len += l4len;
3469
3470                 if (skb->protocol == htons(ETH_P_IP)) {
3471                         struct iphdr *iph = ip_hdr(skb);
3472                         iph->tot_len = 0;
3473                         iph->check = 0;
3474                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3475                                                                  iph->daddr, 0,
3476                                                                  IPPROTO_TCP,
3477                                                                  0);
3478                         adapter->hw_tso_ctxt++;
3479                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3480                         ipv6_hdr(skb)->payload_len = 0;
3481                         tcp_hdr(skb)->check =
3482                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3483                                              &ipv6_hdr(skb)->daddr,
3484                                              0, IPPROTO_TCP, 0);
3485                         adapter->hw_tso6_ctxt++;
3486                 }
3487
3488                 i = tx_ring->next_to_use;
3489
3490                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3491                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3492
3493                 /* VLAN MACLEN IPLEN */
3494                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3495                         vlan_macip_lens |=
3496                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3497                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3498                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3499                 *hdr_len += skb_network_offset(skb);
3500                 vlan_macip_lens |=
3501                     (skb_transport_header(skb) - skb_network_header(skb));
3502                 *hdr_len +=
3503                     (skb_transport_header(skb) - skb_network_header(skb));
3504                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3505                 context_desc->seqnum_seed = 0;
3506
3507                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3508                 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
3509                                    IXGBE_ADVTXD_DTYP_CTXT);
3510
3511                 if (skb->protocol == htons(ETH_P_IP))
3512                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3513                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3514                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3515
3516                 /* MSS L4LEN IDX */
3517                 mss_l4len_idx =
3518                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3519                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3520                 /* use index 1 for TSO */
3521                 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3522                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3523
3524                 tx_buffer_info->time_stamp = jiffies;
3525                 tx_buffer_info->next_to_watch = i;
3526
3527                 i++;
3528                 if (i == tx_ring->count)
3529                         i = 0;
3530                 tx_ring->next_to_use = i;
3531
3532                 return true;
3533         }
3534         return false;
3535 }
3536
3537 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3538                           struct ixgbe_ring *tx_ring,
3539                           struct sk_buff *skb, u32 tx_flags)
3540 {
3541         struct ixgbe_adv_tx_context_desc *context_desc;
3542         unsigned int i;
3543         struct ixgbe_tx_buffer *tx_buffer_info;
3544         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3545
3546         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3547             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3548                 i = tx_ring->next_to_use;
3549                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3550                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3551
3552                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3553                         vlan_macip_lens |=
3554                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3555                 vlan_macip_lens |= (skb_network_offset(skb) <<
3556                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3557                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3558                         vlan_macip_lens |= (skb_transport_header(skb) -
3559                                             skb_network_header(skb));
3560
3561                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3562                 context_desc->seqnum_seed = 0;
3563
3564                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3565                                     IXGBE_ADVTXD_DTYP_CTXT);
3566
3567                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3568                         switch (skb->protocol) {
3569                         case __constant_htons(ETH_P_IP):
3570                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3571                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3572                                         type_tucmd_mlhl |=
3573                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3574                                 break;
3575                         case __constant_htons(ETH_P_IPV6):
3576                                 /* XXX what about other V6 headers?? */
3577                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3578                                         type_tucmd_mlhl |=
3579                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3580                                 break;
3581                         default:
3582                                 if (unlikely(net_ratelimit())) {
3583                                         DPRINTK(PROBE, WARNING,
3584                                          "partial checksum but proto=%x!\n",
3585                                          skb->protocol);
3586                                 }
3587                                 break;
3588                         }
3589                 }
3590
3591                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3592                 /* use index zero for tx checksum offload */
3593                 context_desc->mss_l4len_idx = 0;
3594
3595                 tx_buffer_info->time_stamp = jiffies;
3596                 tx_buffer_info->next_to_watch = i;
3597
3598                 adapter->hw_csum_tx_good++;
3599                 i++;
3600                 if (i == tx_ring->count)
3601                         i = 0;
3602                 tx_ring->next_to_use = i;
3603
3604                 return true;
3605         }
3606
3607         return false;
3608 }
3609
3610 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3611                         struct ixgbe_ring *tx_ring,
3612                         struct sk_buff *skb, unsigned int first)
3613 {
3614         struct ixgbe_tx_buffer *tx_buffer_info;
3615         unsigned int len = skb->len;
3616         unsigned int offset = 0, size, count = 0, i;
3617         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3618         unsigned int f;
3619
3620         len -= skb->data_len;
3621
3622         i = tx_ring->next_to_use;
3623
3624         while (len) {
3625                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3626                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3627
3628                 tx_buffer_info->length = size;
3629                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3630                                                      skb->data + offset,
3631                                                      size, PCI_DMA_TODEVICE);
3632                 tx_buffer_info->time_stamp = jiffies;
3633                 tx_buffer_info->next_to_watch = i;
3634
3635                 len -= size;
3636                 offset += size;
3637                 count++;
3638                 i++;
3639                 if (i == tx_ring->count)
3640                         i = 0;
3641         }
3642
3643         for (f = 0; f < nr_frags; f++) {
3644                 struct skb_frag_struct *frag;
3645
3646                 frag = &skb_shinfo(skb)->frags[f];
3647                 len = frag->size;
3648                 offset = frag->page_offset;
3649
3650                 while (len) {
3651                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3652                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3653
3654                         tx_buffer_info->length = size;
3655                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3656                                                            frag->page,
3657                                                            offset,
3658                                                            size,
3659                                                            PCI_DMA_TODEVICE);
3660                         tx_buffer_info->time_stamp = jiffies;
3661                         tx_buffer_info->next_to_watch = i;
3662
3663                         len -= size;
3664                         offset += size;
3665                         count++;
3666                         i++;
3667                         if (i == tx_ring->count)
3668                                 i = 0;
3669                 }
3670         }
3671         if (i == 0)
3672                 i = tx_ring->count - 1;
3673         else
3674                 i = i - 1;
3675         tx_ring->tx_buffer_info[i].skb = skb;
3676         tx_ring->tx_buffer_info[first].next_to_watch = i;
3677
3678         return count;
3679 }
3680
3681 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3682                            struct ixgbe_ring *tx_ring,
3683                            int tx_flags, int count, u32 paylen, u8 hdr_len)
3684 {
3685         union ixgbe_adv_tx_desc *tx_desc = NULL;
3686         struct ixgbe_tx_buffer *tx_buffer_info;
3687         u32 olinfo_status = 0, cmd_type_len = 0;
3688         unsigned int i;
3689         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3690
3691         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3692
3693         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3694
3695         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3696                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3697
3698         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3699                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3700
3701                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3702                                  IXGBE_ADVTXD_POPTS_SHIFT;
3703
3704                 /* use index 1 context for tso */
3705                 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3706                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3707                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3708                                          IXGBE_ADVTXD_POPTS_SHIFT;
3709
3710         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3711                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3712                                  IXGBE_ADVTXD_POPTS_SHIFT;
3713
3714         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3715
3716         i = tx_ring->next_to_use;
3717         while (count--) {
3718                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3719                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3720                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3721                 tx_desc->read.cmd_type_len =
3722                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3723                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3724                 i++;
3725                 if (i == tx_ring->count)
3726                         i = 0;
3727         }
3728
3729         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3730
3731         /*
3732          * Force memory writes to complete before letting h/w
3733          * know there are new descriptors to fetch.  (Only
3734          * applicable for weak-ordered memory model archs,
3735          * such as IA-64).
3736          */
3737         wmb();
3738
3739         tx_ring->next_to_use = i;
3740         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3741 }
3742
3743 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3744                                  struct ixgbe_ring *tx_ring, int size)
3745 {
3746         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3747
3748         netif_stop_subqueue(netdev, tx_ring->queue_index);
3749         /* Herbert's original patch had:
3750          *  smp_mb__after_netif_stop_queue();
3751          * but since that doesn't exist yet, just open code it. */
3752         smp_mb();
3753
3754         /* We need to check again in a case another CPU has just
3755          * made room available. */
3756         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3757                 return -EBUSY;
3758
3759         /* A reprieve! - use start_queue because it doesn't call schedule */
3760         netif_start_subqueue(netdev, tx_ring->queue_index);
3761         ++adapter->restart_queue;
3762         return 0;
3763 }
3764
3765 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3766                               struct ixgbe_ring *tx_ring, int size)
3767 {
3768         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3769                 return 0;
3770         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3771 }
3772
3773 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3774 {
3775         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3776         struct ixgbe_ring *tx_ring;
3777         unsigned int first;
3778         unsigned int tx_flags = 0;
3779         u8 hdr_len = 0;
3780         int r_idx = 0, tso;
3781         int count = 0;
3782         unsigned int f;
3783
3784         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3785         tx_ring = &adapter->tx_ring[r_idx];
3786
3787         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3788                 tx_flags |= vlan_tx_tag_get(skb);
3789                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3790                         tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
3791                         tx_flags |= (skb->queue_mapping << 13);
3792                 }
3793                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3794                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3795         } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3796                 tx_flags |= (skb->queue_mapping << 13);
3797                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3798                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3799         }
3800         /* three things can cause us to need a context descriptor */
3801         if (skb_is_gso(skb) ||
3802             (skb->ip_summed == CHECKSUM_PARTIAL) ||
3803             (tx_flags & IXGBE_TX_FLAGS_VLAN))
3804                 count++;
3805
3806         count += TXD_USE_COUNT(skb_headlen(skb));
3807         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3808                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3809
3810         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3811                 adapter->tx_busy++;
3812                 return NETDEV_TX_BUSY;
3813         }
3814
3815         if (skb->protocol == htons(ETH_P_IP))
3816                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3817         first = tx_ring->next_to_use;
3818         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3819         if (tso < 0) {
3820                 dev_kfree_skb_any(skb);
3821                 return NETDEV_TX_OK;
3822         }
3823
3824         if (tso)
3825                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3826         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3827                  (skb->ip_summed == CHECKSUM_PARTIAL))
3828                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3829
3830         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3831                        ixgbe_tx_map(adapter, tx_ring, skb, first),
3832                        skb->len, hdr_len);
3833
3834         netdev->trans_start = jiffies;
3835
3836         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3837
3838         return NETDEV_TX_OK;
3839 }
3840
3841 /**
3842  * ixgbe_get_stats - Get System Network Statistics
3843  * @netdev: network interface device structure
3844  *
3845  * Returns the address of the device statistics structure.
3846  * The statistics are actually updated from the timer callback.
3847  **/
3848 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3849 {
3850         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3851
3852         /* only return the current stats */
3853         return &adapter->net_stats;
3854 }
3855
3856 /**
3857  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3858  * @netdev: network interface device structure
3859  * @p: pointer to an address structure
3860  *
3861  * Returns 0 on success, negative on failure
3862  **/
3863 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3864 {
3865         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3866         struct ixgbe_hw *hw = &adapter->hw;
3867         struct sockaddr *addr = p;
3868
3869         if (!is_valid_ether_addr(addr->sa_data))
3870                 return -EADDRNOTAVAIL;
3871
3872         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3873         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3874
3875         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
3876
3877         return 0;
3878 }
3879
3880 #ifdef CONFIG_NET_POLL_CONTROLLER
3881 /*
3882  * Polling 'interrupt' - used by things like netconsole to send skbs
3883  * without having to re-enable interrupts. It's not called while
3884  * the interrupt routine is executing.
3885  */
3886 static void ixgbe_netpoll(struct net_device *netdev)
3887 {
3888         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3889
3890         disable_irq(adapter->pdev->irq);
3891         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3892         ixgbe_intr(adapter->pdev->irq, netdev);
3893         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3894         enable_irq(adapter->pdev->irq);
3895 }
3896 #endif
3897
3898 /**
3899  * ixgbe_link_config - set up initial link with default speed and duplex
3900  * @hw: pointer to private hardware struct
3901  *
3902  * Returns 0 on success, negative on failure
3903  **/
3904 static int ixgbe_link_config(struct ixgbe_hw *hw)
3905 {
3906         u32 autoneg;
3907         bool link_up = false;
3908         u32 ret = IXGBE_ERR_LINK_SETUP;
3909
3910         if (hw->mac.ops.check_link)
3911                 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
3912
3913         if (ret || !link_up)
3914                 goto link_cfg_out;
3915
3916         if (hw->mac.ops.get_link_capabilities)
3917                 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
3918                                                         &hw->mac.autoneg);
3919         if (ret)
3920                 goto link_cfg_out;
3921
3922         if (hw->mac.ops.setup_link_speed)
3923                 ret = hw->mac.ops.setup_link_speed(hw, autoneg, true, true);
3924
3925 link_cfg_out:
3926         return ret;
3927 }
3928
3929 static const struct net_device_ops ixgbe_netdev_ops = {
3930         .ndo_open               = ixgbe_open,
3931         .ndo_stop               = ixgbe_close,
3932         .ndo_start_xmit         = ixgbe_xmit_frame,
3933         .ndo_get_stats          = ixgbe_get_stats,
3934         .ndo_set_multicast_list = ixgbe_set_rx_mode,
3935         .ndo_validate_addr      = eth_validate_addr,
3936         .ndo_set_mac_address    = ixgbe_set_mac,
3937         .ndo_change_mtu         = ixgbe_change_mtu,
3938         .ndo_tx_timeout         = ixgbe_tx_timeout,
3939         .ndo_vlan_rx_register   = ixgbe_vlan_rx_register,
3940         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
3941         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
3942 #ifdef CONFIG_NET_POLL_CONTROLLER
3943         .ndo_poll_controller    = ixgbe_netpoll,
3944 #endif
3945 };
3946
3947 /**
3948  * ixgbe_probe - Device Initialization Routine
3949  * @pdev: PCI device information struct
3950  * @ent: entry in ixgbe_pci_tbl
3951  *
3952  * Returns 0 on success, negative on failure
3953  *
3954  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3955  * The OS initialization, configuring of the adapter private structure,
3956  * and a hardware reset occur.
3957  **/
3958 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3959                                  const struct pci_device_id *ent)
3960 {
3961         struct net_device *netdev;
3962         struct ixgbe_adapter *adapter = NULL;
3963         struct ixgbe_hw *hw;
3964         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3965         static int cards_found;
3966         int i, err, pci_using_dac;
3967         u16 link_status, link_speed, link_width;
3968         u32 part_num, eec;
3969
3970         err = pci_enable_device(pdev);
3971         if (err)
3972                 return err;
3973
3974         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3975             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3976                 pci_using_dac = 1;
3977         } else {
3978                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3979                 if (err) {
3980                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3981                         if (err) {
3982                                 dev_err(&pdev->dev, "No usable DMA "
3983                                         "configuration, aborting\n");
3984                                 goto err_dma;
3985                         }
3986                 }
3987                 pci_using_dac = 0;
3988         }
3989
3990         err = pci_request_regions(pdev, ixgbe_driver_name);
3991         if (err) {
3992                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3993                 goto err_pci_reg;
3994         }
3995
3996         err = pci_enable_pcie_error_reporting(pdev);
3997         if (err) {
3998                 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
3999                                     "0x%x\n", err);
4000                 /* non-fatal, continue */
4001         }
4002
4003         pci_set_master(pdev);
4004         pci_save_state(pdev);
4005
4006         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
4007         if (!netdev) {
4008                 err = -ENOMEM;
4009                 goto err_alloc_etherdev;
4010         }
4011
4012         SET_NETDEV_DEV(netdev, &pdev->dev);
4013
4014         pci_set_drvdata(pdev, netdev);
4015         adapter = netdev_priv(netdev);
4016
4017         adapter->netdev = netdev;
4018         adapter->pdev = pdev;
4019         hw = &adapter->hw;
4020         hw->back = adapter;
4021         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
4022
4023         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4024                               pci_resource_len(pdev, 0));
4025         if (!hw->hw_addr) {
4026                 err = -EIO;
4027                 goto err_ioremap;
4028         }
4029
4030         for (i = 1; i <= 5; i++) {
4031                 if (pci_resource_len(pdev, i) == 0)
4032                         continue;
4033         }
4034
4035         netdev->netdev_ops = &ixgbe_netdev_ops;
4036         ixgbe_set_ethtool_ops(netdev);
4037         netdev->watchdog_timeo = 5 * HZ;
4038         strcpy(netdev->name, pci_name(pdev));
4039
4040         adapter->bd_number = cards_found;
4041
4042         /* Setup hw api */
4043         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4044         hw->mac.type  = ii->mac;
4045
4046         /* EEPROM */
4047         memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
4048         eec = IXGBE_READ_REG(hw, IXGBE_EEC);
4049         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
4050         if (!(eec & (1 << 8)))
4051                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
4052
4053         /* PHY */
4054         memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
4055         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
4056
4057         /* set up this timer and work struct before calling get_invariants
4058          * which might start the timer
4059          */
4060         init_timer(&adapter->sfp_timer);
4061         adapter->sfp_timer.function = &ixgbe_sfp_timer;
4062         adapter->sfp_timer.data = (unsigned long) adapter;
4063
4064         INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
4065
4066         err = ii->get_invariants(hw);
4067         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
4068                 /* start a kernel thread to watch for a module to arrive */
4069                 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4070                 mod_timer(&adapter->sfp_timer,
4071                           round_jiffies(jiffies + (2 * HZ)));
4072                 err = 0;
4073         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4074                 DPRINTK(PROBE, ERR, "failed to load because an "
4075                         "unsupported SFP+ module type was detected.\n");
4076                 goto err_hw_init;
4077         } else if (err) {
4078                 goto err_hw_init;
4079         }
4080
4081         /* setup the private structure */
4082         err = ixgbe_sw_init(adapter);
4083         if (err)
4084                 goto err_sw_init;
4085
4086         /* reset_hw fills in the perm_addr as well */
4087         err = hw->mac.ops.reset_hw(hw);
4088         if (err) {
4089                 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
4090                 goto err_sw_init;
4091         }
4092
4093         netdev->features = NETIF_F_SG |
4094                            NETIF_F_IP_CSUM |
4095                            NETIF_F_HW_VLAN_TX |
4096                            NETIF_F_HW_VLAN_RX |
4097                            NETIF_F_HW_VLAN_FILTER;
4098
4099         netdev->features |= NETIF_F_IPV6_CSUM;
4100         netdev->features |= NETIF_F_TSO;
4101         netdev->features |= NETIF_F_TSO6;
4102         netdev->features |= NETIF_F_GRO;
4103
4104         netdev->vlan_features |= NETIF_F_TSO;
4105         netdev->vlan_features |= NETIF_F_TSO6;
4106         netdev->vlan_features |= NETIF_F_IP_CSUM;
4107         netdev->vlan_features |= NETIF_F_SG;
4108
4109         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
4110                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
4111
4112 #ifdef CONFIG_IXGBE_DCB
4113         netdev->dcbnl_ops = &dcbnl_ops;
4114 #endif
4115
4116         if (pci_using_dac)
4117                 netdev->features |= NETIF_F_HIGHDMA;
4118
4119         /* make sure the EEPROM is good */
4120         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
4121                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
4122                 err = -EIO;
4123                 goto err_eeprom;
4124         }
4125
4126         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
4127         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
4128
4129         if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
4130                 dev_err(&pdev->dev, "invalid MAC address\n");
4131                 err = -EIO;
4132                 goto err_eeprom;
4133         }
4134
4135         init_timer(&adapter->watchdog_timer);
4136         adapter->watchdog_timer.function = &ixgbe_watchdog;
4137         adapter->watchdog_timer.data = (unsigned long)adapter;
4138
4139         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
4140         INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
4141
4142         err = ixgbe_init_interrupt_scheme(adapter);
4143         if (err)
4144                 goto err_sw_init;
4145
4146         /* print bus type/speed/width info */
4147         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
4148         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
4149         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
4150         dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
4151                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
4152                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
4153                  "Unknown"),
4154                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
4155                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
4156                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
4157                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
4158                  "Unknown"),
4159                 netdev->dev_addr);
4160         ixgbe_read_pba_num_generic(hw, &part_num);
4161         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4162                  hw->mac.type, hw->phy.type,
4163                  (part_num >> 8), (part_num & 0xff));
4164
4165         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
4166                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
4167                          "this card is not sufficient for optimal "
4168                          "performance.\n");
4169                 dev_warn(&pdev->dev, "For optimal performance a x8 "
4170                          "PCI-Express slot is required.\n");
4171         }
4172
4173         /* reset the hardware with the new settings */
4174         hw->mac.ops.start_hw(hw);
4175
4176         /* link_config depends on start_hw being called at least once */
4177         err = ixgbe_link_config(hw);
4178         if (err) {
4179                 dev_err(&pdev->dev, "setup_link_speed FAILED %d\n", err);
4180                 goto err_register;
4181         }
4182
4183         netif_carrier_off(netdev);
4184
4185         strcpy(netdev->name, "eth%d");
4186         err = register_netdev(netdev);
4187         if (err)
4188                 goto err_register;
4189
4190 #ifdef CONFIG_IXGBE_DCA
4191         if (dca_add_requester(&pdev->dev) == 0) {
4192                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
4193                 /* always use CB2 mode, difference is masked
4194                  * in the CB driver */
4195                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
4196                 ixgbe_setup_dca(adapter);
4197         }
4198 #endif
4199
4200         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
4201         cards_found++;
4202         return 0;
4203
4204 err_register:
4205         ixgbe_release_hw_control(adapter);
4206 err_hw_init:
4207 err_sw_init:
4208         ixgbe_reset_interrupt_capability(adapter);
4209 err_eeprom:
4210         clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4211         del_timer_sync(&adapter->sfp_timer);
4212         cancel_work_sync(&adapter->sfp_task);
4213         iounmap(hw->hw_addr);
4214 err_ioremap:
4215         free_netdev(netdev);
4216 err_alloc_etherdev:
4217         pci_release_regions(pdev);
4218 err_pci_reg:
4219 err_dma:
4220         pci_disable_device(pdev);
4221         return err;
4222 }
4223
4224 /**
4225  * ixgbe_remove - Device Removal Routine
4226  * @pdev: PCI device information struct
4227  *
4228  * ixgbe_remove is called by the PCI subsystem to alert the driver
4229  * that it should release a PCI device.  The could be caused by a
4230  * Hot-Plug event, or because the driver is going to be removed from
4231  * memory.
4232  **/
4233 static void __devexit ixgbe_remove(struct pci_dev *pdev)
4234 {
4235         struct net_device *netdev = pci_get_drvdata(pdev);
4236         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4237         int err;
4238
4239         set_bit(__IXGBE_DOWN, &adapter->state);
4240         /* clear the module not found bit to make sure the worker won't
4241          * reschedule
4242          */
4243         clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4244         del_timer_sync(&adapter->watchdog_timer);
4245
4246         del_timer_sync(&adapter->sfp_timer);
4247         cancel_work_sync(&adapter->watchdog_task);
4248         cancel_work_sync(&adapter->sfp_task);
4249         flush_scheduled_work();
4250
4251 #ifdef CONFIG_IXGBE_DCA
4252         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
4253                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
4254                 dca_remove_requester(&pdev->dev);
4255                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
4256         }
4257
4258 #endif
4259         if (netdev->reg_state == NETREG_REGISTERED)
4260                 unregister_netdev(netdev);
4261
4262         ixgbe_reset_interrupt_capability(adapter);
4263
4264         ixgbe_release_hw_control(adapter);
4265
4266         iounmap(adapter->hw.hw_addr);
4267         pci_release_regions(pdev);
4268
4269         DPRINTK(PROBE, INFO, "complete\n");
4270         kfree(adapter->tx_ring);
4271         kfree(adapter->rx_ring);
4272
4273         free_netdev(netdev);
4274
4275         err = pci_disable_pcie_error_reporting(pdev);
4276         if (err)
4277                 dev_err(&pdev->dev,
4278                         "pci_disable_pcie_error_reporting failed 0x%x\n", err);
4279
4280         pci_disable_device(pdev);
4281 }
4282
4283 /**
4284  * ixgbe_io_error_detected - called when PCI error is detected
4285  * @pdev: Pointer to PCI device
4286  * @state: The current pci connection state
4287  *
4288  * This function is called after a PCI bus error affecting
4289  * this device has been detected.
4290  */
4291 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
4292                                                 pci_channel_state_t state)
4293 {
4294         struct net_device *netdev = pci_get_drvdata(pdev);
4295         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4296
4297         netif_device_detach(netdev);
4298
4299         if (netif_running(netdev))
4300                 ixgbe_down(adapter);
4301         pci_disable_device(pdev);
4302
4303         /* Request a slot reset. */
4304         return PCI_ERS_RESULT_NEED_RESET;
4305 }
4306
4307 /**
4308  * ixgbe_io_slot_reset - called after the pci bus has been reset.
4309  * @pdev: Pointer to PCI device
4310  *
4311  * Restart the card from scratch, as if from a cold-boot.
4312  */
4313 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4314 {
4315         struct net_device *netdev = pci_get_drvdata(pdev);
4316         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4317         pci_ers_result_t result;
4318         int err;
4319
4320         if (pci_enable_device(pdev)) {
4321                 DPRINTK(PROBE, ERR,
4322                         "Cannot re-enable PCI device after reset.\n");
4323                 result = PCI_ERS_RESULT_DISCONNECT;
4324         } else {
4325                 pci_set_master(pdev);
4326                 pci_restore_state(pdev);
4327
4328                 pci_enable_wake(pdev, PCI_D3hot, 0);
4329                 pci_enable_wake(pdev, PCI_D3cold, 0);
4330
4331                 ixgbe_reset(adapter);
4332
4333                 result = PCI_ERS_RESULT_RECOVERED;
4334         }
4335
4336         err = pci_cleanup_aer_uncorrect_error_status(pdev);
4337         if (err) {
4338                 dev_err(&pdev->dev,
4339                   "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err);
4340                 /* non-fatal, continue */
4341         }
4342
4343         return result;
4344 }
4345
4346 /**
4347  * ixgbe_io_resume - called when traffic can start flowing again.
4348  * @pdev: Pointer to PCI device
4349  *
4350  * This callback is called when the error recovery driver tells us that
4351  * its OK to resume normal operation.
4352  */
4353 static void ixgbe_io_resume(struct pci_dev *pdev)
4354 {
4355         struct net_device *netdev = pci_get_drvdata(pdev);
4356         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4357
4358         if (netif_running(netdev)) {
4359                 if (ixgbe_up(adapter)) {
4360                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
4361                         return;
4362                 }
4363         }
4364
4365         netif_device_attach(netdev);
4366 }
4367
4368 static struct pci_error_handlers ixgbe_err_handler = {
4369         .error_detected = ixgbe_io_error_detected,
4370         .slot_reset = ixgbe_io_slot_reset,
4371         .resume = ixgbe_io_resume,
4372 };
4373
4374 static struct pci_driver ixgbe_driver = {
4375         .name     = ixgbe_driver_name,
4376         .id_table = ixgbe_pci_tbl,
4377         .probe    = ixgbe_probe,
4378         .remove   = __devexit_p(ixgbe_remove),
4379 #ifdef CONFIG_PM
4380         .suspend  = ixgbe_suspend,
4381         .resume   = ixgbe_resume,
4382 #endif
4383         .shutdown = ixgbe_shutdown,
4384         .err_handler = &ixgbe_err_handler
4385 };
4386
4387 /**
4388  * ixgbe_init_module - Driver Registration Routine
4389  *
4390  * ixgbe_init_module is the first routine called when the driver is
4391  * loaded. All it does is register with the PCI subsystem.
4392  **/
4393 static int __init ixgbe_init_module(void)
4394 {
4395         int ret;
4396         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
4397                ixgbe_driver_string, ixgbe_driver_version);
4398
4399         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
4400
4401 #ifdef CONFIG_IXGBE_DCA
4402         dca_register_notify(&dca_notifier);
4403 #endif
4404
4405         ret = pci_register_driver(&ixgbe_driver);
4406         return ret;
4407 }
4408
4409 module_init(ixgbe_init_module);
4410
4411 /**
4412  * ixgbe_exit_module - Driver Exit Cleanup Routine
4413  *
4414  * ixgbe_exit_module is called just before the driver is removed
4415  * from memory.
4416  **/
4417 static void __exit ixgbe_exit_module(void)
4418 {
4419 #ifdef CONFIG_IXGBE_DCA
4420         dca_unregister_notify(&dca_notifier);
4421 #endif
4422         pci_unregister_driver(&ixgbe_driver);
4423 }
4424
4425 #ifdef CONFIG_IXGBE_DCA
4426 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4427                             void *p)
4428 {
4429         int ret_val;
4430
4431         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4432                                          __ixgbe_notify_dca);
4433
4434         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4435 }
4436 #endif /* CONFIG_IXGBE_DCA */
4437
4438 module_exit(ixgbe_exit_module);
4439
4440 /* ixgbe_main.c */