2 * Sony CXD2820R demodulator driver
4 * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 #include "cxd2820r_priv.h"
24 /* write multiple registers */
25 static int cxd2820r_wr_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
30 struct i2c_msg msg[1] = {
40 memcpy(&buf[1], val, len);
42 ret = i2c_transfer(priv->i2c, msg, 1);
46 dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
47 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
53 /* read multiple registers */
54 static int cxd2820r_rd_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
59 struct i2c_msg msg[2] = {
73 ret = i2c_transfer(priv->i2c, msg, 2);
75 memcpy(val, buf, len);
78 dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
79 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
86 /* write multiple registers */
87 int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
92 u8 reg = (reginfo >> 0) & 0xff;
93 u8 bank = (reginfo >> 8) & 0xff;
94 u8 i2c = (reginfo >> 16) & 0x01;
98 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
100 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
102 /* switch bank if needed */
103 if (bank != priv->bank[i2c]) {
104 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
107 priv->bank[i2c] = bank;
109 return cxd2820r_wr_regs_i2c(priv, i2c_addr, reg, val, len);
112 /* read multiple registers */
113 int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
118 u8 reg = (reginfo >> 0) & 0xff;
119 u8 bank = (reginfo >> 8) & 0xff;
120 u8 i2c = (reginfo >> 16) & 0x01;
124 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
126 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
128 /* switch bank if needed */
129 if (bank != priv->bank[i2c]) {
130 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
133 priv->bank[i2c] = bank;
135 return cxd2820r_rd_regs_i2c(priv, i2c_addr, reg, val, len);
138 /* write single register */
139 int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val)
141 return cxd2820r_wr_regs(priv, reg, &val, 1);
144 /* read single register */
145 int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val)
147 return cxd2820r_rd_regs(priv, reg, val, 1);
150 /* write single register with mask */
151 int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
157 /* no need for read if whole reg is written */
159 ret = cxd2820r_rd_reg(priv, reg, &tmp);
168 return cxd2820r_wr_reg(priv, reg, val);
171 int cxd2820r_gpio(struct dvb_frontend *fe, u8 *gpio)
173 struct cxd2820r_priv *priv = fe->demodulator_priv;
177 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
178 fe->dtv_property_cache.delivery_system);
180 /* update GPIOs only when needed */
181 if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
186 for (i = 0; i < sizeof(priv->gpio); i++) {
187 /* enable / disable */
188 if (gpio[i] & CXD2820R_GPIO_E)
189 tmp0 |= (2 << 6) >> (2 * i);
191 tmp0 |= (1 << 6) >> (2 * i);
194 if (gpio[i] & CXD2820R_GPIO_I)
195 tmp1 |= (1 << (3 + i));
197 tmp1 |= (0 << (3 + i));
200 if (gpio[i] & CXD2820R_GPIO_H)
201 tmp1 |= (1 << (0 + i));
203 tmp1 |= (0 << (0 + i));
205 dev_dbg(&priv->i2c->dev, "%s: gpio i=%d %02x %02x\n", __func__,
209 dev_dbg(&priv->i2c->dev, "%s: wr gpio=%02x %02x\n", __func__, tmp0,
212 /* write bits [7:2] */
213 ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc);
217 /* write bits [5:0] */
218 ret = cxd2820r_wr_reg_mask(priv, 0x0008e, tmp1, 0x3f);
222 memcpy(priv->gpio, gpio, sizeof(priv->gpio));
226 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
230 /* 64 bit div with round closest, like DIV_ROUND_CLOSEST but 64 bit */
231 u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor)
233 return div_u64(dividend + (divisor / 2), divisor);
236 static int cxd2820r_set_frontend(struct dvb_frontend *fe)
238 struct cxd2820r_priv *priv = fe->demodulator_priv;
239 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
242 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
243 fe->dtv_property_cache.delivery_system);
245 switch (c->delivery_system) {
247 ret = cxd2820r_init_t(fe);
250 ret = cxd2820r_set_frontend_t(fe);
255 ret = cxd2820r_init_t(fe);
258 ret = cxd2820r_set_frontend_t2(fe);
262 case SYS_DVBC_ANNEX_A:
263 ret = cxd2820r_init_c(fe);
266 ret = cxd2820r_set_frontend_c(fe);
271 dev_dbg(&priv->i2c->dev, "%s: error state=%d\n", __func__,
272 fe->dtv_property_cache.delivery_system);
279 static int cxd2820r_read_status(struct dvb_frontend *fe, fe_status_t *status)
281 struct cxd2820r_priv *priv = fe->demodulator_priv;
284 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
285 fe->dtv_property_cache.delivery_system);
287 switch (fe->dtv_property_cache.delivery_system) {
289 ret = cxd2820r_read_status_t(fe, status);
292 ret = cxd2820r_read_status_t2(fe, status);
294 case SYS_DVBC_ANNEX_A:
295 ret = cxd2820r_read_status_c(fe, status);
304 static int cxd2820r_get_frontend(struct dvb_frontend *fe)
306 struct cxd2820r_priv *priv = fe->demodulator_priv;
309 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
310 fe->dtv_property_cache.delivery_system);
312 if (priv->delivery_system == SYS_UNDEFINED)
315 switch (fe->dtv_property_cache.delivery_system) {
317 ret = cxd2820r_get_frontend_t(fe);
320 ret = cxd2820r_get_frontend_t2(fe);
322 case SYS_DVBC_ANNEX_A:
323 ret = cxd2820r_get_frontend_c(fe);
332 static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
334 struct cxd2820r_priv *priv = fe->demodulator_priv;
337 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
338 fe->dtv_property_cache.delivery_system);
340 switch (fe->dtv_property_cache.delivery_system) {
342 ret = cxd2820r_read_ber_t(fe, ber);
345 ret = cxd2820r_read_ber_t2(fe, ber);
347 case SYS_DVBC_ANNEX_A:
348 ret = cxd2820r_read_ber_c(fe, ber);
357 static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
359 struct cxd2820r_priv *priv = fe->demodulator_priv;
362 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
363 fe->dtv_property_cache.delivery_system);
365 switch (fe->dtv_property_cache.delivery_system) {
367 ret = cxd2820r_read_signal_strength_t(fe, strength);
370 ret = cxd2820r_read_signal_strength_t2(fe, strength);
372 case SYS_DVBC_ANNEX_A:
373 ret = cxd2820r_read_signal_strength_c(fe, strength);
382 static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
384 struct cxd2820r_priv *priv = fe->demodulator_priv;
387 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
388 fe->dtv_property_cache.delivery_system);
390 switch (fe->dtv_property_cache.delivery_system) {
392 ret = cxd2820r_read_snr_t(fe, snr);
395 ret = cxd2820r_read_snr_t2(fe, snr);
397 case SYS_DVBC_ANNEX_A:
398 ret = cxd2820r_read_snr_c(fe, snr);
407 static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
409 struct cxd2820r_priv *priv = fe->demodulator_priv;
412 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
413 fe->dtv_property_cache.delivery_system);
415 switch (fe->dtv_property_cache.delivery_system) {
417 ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
420 ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
422 case SYS_DVBC_ANNEX_A:
423 ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
432 static int cxd2820r_init(struct dvb_frontend *fe)
437 static int cxd2820r_sleep(struct dvb_frontend *fe)
439 struct cxd2820r_priv *priv = fe->demodulator_priv;
442 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
443 fe->dtv_property_cache.delivery_system);
445 switch (fe->dtv_property_cache.delivery_system) {
447 ret = cxd2820r_sleep_t(fe);
450 ret = cxd2820r_sleep_t2(fe);
452 case SYS_DVBC_ANNEX_A:
453 ret = cxd2820r_sleep_c(fe);
462 static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
463 struct dvb_frontend_tune_settings *s)
465 struct cxd2820r_priv *priv = fe->demodulator_priv;
468 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
469 fe->dtv_property_cache.delivery_system);
471 switch (fe->dtv_property_cache.delivery_system) {
473 ret = cxd2820r_get_tune_settings_t(fe, s);
476 ret = cxd2820r_get_tune_settings_t2(fe, s);
478 case SYS_DVBC_ANNEX_A:
479 ret = cxd2820r_get_tune_settings_c(fe, s);
488 static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe)
490 struct cxd2820r_priv *priv = fe->demodulator_priv;
491 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
493 fe_status_t status = 0;
495 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
496 fe->dtv_property_cache.delivery_system);
498 /* switch between DVB-T and DVB-T2 when tune fails */
499 if (priv->last_tune_failed) {
500 if (priv->delivery_system == SYS_DVBT) {
501 ret = cxd2820r_sleep_t(fe);
505 c->delivery_system = SYS_DVBT2;
506 } else if (priv->delivery_system == SYS_DVBT2) {
507 ret = cxd2820r_sleep_t2(fe);
511 c->delivery_system = SYS_DVBT;
516 ret = cxd2820r_set_frontend(fe);
521 /* frontend lock wait loop count */
522 switch (priv->delivery_system) {
524 case SYS_DVBC_ANNEX_A:
536 /* wait frontend lock */
538 dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
540 ret = cxd2820r_read_status(fe, &status);
544 if (status & FE_HAS_LOCK)
548 /* check if we have a valid signal */
549 if (status & FE_HAS_LOCK) {
550 priv->last_tune_failed = 0;
551 return DVBFE_ALGO_SEARCH_SUCCESS;
553 priv->last_tune_failed = 1;
554 return DVBFE_ALGO_SEARCH_AGAIN;
558 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
559 return DVBFE_ALGO_SEARCH_ERROR;
562 static int cxd2820r_get_frontend_algo(struct dvb_frontend *fe)
564 return DVBFE_ALGO_CUSTOM;
567 static void cxd2820r_release(struct dvb_frontend *fe)
569 struct cxd2820r_priv *priv = fe->demodulator_priv;
570 int uninitialized_var(ret); /* silence compiler warning */
572 dev_dbg(&priv->i2c->dev, "%s\n", __func__);
574 #ifdef CONFIG_GPIOLIB
576 if (priv->gpio_chip.label) {
577 ret = gpiochip_remove(&priv->gpio_chip);
579 dev_err(&priv->i2c->dev, "%s: gpiochip_remove() " \
580 "failed=%d\n", KBUILD_MODNAME, ret);
587 static int cxd2820r_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
589 struct cxd2820r_priv *priv = fe->demodulator_priv;
591 dev_dbg(&priv->i2c->dev, "%s: %d\n", __func__, enable);
593 /* Bit 0 of reg 0xdb in bank 0x00 controls I2C repeater */
594 return cxd2820r_wr_reg_mask(priv, 0xdb, enable ? 1 : 0, 0x1);
597 #ifdef CONFIG_GPIOLIB
598 static int cxd2820r_gpio_direction_output(struct gpio_chip *chip, unsigned nr,
601 struct cxd2820r_priv *priv =
602 container_of(chip, struct cxd2820r_priv, gpio_chip);
605 dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
607 memcpy(gpio, priv->gpio, sizeof(gpio));
608 gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
610 return cxd2820r_gpio(&priv->fe, gpio);
613 static void cxd2820r_gpio_set(struct gpio_chip *chip, unsigned nr, int val)
615 struct cxd2820r_priv *priv =
616 container_of(chip, struct cxd2820r_priv, gpio_chip);
619 dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
621 memcpy(gpio, priv->gpio, sizeof(gpio));
622 gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
624 (void) cxd2820r_gpio(&priv->fe, gpio);
629 static int cxd2820r_gpio_get(struct gpio_chip *chip, unsigned nr)
631 struct cxd2820r_priv *priv =
632 container_of(chip, struct cxd2820r_priv, gpio_chip);
634 dev_dbg(&priv->i2c->dev, "%s: nr=%d\n", __func__, nr);
636 return (priv->gpio[nr] >> 2) & 0x01;
640 static const struct dvb_frontend_ops cxd2820r_ops = {
641 .delsys = { SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A },
642 /* default: DVB-T/T2 */
644 .name = "Sony CXD2820R",
646 .caps = FE_CAN_FEC_1_2 |
659 FE_CAN_TRANSMISSION_MODE_AUTO |
660 FE_CAN_GUARD_INTERVAL_AUTO |
661 FE_CAN_HIERARCHY_AUTO |
663 FE_CAN_2G_MODULATION |
667 .release = cxd2820r_release,
668 .init = cxd2820r_init,
669 .sleep = cxd2820r_sleep,
671 .get_tune_settings = cxd2820r_get_tune_settings,
672 .i2c_gate_ctrl = cxd2820r_i2c_gate_ctrl,
674 .get_frontend = cxd2820r_get_frontend,
676 .get_frontend_algo = cxd2820r_get_frontend_algo,
677 .search = cxd2820r_search,
679 .read_status = cxd2820r_read_status,
680 .read_snr = cxd2820r_read_snr,
681 .read_ber = cxd2820r_read_ber,
682 .read_ucblocks = cxd2820r_read_ucblocks,
683 .read_signal_strength = cxd2820r_read_signal_strength,
686 struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
687 struct i2c_adapter *i2c, int *gpio_chip_base
690 struct cxd2820r_priv *priv;
694 priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
697 dev_err(&i2c->dev, "%s: kzalloc() failed\n",
703 memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
704 memcpy(&priv->fe.ops, &cxd2820r_ops, sizeof(struct dvb_frontend_ops));
705 priv->fe.demodulator_priv = priv;
707 priv->bank[0] = priv->bank[1] = 0xff;
708 ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
709 dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, tmp);
710 if (ret || tmp != 0xe1)
713 if (gpio_chip_base) {
714 #ifdef CONFIG_GPIOLIB
716 priv->gpio_chip.label = KBUILD_MODNAME;
717 priv->gpio_chip.dev = &priv->i2c->dev;
718 priv->gpio_chip.owner = THIS_MODULE;
719 priv->gpio_chip.direction_output =
720 cxd2820r_gpio_direction_output;
721 priv->gpio_chip.set = cxd2820r_gpio_set;
722 priv->gpio_chip.get = cxd2820r_gpio_get;
723 priv->gpio_chip.base = -1; /* dynamic allocation */
724 priv->gpio_chip.ngpio = GPIO_COUNT;
725 priv->gpio_chip.can_sleep = 1;
726 ret = gpiochip_add(&priv->gpio_chip);
730 dev_dbg(&priv->i2c->dev, "%s: gpio_chip.base=%d\n", __func__,
731 priv->gpio_chip.base);
733 *gpio_chip_base = priv->gpio_chip.base;
736 * Use static GPIO configuration if GPIOLIB is undefined.
737 * This is fallback condition.
740 gpio[0] = (*gpio_chip_base >> 0) & 0x07;
741 gpio[1] = (*gpio_chip_base >> 3) & 0x07;
743 ret = cxd2820r_gpio(&priv->fe, gpio);
751 dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
755 EXPORT_SYMBOL(cxd2820r_attach);
757 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
758 MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
759 MODULE_LICENSE("GPL");