2 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/spinlock.h>
35 #include <linux/pci.h>
37 #include <linux/delay.h>
38 #include <linux/netdevice.h>
39 #include <linux/vmalloc.h>
44 * The size has to be longer than this string, so we can append
45 * board/chip information to it in the init code.
47 const char ib_qib_version[] = QIB_IDSTR "\n";
49 DEFINE_SPINLOCK(qib_devs_lock);
50 LIST_HEAD(qib_dev_list);
51 DEFINE_MUTEX(qib_mutex); /* general driver use */
54 module_param_named(ibmtu, qib_ibmtu, uint, S_IRUGO);
55 MODULE_PARM_DESC(ibmtu, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096");
57 unsigned qib_compat_ddr_negotiate = 1;
58 module_param_named(compat_ddr_negotiate, qib_compat_ddr_negotiate, uint,
60 MODULE_PARM_DESC(compat_ddr_negotiate,
61 "Attempt pre-IBTA 1.2 DDR speed negotiation");
63 MODULE_LICENSE("Dual BSD/GPL");
64 MODULE_AUTHOR("QLogic <support@qlogic.com>");
65 MODULE_DESCRIPTION("QLogic IB driver");
68 * QIB_PIO_MAXIBHDR is the max IB header size allowed for in our
69 * PIO send buffers. This is well beyond anything currently
70 * defined in the InfiniBand spec.
72 #define QIB_PIO_MAXIBHDR 128
75 * QIB_MAX_PKT_RCV is the max # if packets processed per receive interrupt.
77 #define QIB_MAX_PKT_RECV 64
79 struct qlogic_ib_stats qib_stats;
81 const char *qib_get_unit_name(int unit)
83 static char iname[16];
85 snprintf(iname, sizeof iname, "infinipath%u", unit);
90 * Return count of units with at least one port ACTIVE.
92 int qib_count_active_units(void)
94 struct qib_devdata *dd;
95 struct qib_pportdata *ppd;
97 int pidx, nunits_active = 0;
99 spin_lock_irqsave(&qib_devs_lock, flags);
100 list_for_each_entry(dd, &qib_dev_list, list) {
101 if (!(dd->flags & QIB_PRESENT) || !dd->kregbase)
103 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
104 ppd = dd->pport + pidx;
105 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
106 QIBL_LINKARMED | QIBL_LINKACTIVE))) {
112 spin_unlock_irqrestore(&qib_devs_lock, flags);
113 return nunits_active;
117 * Return count of all units, optionally return in arguments
118 * the number of usable (present) units, and the number of
121 int qib_count_units(int *npresentp, int *nupp)
123 int nunits = 0, npresent = 0, nup = 0;
124 struct qib_devdata *dd;
127 struct qib_pportdata *ppd;
129 spin_lock_irqsave(&qib_devs_lock, flags);
131 list_for_each_entry(dd, &qib_dev_list, list) {
133 if ((dd->flags & QIB_PRESENT) && dd->kregbase)
135 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
136 ppd = dd->pport + pidx;
137 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
138 QIBL_LINKARMED | QIBL_LINKACTIVE)))
143 spin_unlock_irqrestore(&qib_devs_lock, flags);
146 *npresentp = npresent;
154 * qib_wait_linkstate - wait for an IB link state change to occur
155 * @dd: the qlogic_ib device
156 * @state: the state to wait for
157 * @msecs: the number of milliseconds to wait
159 * wait up to msecs milliseconds for IB link state change to occur for
160 * now, take the easy polling route. Currently used only by
161 * qib_set_linkstate. Returns 0 if state reached, otherwise
162 * -ETIMEDOUT state can have multiple states set, for any of several
165 int qib_wait_linkstate(struct qib_pportdata *ppd, u32 state, int msecs)
170 spin_lock_irqsave(&ppd->lflags_lock, flags);
171 if (ppd->state_wanted) {
172 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
176 ppd->state_wanted = state;
177 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
178 wait_event_interruptible_timeout(ppd->state_wait,
179 (ppd->lflags & state),
180 msecs_to_jiffies(msecs));
181 spin_lock_irqsave(&ppd->lflags_lock, flags);
182 ppd->state_wanted = 0;
183 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
185 if (!(ppd->lflags & state))
193 int qib_set_linkstate(struct qib_pportdata *ppd, u8 newstate)
197 struct qib_devdata *dd = ppd->dd;
201 case QIB_IB_LINKDOWN_ONLY:
202 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
203 IB_LINKCMD_DOWN | IB_LINKINITCMD_NOP);
208 case QIB_IB_LINKDOWN:
209 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
210 IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL);
215 case QIB_IB_LINKDOWN_SLEEP:
216 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
217 IB_LINKCMD_DOWN | IB_LINKINITCMD_SLEEP);
222 case QIB_IB_LINKDOWN_DISABLE:
223 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
224 IB_LINKCMD_DOWN | IB_LINKINITCMD_DISABLE);
230 if (ppd->lflags & QIBL_LINKARMED) {
234 if (!(ppd->lflags & (QIBL_LINKINIT | QIBL_LINKACTIVE))) {
239 * Since the port can be ACTIVE when we ask for ARMED,
240 * clear QIBL_LINKV so we can wait for a transition.
241 * If the link isn't ARMED, then something else happened
242 * and there is no point waiting for ARMED.
244 spin_lock_irqsave(&ppd->lflags_lock, flags);
245 ppd->lflags &= ~QIBL_LINKV;
246 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
247 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
248 IB_LINKCMD_ARMED | IB_LINKINITCMD_NOP);
252 case QIB_IB_LINKACTIVE:
253 if (ppd->lflags & QIBL_LINKACTIVE) {
257 if (!(ppd->lflags & QIBL_LINKARMED)) {
261 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
262 IB_LINKCMD_ACTIVE | IB_LINKINITCMD_NOP);
263 lstate = QIBL_LINKACTIVE;
270 ret = qib_wait_linkstate(ppd, lstate, 10);
277 * Get address of eager buffer from it's index (allocated in chunks, not
280 static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail)
282 const u32 chunk = etail >> rcd->rcvegrbufs_perchunk_shift;
283 const u32 idx = etail & ((u32)rcd->rcvegrbufs_perchunk - 1);
285 return rcd->rcvegrbuf[chunk] + (idx << rcd->dd->rcvegrbufsize_shift);
289 * Returns 1 if error was a CRC, else 0.
290 * Needed for some chip's synthesized error counters.
292 static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd,
293 u32 ctxt, u32 eflags, u32 l, u32 etail,
294 __le32 *rhf_addr, struct qib_message_header *rhdr)
298 if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR))
300 else if (eflags == QLOGIC_IB_RHF_H_TIDERR) {
301 /* For TIDERR and RC QPs premptively schedule a NAK */
302 struct qib_ib_header *hdr = (struct qib_ib_header *) rhdr;
303 struct qib_other_headers *ohdr = NULL;
304 struct qib_ibport *ibp = &ppd->ibport_data;
305 struct qib_qp *qp = NULL;
306 u32 tlen = qib_hdrget_length_in_bytes(rhf_addr);
307 u16 lid = be16_to_cpu(hdr->lrh[1]);
308 int lnh = be16_to_cpu(hdr->lrh[0]) & 3;
315 /* Sanity check packet */
319 if (lid < QIB_MULTICAST_LID_BASE) {
320 lid &= ~((1 << ppd->lmc) - 1);
321 if (unlikely(lid != ppd->lid))
326 if (lnh == QIB_LRH_BTH)
328 else if (lnh == QIB_LRH_GRH) {
331 ohdr = &hdr->u.l.oth;
332 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
334 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
335 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
340 /* Get opcode and PSN from packet */
341 opcode = be32_to_cpu(ohdr->bth[0]);
343 psn = be32_to_cpu(ohdr->bth[2]);
345 /* Get the destination QP number. */
346 qp_num = be32_to_cpu(ohdr->bth[1]) & QIB_QPN_MASK;
347 if (qp_num != QIB_MULTICAST_QPN) {
349 qp = qib_lookup_qpn(ibp, qp_num);
354 * Handle only RC QPs - for other QP types drop error
357 spin_lock(&qp->r_lock);
359 /* Check for valid receive state. */
360 if (!(ib_qib_state_ops[qp->state] &
361 QIB_PROCESS_RECV_OK)) {
366 switch (qp->ibqp.qp_type) {
368 spin_lock_irqsave(&qp->s_lock, flags);
374 be32_to_cpu(ohdr->bth[0]));
376 spin_unlock_irqrestore(&qp->s_lock,
380 spin_unlock_irqrestore(&qp->s_lock, flags);
382 /* Only deal with RDMA Writes for now */
384 IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
385 diff = qib_cmp24(psn, qp->r_psn);
386 if (!qp->r_nak_state && diff >= 0) {
390 /* Use the expected PSN. */
391 qp->r_ack_psn = qp->r_psn;
393 * Wait to send the sequence
394 * NAK until all packets
395 * in the receive queue have
397 * Otherwise, we end up
398 * propagating congestion.
400 if (list_empty(&qp->rspwait)) {
409 } /* Out of sequence NAK */
410 } /* QP Request NAKs */
417 /* For now don't handle any other QP types */
422 spin_unlock(&qp->r_lock);
424 * Notify qib_destroy_qp() if it is waiting
427 if (atomic_dec_and_test(&qp->refcount))
430 } /* Valid packet with TIDErr */
437 * qib_kreceive - receive a packet
438 * @rcd: the qlogic_ib context
439 * @llic: gets count of good packets needed to clear lli,
440 * (used with chips that need need to track crcs for lli)
442 * called from interrupt handler for errors or receive interrupt
443 * Returns number of CRC error packets, needed by some chips for
444 * local link integrity tracking. crcs are adjusted down by following
445 * good packets, if any, and count of good packets is also tracked.
447 u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts)
449 struct qib_devdata *dd = rcd->dd;
450 struct qib_pportdata *ppd = rcd->ppd;
453 const u32 rsize = dd->rcvhdrentsize; /* words */
454 const u32 maxcnt = dd->rcvhdrcnt * rsize; /* words */
455 u32 etail = -1, l, hdrqtail;
456 struct qib_message_header *hdr;
457 u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0;
460 struct qib_qp *qp, *nqp;
463 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
464 if (dd->flags & QIB_NODMA_RTAIL) {
465 u32 seq = qib_hdrget_seq(rhf_addr);
466 if (seq != rcd->seq_cnt)
470 hdrqtail = qib_get_rcvhdrtail(rcd);
473 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
476 for (last = 0, i = 1; !last; i += !last) {
477 hdr = dd->f_get_msgheader(dd, rhf_addr);
478 eflags = qib_hdrget_err_flags(rhf_addr);
479 etype = qib_hdrget_rcv_type(rhf_addr);
481 tlen = qib_hdrget_length_in_bytes(rhf_addr);
483 if ((dd->flags & QIB_NODMA_RTAIL) ?
484 qib_hdrget_use_egr_buf(rhf_addr) :
485 (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
486 etail = qib_hdrget_index(rhf_addr);
488 if (tlen > sizeof(*hdr) ||
489 etype >= RCVHQ_RCV_TYPE_NON_KD)
490 ebuf = qib_get_egrbuf(rcd, etail);
493 u16 lrh_len = be16_to_cpu(hdr->lrh[2]) << 2;
495 if (lrh_len != tlen) {
496 qib_stats.sps_lenerrs++;
500 if (etype == RCVHQ_RCV_TYPE_NON_KD && !eflags &&
502 tlen > (dd->rcvhdrentsize - 2 + 1 -
503 qib_hdrget_offset(rhf_addr)) << 2) {
508 * Both tiderr and qibhdrerr are set for all plain IB
509 * packets; only qibhdrerr should be set.
511 if (unlikely(eflags))
512 crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l,
513 etail, rhf_addr, hdr);
514 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
515 qib_ib_rcv(rcd, hdr, ebuf, tlen);
518 else if (llic && *llic)
525 if (i == QIB_MAX_PKT_RECV)
528 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
529 if (dd->flags & QIB_NODMA_RTAIL) {
530 u32 seq = qib_hdrget_seq(rhf_addr);
532 if (++rcd->seq_cnt > 13)
534 if (seq != rcd->seq_cnt)
536 } else if (l == hdrqtail)
539 * Update head regs etc., every 16 packets, if not last pkt,
540 * to help prevent rcvhdrq overflows, when many packets
541 * are processed and queue is nearly full.
542 * Don't request an interrupt for intermediate updates.
545 if (!last && !(i & 0xf)) {
546 dd->f_update_usrhead(rcd, lval, updegr, etail, i);
551 * Notify qib_destroy_qp() if it is waiting
552 * for lookaside_qp to finish.
554 if (rcd->lookaside_qp) {
555 if (atomic_dec_and_test(&rcd->lookaside_qp->refcount))
556 wake_up(&rcd->lookaside_qp->wait);
557 rcd->lookaside_qp = NULL;
564 * Iterate over all QPs waiting to respond.
565 * The list won't change since the IRQ is only run on one CPU.
567 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
568 list_del_init(&qp->rspwait);
569 if (qp->r_flags & QIB_R_RSP_NAK) {
570 qp->r_flags &= ~QIB_R_RSP_NAK;
573 if (qp->r_flags & QIB_R_RSP_SEND) {
576 qp->r_flags &= ~QIB_R_RSP_SEND;
577 spin_lock_irqsave(&qp->s_lock, flags);
578 if (ib_qib_state_ops[qp->state] &
579 QIB_PROCESS_OR_FLUSH_SEND)
580 qib_schedule_send(qp);
581 spin_unlock_irqrestore(&qp->s_lock, flags);
583 if (atomic_dec_and_test(&qp->refcount))
588 /* Report number of packets consumed */
593 * Always write head at end, and setup rcv interrupt, even
594 * if no packets were processed.
596 lval = (u64)rcd->head | dd->rhdrhead_intr_off;
597 dd->f_update_usrhead(rcd, lval, updegr, etail, i);
602 * qib_set_mtu - set the MTU
603 * @ppd: the perport data
606 * We can handle "any" incoming size, the issue here is whether we
607 * need to restrict our outgoing size. For now, we don't do any
608 * sanity checking on this, and we don't deal with what happens to
609 * programs that are already running when the size changes.
610 * NOTE: changing the MTU will usually cause the IBC to go back to
613 int qib_set_mtu(struct qib_pportdata *ppd, u16 arg)
618 if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
623 chk = ib_mtu_enum_to_int(qib_ibmtu);
624 if (chk > 0 && arg > chk) {
629 piosize = ppd->ibmaxlen;
632 if (arg >= (piosize - QIB_PIO_MAXIBHDR)) {
633 /* Only if it's not the initial value (or reset to it) */
634 if (piosize != ppd->init_ibmaxlen) {
635 if (arg > piosize && arg <= ppd->init_ibmaxlen)
636 piosize = ppd->init_ibmaxlen - 2 * sizeof(u32);
637 ppd->ibmaxlen = piosize;
639 } else if ((arg + QIB_PIO_MAXIBHDR) != ppd->ibmaxlen) {
640 piosize = arg + QIB_PIO_MAXIBHDR - 2 * sizeof(u32);
641 ppd->ibmaxlen = piosize;
644 ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_MTU, 0);
652 int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc)
654 struct qib_devdata *dd = ppd->dd;
658 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LIDLMC,
659 lid | (~((1U << lmc) - 1)) << 16);
661 qib_devinfo(dd->pcidev, "IB%u:%u got a lid: 0x%x\n",
662 dd->unit, ppd->port, lid);
668 * Following deal with the "obviously simple" task of overriding the state
669 * of the LEDS, which normally indicate link physical and logical status.
670 * The complications arise in dealing with different hardware mappings
671 * and the board-dependent routine being called from interrupts.
672 * and then there's the requirement to _flash_ them.
674 #define LED_OVER_FREQ_SHIFT 8
675 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
676 /* Below is "non-zero" to force override, but both actual LEDs are off */
677 #define LED_OVER_BOTH_OFF (8)
679 static void qib_run_led_override(unsigned long opaque)
681 struct qib_pportdata *ppd = (struct qib_pportdata *)opaque;
682 struct qib_devdata *dd = ppd->dd;
686 if (!(dd->flags & QIB_INITTED))
689 ph_idx = ppd->led_override_phase++ & 1;
690 ppd->led_override = ppd->led_override_vals[ph_idx];
691 timeoff = ppd->led_override_timeoff;
693 dd->f_setextled(ppd, 1);
695 * don't re-fire the timer if user asked for it to be off; we let
696 * it fire one more time after they turn it off to simplify
698 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
699 mod_timer(&ppd->led_override_timer, jiffies + timeoff);
702 void qib_set_led_override(struct qib_pportdata *ppd, unsigned int val)
704 struct qib_devdata *dd = ppd->dd;
707 if (!(dd->flags & QIB_INITTED))
710 /* First check if we are blinking. If not, use 1HZ polling */
712 freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
715 /* For blink, set each phase from one nybble of val */
716 ppd->led_override_vals[0] = val & 0xF;
717 ppd->led_override_vals[1] = (val >> 4) & 0xF;
718 timeoff = (HZ << 4)/freq;
720 /* Non-blink set both phases the same. */
721 ppd->led_override_vals[0] = val & 0xF;
722 ppd->led_override_vals[1] = val & 0xF;
724 ppd->led_override_timeoff = timeoff;
727 * If the timer has not already been started, do so. Use a "quick"
728 * timeout so the function will be called soon, to look at our request.
730 if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
731 /* Need to start timer */
732 init_timer(&ppd->led_override_timer);
733 ppd->led_override_timer.function = qib_run_led_override;
734 ppd->led_override_timer.data = (unsigned long) ppd;
735 ppd->led_override_timer.expires = jiffies + 1;
736 add_timer(&ppd->led_override_timer);
738 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
739 mod_timer(&ppd->led_override_timer, jiffies + 1);
740 atomic_dec(&ppd->led_override_timer_active);
745 * qib_reset_device - reset the chip if possible
746 * @unit: the device to reset
748 * Whether or not reset is successful, we attempt to re-initialize the chip
749 * (that is, much like a driver unload/reload). We clear the INITTED flag
750 * so that the various entry points will fail until we reinitialize. For
751 * now, we only allow this if no user contexts are open that use chip resources
753 int qib_reset_device(int unit)
756 struct qib_devdata *dd = qib_lookup(unit);
757 struct qib_pportdata *ppd;
766 qib_devinfo(dd->pcidev, "Reset on unit %u requested\n", unit);
768 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) {
769 qib_devinfo(dd->pcidev, "Invalid unit number %u or "
770 "not initialized or not present\n", unit);
775 spin_lock_irqsave(&dd->uctxt_lock, flags);
777 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
778 if (!dd->rcd[i] || !dd->rcd[i]->cnt)
780 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
784 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
786 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
787 ppd = dd->pport + pidx;
788 if (atomic_read(&ppd->led_override_timer_active)) {
789 /* Need to stop LED timer, _then_ shut off LEDs */
790 del_timer_sync(&ppd->led_override_timer);
791 atomic_set(&ppd->led_override_timer_active, 0);
794 /* Shut off LEDs after we are sure timer is not running */
795 ppd->led_override = LED_OVER_BOTH_OFF;
796 dd->f_setextled(ppd, 0);
797 if (dd->flags & QIB_HAS_SEND_DMA)
798 qib_teardown_sdma(ppd);
801 ret = dd->f_reset(dd);
803 ret = qib_init(dd, 1);
807 qib_dev_err(dd, "Reinitialize unit %u after "
808 "reset failed with %d\n", unit, ret);
810 qib_devinfo(dd->pcidev, "Reinitialized unit %u after "
811 "resetting\n", unit);