2 * Copyright 2009 Jerome Glisse.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Jerome Glisse
25 #include <drm/radeon_drm.h>
26 #include "radeon_reg.h"
29 #define RADEON_BENCHMARK_COPY_BLIT 1
30 #define RADEON_BENCHMARK_COPY_DMA 0
32 #define RADEON_BENCHMARK_ITERATIONS 1024
33 #define RADEON_BENCHMARK_COMMON_MODES_N 17
35 static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size,
36 uint64_t saddr, uint64_t daddr,
39 unsigned long start_jiffies;
40 unsigned long end_jiffies;
41 struct radeon_fence *fence = NULL;
44 start_jiffies = jiffies;
45 for (i = 0; i < n; i++) {
46 r = radeon_fence_create(rdev, &fence);
51 case RADEON_BENCHMARK_COPY_DMA:
52 r = radeon_copy_dma(rdev, saddr, daddr,
53 size / RADEON_GPU_PAGE_SIZE,
56 case RADEON_BENCHMARK_COPY_BLIT:
57 r = radeon_copy_blit(rdev, saddr, daddr,
58 size / RADEON_GPU_PAGE_SIZE,
62 DRM_ERROR("Unknown copy method\n");
67 r = radeon_fence_wait(fence, false);
70 radeon_fence_unref(&fence);
72 end_jiffies = jiffies;
73 r = jiffies_to_msecs(end_jiffies - start_jiffies);
77 radeon_fence_unref(&fence);
82 static void radeon_benchmark_log_results(int n, unsigned size,
84 unsigned sdomain, unsigned ddomain,
87 unsigned int throughput = (n * (size >> 10)) / time;
88 DRM_INFO("radeon: %s %u bo moves of %u kB from"
89 " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
90 kind, n, size >> 10, sdomain, ddomain, time,
91 throughput * 8, throughput);
94 static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size,
95 unsigned sdomain, unsigned ddomain)
97 struct radeon_bo *dobj = NULL;
98 struct radeon_bo *sobj = NULL;
99 uint64_t saddr, daddr;
103 n = RADEON_BENCHMARK_ITERATIONS;
104 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, &sobj);
108 r = radeon_bo_reserve(sobj, false);
109 if (unlikely(r != 0))
111 r = radeon_bo_pin(sobj, sdomain, &saddr);
112 radeon_bo_unreserve(sobj);
116 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, &dobj);
120 r = radeon_bo_reserve(dobj, false);
121 if (unlikely(r != 0))
123 r = radeon_bo_pin(dobj, ddomain, &daddr);
124 radeon_bo_unreserve(dobj);
129 /* r100 doesn't have dma engine so skip the test */
130 /* also, VRAM-to-VRAM test doesn't make much sense for DMA */
131 /* skip it as well if domains are the same */
132 if ((rdev->asic->copy_dma) && (sdomain != ddomain)) {
133 time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
134 RADEON_BENCHMARK_COPY_DMA, n);
138 radeon_benchmark_log_results(n, size, time,
139 sdomain, ddomain, "dma");
142 time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
143 RADEON_BENCHMARK_COPY_BLIT, n);
147 radeon_benchmark_log_results(n, size, time,
148 sdomain, ddomain, "blit");
152 r = radeon_bo_reserve(sobj, false);
153 if (likely(r == 0)) {
154 radeon_bo_unpin(sobj);
155 radeon_bo_unreserve(sobj);
157 radeon_bo_unref(&sobj);
160 r = radeon_bo_reserve(dobj, false);
161 if (likely(r == 0)) {
162 radeon_bo_unpin(dobj);
163 radeon_bo_unreserve(dobj);
165 radeon_bo_unref(&dobj);
169 DRM_ERROR("Error while benchmarking BO move.\n");
173 void radeon_benchmark(struct radeon_device *rdev, int test_number)
176 int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = {
196 switch (test_number) {
198 /* simple test, VRAM to GTT and GTT to VRAM */
199 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT,
200 RADEON_GEM_DOMAIN_VRAM);
201 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
202 RADEON_GEM_DOMAIN_GTT);
205 /* simple test, VRAM to VRAM */
206 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
207 RADEON_GEM_DOMAIN_VRAM);
210 /* GTT to VRAM, buffer size sweep, powers of 2 */
211 for (i = 1; i <= 65536; i <<= 1)
212 radeon_benchmark_move(rdev, i*1024,
213 RADEON_GEM_DOMAIN_GTT,
214 RADEON_GEM_DOMAIN_VRAM);
217 /* VRAM to GTT, buffer size sweep, powers of 2 */
218 for (i = 1; i <= 65536; i <<= 1)
219 radeon_benchmark_move(rdev, i*1024,
220 RADEON_GEM_DOMAIN_VRAM,
221 RADEON_GEM_DOMAIN_GTT);
224 /* VRAM to VRAM, buffer size sweep, powers of 2 */
225 for (i = 1; i <= 65536; i <<= 1)
226 radeon_benchmark_move(rdev, i*1024,
227 RADEON_GEM_DOMAIN_VRAM,
228 RADEON_GEM_DOMAIN_VRAM);
231 /* GTT to VRAM, buffer size sweep, common modes */
232 for (i = 1; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
233 radeon_benchmark_move(rdev, common_modes[i],
234 RADEON_GEM_DOMAIN_GTT,
235 RADEON_GEM_DOMAIN_VRAM);
238 /* VRAM to GTT, buffer size sweep, common modes */
239 for (i = 1; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
240 radeon_benchmark_move(rdev, common_modes[i],
241 RADEON_GEM_DOMAIN_VRAM,
242 RADEON_GEM_DOMAIN_GTT);
245 /* VRAM to VRAM, buffer size sweep, common modes */
246 for (i = 1; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
247 radeon_benchmark_move(rdev, common_modes[i],
248 RADEON_GEM_DOMAIN_VRAM,
249 RADEON_GEM_DOMAIN_VRAM);
253 DRM_ERROR("Unknown benchmark\n");