2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
38 #include "intel_sdvo_regs.h"
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
55 static const char *tv_format_names[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
68 struct intel_encoder base;
70 struct i2c_adapter *i2c;
73 struct i2c_adapter ddc;
75 /* Register for the SDVO device: SDVOB or SDVOC */
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
85 struct intel_sdvo_caps caps;
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min, pixel_clock_max;
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
94 uint16_t attached_output;
97 * Hotplug activation bits for this device
99 uint16_t hotplug_active;
102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 uint32_t color_range;
108 * This is set if we're going to treat the device as TV-out.
110 * While we have these nice friendly flags for output types that ought
111 * to decide this for us, the S-Video output on our HDMI+S-Video card
112 * shows up as RGB1 (VGA).
116 /* On different gens SDVOB is at different places. */
119 /* This is for current tv format name */
123 * This is set if we treat the device as HDMI, instead of DVI.
126 bool has_hdmi_monitor;
130 * This is set if we detect output of sdvo device as LVDS and
131 * have a valid fixed mode to use with the panel.
136 * This is sdvo fixed pannel mode pointer
138 struct drm_display_mode *sdvo_lvds_fixed_mode;
140 /* DDC bus used by this SDVO encoder */
144 struct intel_sdvo_connector {
145 struct intel_connector base;
147 /* Mark the type of connector */
148 uint16_t output_flag;
150 enum hdmi_force_audio force_audio;
152 /* This contains all current supported TV format */
153 u8 tv_format_supported[TV_FORMAT_NUM];
154 int format_supported_num;
155 struct drm_property *tv_format;
157 /* add the property for the SDVO-TV */
158 struct drm_property *left;
159 struct drm_property *right;
160 struct drm_property *top;
161 struct drm_property *bottom;
162 struct drm_property *hpos;
163 struct drm_property *vpos;
164 struct drm_property *contrast;
165 struct drm_property *saturation;
166 struct drm_property *hue;
167 struct drm_property *sharpness;
168 struct drm_property *flicker_filter;
169 struct drm_property *flicker_filter_adaptive;
170 struct drm_property *flicker_filter_2d;
171 struct drm_property *tv_chroma_filter;
172 struct drm_property *tv_luma_filter;
173 struct drm_property *dot_crawl;
175 /* add the property for the SDVO-TV/LVDS */
176 struct drm_property *brightness;
178 /* Add variable to record current setting for the above property */
179 u32 left_margin, right_margin, top_margin, bottom_margin;
181 /* this is to get the range of margin.*/
182 u32 max_hscan, max_vscan;
183 u32 max_hpos, cur_hpos;
184 u32 max_vpos, cur_vpos;
185 u32 cur_brightness, max_brightness;
186 u32 cur_contrast, max_contrast;
187 u32 cur_saturation, max_saturation;
188 u32 cur_hue, max_hue;
189 u32 cur_sharpness, max_sharpness;
190 u32 cur_flicker_filter, max_flicker_filter;
191 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
192 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
193 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
194 u32 cur_tv_luma_filter, max_tv_luma_filter;
195 u32 cur_dot_crawl, max_dot_crawl;
198 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
200 return container_of(encoder, struct intel_sdvo, base.base);
203 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
205 return container_of(intel_attached_encoder(connector),
206 struct intel_sdvo, base);
209 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
211 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
215 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
217 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
218 struct intel_sdvo_connector *intel_sdvo_connector,
221 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
222 struct intel_sdvo_connector *intel_sdvo_connector);
225 * Writes the SDVOB or SDVOC with the given value, but always writes both
226 * SDVOB and SDVOC to work around apparent hardware issues (according to
227 * comments in the BIOS).
229 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
231 struct drm_device *dev = intel_sdvo->base.base.dev;
232 struct drm_i915_private *dev_priv = dev->dev_private;
233 u32 bval = val, cval = val;
236 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
237 I915_WRITE(intel_sdvo->sdvo_reg, val);
238 I915_READ(intel_sdvo->sdvo_reg);
242 if (intel_sdvo->sdvo_reg == SDVOB) {
243 cval = I915_READ(SDVOC);
245 bval = I915_READ(SDVOB);
248 * Write the registers twice for luck. Sometimes,
249 * writing them only once doesn't appear to 'stick'.
250 * The BIOS does this too. Yay, magic
252 for (i = 0; i < 2; i++)
254 I915_WRITE(SDVOB, bval);
256 I915_WRITE(SDVOC, cval);
261 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
263 struct i2c_msg msgs[] = {
265 .addr = intel_sdvo->slave_addr,
271 .addr = intel_sdvo->slave_addr,
279 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
282 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
286 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
287 /** Mapping of command numbers to names, for debug output */
288 static const struct _sdvo_cmd_name {
291 } sdvo_cmd_names[] = {
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
336 /* Add the op code for SDVO enhancements */
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
405 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
407 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
408 const void *args, int args_len)
412 DRM_DEBUG_KMS("%s: W: %02X ",
413 SDVO_NAME(intel_sdvo), cmd);
414 for (i = 0; i < args_len; i++)
415 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
418 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
419 if (cmd == sdvo_cmd_names[i].cmd) {
420 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
424 if (i == ARRAY_SIZE(sdvo_cmd_names))
425 DRM_LOG_KMS("(%02X)", cmd);
429 static const char *cmd_status_names[] = {
435 "Target not specified",
436 "Scaling not supported"
439 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
440 const void *args, int args_len)
443 struct i2c_msg *msgs;
446 /* Would be simpler to allocate both in one go ? */
447 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
451 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
457 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
459 for (i = 0; i < args_len; i++) {
460 msgs[i].addr = intel_sdvo->slave_addr;
463 msgs[i].buf = buf + 2 *i;
464 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
465 buf[2*i + 1] = ((u8*)args)[i];
467 msgs[i].addr = intel_sdvo->slave_addr;
470 msgs[i].buf = buf + 2*i;
471 buf[2*i + 0] = SDVO_I2C_OPCODE;
474 /* the following two are to read the response */
475 status = SDVO_I2C_CMD_STATUS;
476 msgs[i+1].addr = intel_sdvo->slave_addr;
479 msgs[i+1].buf = &status;
481 msgs[i+2].addr = intel_sdvo->slave_addr;
482 msgs[i+2].flags = I2C_M_RD;
484 msgs[i+2].buf = &status;
486 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
488 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
493 /* failure in I2C transfer */
494 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
504 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
505 void *response, int response_len)
511 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
514 * The documentation states that all commands will be
515 * processed within 15µs, and that we need only poll
516 * the status byte a maximum of 3 times in order for the
517 * command to be complete.
519 * Check 5 times in case the hardware failed to read the docs.
521 if (!intel_sdvo_read_byte(intel_sdvo,
526 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
528 if (!intel_sdvo_read_byte(intel_sdvo,
534 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
535 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
537 DRM_LOG_KMS("(??? %d)", status);
539 if (status != SDVO_CMD_STATUS_SUCCESS)
542 /* Read the command response */
543 for (i = 0; i < response_len; i++) {
544 if (!intel_sdvo_read_byte(intel_sdvo,
545 SDVO_I2C_RETURN_0 + i,
546 &((u8 *)response)[i]))
548 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
554 DRM_LOG_KMS("... failed\n");
558 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
560 if (mode->clock >= 100000)
562 else if (mode->clock >= 50000)
568 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
571 /* This must be the immediately preceding write before the i2c xfer */
572 return intel_sdvo_write_cmd(intel_sdvo,
573 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
577 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
579 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
582 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
586 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
588 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
591 return intel_sdvo_read_response(intel_sdvo, value, len);
594 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
596 struct intel_sdvo_set_target_input_args targets = {0};
597 return intel_sdvo_set_value(intel_sdvo,
598 SDVO_CMD_SET_TARGET_INPUT,
599 &targets, sizeof(targets));
603 * Return whether each input is trained.
605 * This function is making an assumption about the layout of the response,
606 * which should be checked against the docs.
608 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
610 struct intel_sdvo_get_trained_inputs_response response;
612 BUILD_BUG_ON(sizeof(response) != 1);
613 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
614 &response, sizeof(response)))
617 *input_1 = response.input0_trained;
618 *input_2 = response.input1_trained;
622 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
625 return intel_sdvo_set_value(intel_sdvo,
626 SDVO_CMD_SET_ACTIVE_OUTPUTS,
627 &outputs, sizeof(outputs));
630 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
633 return intel_sdvo_get_value(intel_sdvo,
634 SDVO_CMD_GET_ACTIVE_OUTPUTS,
635 outputs, sizeof(*outputs));
638 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
641 u8 state = SDVO_ENCODER_STATE_ON;
644 case DRM_MODE_DPMS_ON:
645 state = SDVO_ENCODER_STATE_ON;
647 case DRM_MODE_DPMS_STANDBY:
648 state = SDVO_ENCODER_STATE_STANDBY;
650 case DRM_MODE_DPMS_SUSPEND:
651 state = SDVO_ENCODER_STATE_SUSPEND;
653 case DRM_MODE_DPMS_OFF:
654 state = SDVO_ENCODER_STATE_OFF;
658 return intel_sdvo_set_value(intel_sdvo,
659 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
662 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
666 struct intel_sdvo_pixel_clock_range clocks;
668 BUILD_BUG_ON(sizeof(clocks) != 4);
669 if (!intel_sdvo_get_value(intel_sdvo,
670 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
671 &clocks, sizeof(clocks)))
674 /* Convert the values from units of 10 kHz to kHz. */
675 *clock_min = clocks.min * 10;
676 *clock_max = clocks.max * 10;
680 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
683 return intel_sdvo_set_value(intel_sdvo,
684 SDVO_CMD_SET_TARGET_OUTPUT,
685 &outputs, sizeof(outputs));
688 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
689 struct intel_sdvo_dtd *dtd)
691 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
692 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
695 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
696 struct intel_sdvo_dtd *dtd)
698 return intel_sdvo_set_timing(intel_sdvo,
699 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
702 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
703 struct intel_sdvo_dtd *dtd)
705 return intel_sdvo_set_timing(intel_sdvo,
706 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
710 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
715 struct intel_sdvo_preferred_input_timing_args args;
717 memset(&args, 0, sizeof(args));
720 args.height = height;
723 if (intel_sdvo->is_lvds &&
724 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
725 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
728 return intel_sdvo_set_value(intel_sdvo,
729 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
730 &args, sizeof(args));
733 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
734 struct intel_sdvo_dtd *dtd)
736 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
737 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
738 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
739 &dtd->part1, sizeof(dtd->part1)) &&
740 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
741 &dtd->part2, sizeof(dtd->part2));
744 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
746 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
749 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
750 const struct drm_display_mode *mode)
752 uint16_t width, height;
753 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
754 uint16_t h_sync_offset, v_sync_offset;
757 width = mode->hdisplay;
758 height = mode->vdisplay;
760 /* do some mode translations */
761 h_blank_len = mode->htotal - mode->hdisplay;
762 h_sync_len = mode->hsync_end - mode->hsync_start;
764 v_blank_len = mode->vtotal - mode->vdisplay;
765 v_sync_len = mode->vsync_end - mode->vsync_start;
767 h_sync_offset = mode->hsync_start - mode->hdisplay;
768 v_sync_offset = mode->vsync_start - mode->vdisplay;
770 mode_clock = mode->clock;
771 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
773 dtd->part1.clock = mode_clock;
775 dtd->part1.h_active = width & 0xff;
776 dtd->part1.h_blank = h_blank_len & 0xff;
777 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
778 ((h_blank_len >> 8) & 0xf);
779 dtd->part1.v_active = height & 0xff;
780 dtd->part1.v_blank = v_blank_len & 0xff;
781 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
782 ((v_blank_len >> 8) & 0xf);
784 dtd->part2.h_sync_off = h_sync_offset & 0xff;
785 dtd->part2.h_sync_width = h_sync_len & 0xff;
786 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
788 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
789 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
790 ((v_sync_len & 0x30) >> 4);
792 dtd->part2.dtd_flags = 0x18;
793 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
794 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
795 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
796 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
797 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
798 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
800 dtd->part2.sdvo_flags = 0;
801 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
802 dtd->part2.reserved = 0;
805 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
806 const struct intel_sdvo_dtd *dtd)
808 mode->hdisplay = dtd->part1.h_active;
809 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
810 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
811 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
812 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
813 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
814 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
815 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
817 mode->vdisplay = dtd->part1.v_active;
818 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
819 mode->vsync_start = mode->vdisplay;
820 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
821 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
822 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
823 mode->vsync_end = mode->vsync_start +
824 (dtd->part2.v_sync_off_width & 0xf);
825 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
826 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
827 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
829 mode->clock = dtd->part1.clock * 10;
831 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
832 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
833 mode->flags |= DRM_MODE_FLAG_INTERLACE;
834 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
835 mode->flags |= DRM_MODE_FLAG_PHSYNC;
836 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
837 mode->flags |= DRM_MODE_FLAG_PVSYNC;
840 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
842 struct intel_sdvo_encode encode;
844 BUILD_BUG_ON(sizeof(encode) != 2);
845 return intel_sdvo_get_value(intel_sdvo,
846 SDVO_CMD_GET_SUPP_ENCODE,
847 &encode, sizeof(encode));
850 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
853 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
856 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
859 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
863 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
866 uint8_t set_buf_index[2];
872 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
874 for (i = 0; i <= av_split; i++) {
875 set_buf_index[0] = i; set_buf_index[1] = 0;
876 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
878 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
879 intel_sdvo_read_response(encoder, &buf_size, 1);
882 for (j = 0; j <= buf_size; j += 8) {
883 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
885 intel_sdvo_read_response(encoder, pos, 8);
892 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
894 struct dip_infoframe avi_if = {
895 .type = DIP_TYPE_AVI,
896 .ver = DIP_VERSION_AVI,
899 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
900 uint8_t set_buf_index[2] = { 1, 0 };
901 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
902 uint64_t *data = (uint64_t *)sdvo_data;
905 intel_dip_infoframe_csum(&avi_if);
907 /* sdvo spec says that the ecc is handled by the hw, and it looks like
908 * we must not send the ecc field, either. */
909 memcpy(sdvo_data, &avi_if, 3);
910 sdvo_data[3] = avi_if.checksum;
911 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
913 if (!intel_sdvo_set_value(intel_sdvo,
914 SDVO_CMD_SET_HBUF_INDEX,
918 for (i = 0; i < sizeof(sdvo_data); i += 8) {
919 if (!intel_sdvo_set_value(intel_sdvo,
920 SDVO_CMD_SET_HBUF_DATA,
926 return intel_sdvo_set_value(intel_sdvo,
927 SDVO_CMD_SET_HBUF_TXRATE,
931 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
933 struct intel_sdvo_tv_format format;
936 format_map = 1 << intel_sdvo->tv_format_index;
937 memset(&format, 0, sizeof(format));
938 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
940 BUILD_BUG_ON(sizeof(format) != 6);
941 return intel_sdvo_set_value(intel_sdvo,
942 SDVO_CMD_SET_TV_FORMAT,
943 &format, sizeof(format));
947 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
948 const struct drm_display_mode *mode)
950 struct intel_sdvo_dtd output_dtd;
952 if (!intel_sdvo_set_target_output(intel_sdvo,
953 intel_sdvo->attached_output))
956 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
957 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
963 /* Asks the sdvo controller for the preferred input mode given the output mode.
964 * Unfortunately we have to set up the full output mode to do that. */
966 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
967 const struct drm_display_mode *mode,
968 struct drm_display_mode *adjusted_mode)
970 struct intel_sdvo_dtd input_dtd;
972 /* Reset the input timing to the screen. Assume always input 0. */
973 if (!intel_sdvo_set_target_input(intel_sdvo))
976 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
982 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
986 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
991 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
992 const struct drm_display_mode *mode,
993 struct drm_display_mode *adjusted_mode)
995 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
998 /* We need to construct preferred input timings based on our
999 * output timings. To do that, we have to set the output
1000 * timings, even though this isn't really the right place in
1001 * the sequence to do it. Oh well.
1003 if (intel_sdvo->is_tv) {
1004 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1007 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1010 } else if (intel_sdvo->is_lvds) {
1011 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1012 intel_sdvo->sdvo_lvds_fixed_mode))
1015 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1020 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1021 * SDVO device will factor out the multiplier during mode_set.
1023 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1024 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1029 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1030 struct drm_display_mode *mode,
1031 struct drm_display_mode *adjusted_mode)
1033 struct drm_device *dev = encoder->dev;
1034 struct drm_i915_private *dev_priv = dev->dev_private;
1035 struct drm_crtc *crtc = encoder->crtc;
1036 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1037 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1039 struct intel_sdvo_in_out_map in_out;
1040 struct intel_sdvo_dtd input_dtd, output_dtd;
1041 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1047 /* First, set the input mapping for the first input to our controlled
1048 * output. This is only correct if we're a single-input device, in
1049 * which case the first input is the output from the appropriate SDVO
1050 * channel on the motherboard. In a two-input device, the first input
1051 * will be SDVOB and the second SDVOC.
1053 in_out.in0 = intel_sdvo->attached_output;
1056 intel_sdvo_set_value(intel_sdvo,
1057 SDVO_CMD_SET_IN_OUT_MAP,
1058 &in_out, sizeof(in_out));
1060 /* Set the output timings to the screen */
1061 if (!intel_sdvo_set_target_output(intel_sdvo,
1062 intel_sdvo->attached_output))
1065 /* lvds has a special fixed output timing. */
1066 if (intel_sdvo->is_lvds)
1067 intel_sdvo_get_dtd_from_mode(&output_dtd,
1068 intel_sdvo->sdvo_lvds_fixed_mode);
1070 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1071 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1072 DRM_INFO("Setting output timings on %s failed\n",
1073 SDVO_NAME(intel_sdvo));
1075 /* Set the input timing to the screen. Assume always input 0. */
1076 if (!intel_sdvo_set_target_input(intel_sdvo))
1079 if (intel_sdvo->has_hdmi_monitor) {
1080 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1081 intel_sdvo_set_colorimetry(intel_sdvo,
1082 SDVO_COLORIMETRY_RGB256);
1083 intel_sdvo_set_avi_infoframe(intel_sdvo);
1085 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1087 if (intel_sdvo->is_tv &&
1088 !intel_sdvo_set_tv_format(intel_sdvo))
1091 /* We have tried to get input timing in mode_fixup, and filled into
1094 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1095 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1096 DRM_INFO("Setting input timings on %s failed\n",
1097 SDVO_NAME(intel_sdvo));
1099 switch (pixel_multiplier) {
1101 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1102 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1103 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1105 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1108 /* Set the SDVO control regs. */
1109 if (INTEL_INFO(dev)->gen >= 4) {
1110 /* The real mode polarity is set by the SDVO commands, using
1111 * struct intel_sdvo_dtd. */
1112 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1113 if (intel_sdvo->is_hdmi)
1114 sdvox |= intel_sdvo->color_range;
1115 if (INTEL_INFO(dev)->gen < 5)
1116 sdvox |= SDVO_BORDER_ENABLE;
1118 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1119 switch (intel_sdvo->sdvo_reg) {
1121 sdvox &= SDVOB_PRESERVE_MASK;
1124 sdvox &= SDVOC_PRESERVE_MASK;
1127 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1130 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1131 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1133 sdvox |= TRANSCODER(intel_crtc->pipe);
1135 if (intel_sdvo->has_hdmi_audio)
1136 sdvox |= SDVO_AUDIO_ENABLE;
1138 if (INTEL_INFO(dev)->gen >= 4) {
1139 /* done in crtc_mode_set as the dpll_md reg must be written early */
1140 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1141 /* done in crtc_mode_set as it lives inside the dpll register */
1143 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1146 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1147 INTEL_INFO(dev)->gen < 5)
1148 sdvox |= SDVO_STALL_SELECT;
1149 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1152 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1154 struct intel_sdvo_connector *intel_sdvo_connector =
1155 to_intel_sdvo_connector(&connector->base);
1156 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1159 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1161 if (active_outputs & intel_sdvo_connector->output_flag)
1167 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1170 struct drm_device *dev = encoder->base.dev;
1171 struct drm_i915_private *dev_priv = dev->dev_private;
1172 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1175 tmp = I915_READ(intel_sdvo->sdvo_reg);
1177 if (!(tmp & SDVO_ENABLE))
1180 if (HAS_PCH_CPT(dev))
1181 *pipe = PORT_TO_PIPE_CPT(tmp);
1183 *pipe = PORT_TO_PIPE(tmp);
1188 static void intel_disable_sdvo(struct intel_encoder *encoder)
1190 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1191 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1194 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1196 intel_sdvo_set_encoder_power_state(intel_sdvo,
1199 temp = I915_READ(intel_sdvo->sdvo_reg);
1200 if ((temp & SDVO_ENABLE) != 0) {
1201 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1205 static void intel_enable_sdvo(struct intel_encoder *encoder)
1207 struct drm_device *dev = encoder->base.dev;
1208 struct drm_i915_private *dev_priv = dev->dev_private;
1209 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1210 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1212 bool input1, input2;
1216 temp = I915_READ(intel_sdvo->sdvo_reg);
1217 if ((temp & SDVO_ENABLE) == 0)
1218 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1219 for (i = 0; i < 2; i++)
1220 intel_wait_for_vblank(dev, intel_crtc->pipe);
1222 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1223 /* Warn if the device reported failure to sync.
1224 * A lot of SDVO devices fail to notify of sync, but it's
1225 * a given it the status is a success, we succeeded.
1227 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1228 DRM_DEBUG_KMS("First %s output reported failure to "
1229 "sync\n", SDVO_NAME(intel_sdvo));
1233 intel_sdvo_set_encoder_power_state(intel_sdvo,
1235 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1238 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1240 struct drm_crtc *crtc;
1241 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1243 /* dvo supports only 2 dpms states. */
1244 if (mode != DRM_MODE_DPMS_ON)
1245 mode = DRM_MODE_DPMS_OFF;
1247 if (mode == connector->dpms)
1250 connector->dpms = mode;
1252 /* Only need to change hw state when actually enabled */
1253 crtc = intel_sdvo->base.base.crtc;
1255 intel_sdvo->base.connectors_active = false;
1259 if (mode != DRM_MODE_DPMS_ON) {
1260 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1262 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1264 intel_sdvo->base.connectors_active = false;
1266 intel_crtc_update_dpms(crtc);
1268 intel_sdvo->base.connectors_active = true;
1270 intel_crtc_update_dpms(crtc);
1273 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1274 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1277 intel_modeset_check_state(connector->dev);
1280 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1281 struct drm_display_mode *mode)
1283 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1285 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1286 return MODE_NO_DBLESCAN;
1288 if (intel_sdvo->pixel_clock_min > mode->clock)
1289 return MODE_CLOCK_LOW;
1291 if (intel_sdvo->pixel_clock_max < mode->clock)
1292 return MODE_CLOCK_HIGH;
1294 if (intel_sdvo->is_lvds) {
1295 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1298 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1305 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1307 BUILD_BUG_ON(sizeof(*caps) != 8);
1308 if (!intel_sdvo_get_value(intel_sdvo,
1309 SDVO_CMD_GET_DEVICE_CAPS,
1310 caps, sizeof(*caps)))
1313 DRM_DEBUG_KMS("SDVO capabilities:\n"
1316 " device_rev_id: %d\n"
1317 " sdvo_version_major: %d\n"
1318 " sdvo_version_minor: %d\n"
1319 " sdvo_inputs_mask: %d\n"
1320 " smooth_scaling: %d\n"
1321 " sharp_scaling: %d\n"
1323 " down_scaling: %d\n"
1324 " stall_support: %d\n"
1325 " output_flags: %d\n",
1328 caps->device_rev_id,
1329 caps->sdvo_version_major,
1330 caps->sdvo_version_minor,
1331 caps->sdvo_inputs_mask,
1332 caps->smooth_scaling,
1333 caps->sharp_scaling,
1336 caps->stall_support,
1337 caps->output_flags);
1342 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1344 struct drm_device *dev = intel_sdvo->base.base.dev;
1347 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1349 if (IS_I945G(dev) || IS_I945GM(dev))
1352 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1353 &hotplug, sizeof(hotplug)))
1359 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1361 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1363 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1364 &intel_sdvo->hotplug_active, 2);
1368 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1370 /* Is there more than one type of output? */
1371 return hweight16(intel_sdvo->caps.output_flags) > 1;
1374 static struct edid *
1375 intel_sdvo_get_edid(struct drm_connector *connector)
1377 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1378 return drm_get_edid(connector, &sdvo->ddc);
1381 /* Mac mini hack -- use the same DDC as the analog connector */
1382 static struct edid *
1383 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1385 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1387 return drm_get_edid(connector,
1388 intel_gmbus_get_adapter(dev_priv,
1389 dev_priv->crt_ddc_pin));
1392 static enum drm_connector_status
1393 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1395 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1396 enum drm_connector_status status;
1399 edid = intel_sdvo_get_edid(connector);
1401 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1402 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1405 * Don't use the 1 as the argument of DDC bus switch to get
1406 * the EDID. It is used for SDVO SPD ROM.
1408 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1409 intel_sdvo->ddc_bus = ddc;
1410 edid = intel_sdvo_get_edid(connector);
1415 * If we found the EDID on the other bus,
1416 * assume that is the correct DDC bus.
1419 intel_sdvo->ddc_bus = saved_ddc;
1423 * When there is no edid and no monitor is connected with VGA
1424 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1427 edid = intel_sdvo_get_analog_edid(connector);
1429 status = connector_status_unknown;
1431 /* DDC bus is shared, match EDID to connector type */
1432 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1433 status = connector_status_connected;
1434 if (intel_sdvo->is_hdmi) {
1435 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1436 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1439 status = connector_status_disconnected;
1443 if (status == connector_status_connected) {
1444 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1445 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1446 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1453 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1456 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1457 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1459 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1460 connector_is_digital, monitor_is_digital);
1461 return connector_is_digital == monitor_is_digital;
1464 static enum drm_connector_status
1465 intel_sdvo_detect(struct drm_connector *connector, bool force)
1468 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1469 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1470 enum drm_connector_status ret;
1472 if (!intel_sdvo_write_cmd(intel_sdvo,
1473 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1474 return connector_status_unknown;
1476 /* add 30ms delay when the output type might be TV */
1477 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1480 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1481 return connector_status_unknown;
1483 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1484 response & 0xff, response >> 8,
1485 intel_sdvo_connector->output_flag);
1488 return connector_status_disconnected;
1490 intel_sdvo->attached_output = response;
1492 intel_sdvo->has_hdmi_monitor = false;
1493 intel_sdvo->has_hdmi_audio = false;
1495 if ((intel_sdvo_connector->output_flag & response) == 0)
1496 ret = connector_status_disconnected;
1497 else if (IS_TMDS(intel_sdvo_connector))
1498 ret = intel_sdvo_tmds_sink_detect(connector);
1502 /* if we have an edid check it matches the connection */
1503 edid = intel_sdvo_get_edid(connector);
1505 edid = intel_sdvo_get_analog_edid(connector);
1507 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1509 ret = connector_status_connected;
1511 ret = connector_status_disconnected;
1515 ret = connector_status_connected;
1518 /* May update encoder flag for like clock for SDVO TV, etc.*/
1519 if (ret == connector_status_connected) {
1520 intel_sdvo->is_tv = false;
1521 intel_sdvo->is_lvds = false;
1522 intel_sdvo->base.needs_tv_clock = false;
1524 if (response & SDVO_TV_MASK) {
1525 intel_sdvo->is_tv = true;
1526 intel_sdvo->base.needs_tv_clock = true;
1528 if (response & SDVO_LVDS_MASK)
1529 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1535 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1539 /* set the bus switch and get the modes */
1540 edid = intel_sdvo_get_edid(connector);
1543 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1544 * link between analog and digital outputs. So, if the regular SDVO
1545 * DDC fails, check to see if the analog output is disconnected, in
1546 * which case we'll look there for the digital DDC data.
1549 edid = intel_sdvo_get_analog_edid(connector);
1552 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1554 drm_mode_connector_update_edid_property(connector, edid);
1555 drm_add_edid_modes(connector, edid);
1563 * Set of SDVO TV modes.
1564 * Note! This is in reply order (see loop in get_tv_modes).
1565 * XXX: all 60Hz refresh?
1567 static const struct drm_display_mode sdvo_tv_modes[] = {
1568 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1569 416, 0, 200, 201, 232, 233, 0,
1570 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1571 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1572 416, 0, 240, 241, 272, 273, 0,
1573 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1574 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1575 496, 0, 300, 301, 332, 333, 0,
1576 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1577 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1578 736, 0, 350, 351, 382, 383, 0,
1579 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1580 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1581 736, 0, 400, 401, 432, 433, 0,
1582 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1583 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1584 736, 0, 480, 481, 512, 513, 0,
1585 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1586 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1587 800, 0, 480, 481, 512, 513, 0,
1588 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1589 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1590 800, 0, 576, 577, 608, 609, 0,
1591 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1592 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1593 816, 0, 350, 351, 382, 383, 0,
1594 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1595 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1596 816, 0, 400, 401, 432, 433, 0,
1597 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1598 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1599 816, 0, 480, 481, 512, 513, 0,
1600 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1601 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1602 816, 0, 540, 541, 572, 573, 0,
1603 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1604 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1605 816, 0, 576, 577, 608, 609, 0,
1606 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1607 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1608 864, 0, 576, 577, 608, 609, 0,
1609 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1610 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1611 896, 0, 600, 601, 632, 633, 0,
1612 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1613 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1614 928, 0, 624, 625, 656, 657, 0,
1615 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1616 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1617 1016, 0, 766, 767, 798, 799, 0,
1618 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1619 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1620 1120, 0, 768, 769, 800, 801, 0,
1621 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1622 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1623 1376, 0, 1024, 1025, 1056, 1057, 0,
1624 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1627 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1629 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1630 struct intel_sdvo_sdtv_resolution_request tv_res;
1631 uint32_t reply = 0, format_map = 0;
1634 /* Read the list of supported input resolutions for the selected TV
1637 format_map = 1 << intel_sdvo->tv_format_index;
1638 memcpy(&tv_res, &format_map,
1639 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1641 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1644 BUILD_BUG_ON(sizeof(tv_res) != 3);
1645 if (!intel_sdvo_write_cmd(intel_sdvo,
1646 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1647 &tv_res, sizeof(tv_res)))
1649 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1652 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1653 if (reply & (1 << i)) {
1654 struct drm_display_mode *nmode;
1655 nmode = drm_mode_duplicate(connector->dev,
1658 drm_mode_probed_add(connector, nmode);
1662 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1664 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1665 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1666 struct drm_display_mode *newmode;
1669 * Attempt to get the mode list from DDC.
1670 * Assume that the preferred modes are
1671 * arranged in priority order.
1673 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1674 if (list_empty(&connector->probed_modes) == false)
1677 /* Fetch modes from VBT */
1678 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1679 newmode = drm_mode_duplicate(connector->dev,
1680 dev_priv->sdvo_lvds_vbt_mode);
1681 if (newmode != NULL) {
1682 /* Guarantee the mode is preferred */
1683 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1684 DRM_MODE_TYPE_DRIVER);
1685 drm_mode_probed_add(connector, newmode);
1690 list_for_each_entry(newmode, &connector->probed_modes, head) {
1691 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1692 intel_sdvo->sdvo_lvds_fixed_mode =
1693 drm_mode_duplicate(connector->dev, newmode);
1695 intel_sdvo->is_lvds = true;
1702 static int intel_sdvo_get_modes(struct drm_connector *connector)
1704 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1706 if (IS_TV(intel_sdvo_connector))
1707 intel_sdvo_get_tv_modes(connector);
1708 else if (IS_LVDS(intel_sdvo_connector))
1709 intel_sdvo_get_lvds_modes(connector);
1711 intel_sdvo_get_ddc_modes(connector);
1713 return !list_empty(&connector->probed_modes);
1717 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1719 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1720 struct drm_device *dev = connector->dev;
1722 if (intel_sdvo_connector->left)
1723 drm_property_destroy(dev, intel_sdvo_connector->left);
1724 if (intel_sdvo_connector->right)
1725 drm_property_destroy(dev, intel_sdvo_connector->right);
1726 if (intel_sdvo_connector->top)
1727 drm_property_destroy(dev, intel_sdvo_connector->top);
1728 if (intel_sdvo_connector->bottom)
1729 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1730 if (intel_sdvo_connector->hpos)
1731 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1732 if (intel_sdvo_connector->vpos)
1733 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1734 if (intel_sdvo_connector->saturation)
1735 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1736 if (intel_sdvo_connector->contrast)
1737 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1738 if (intel_sdvo_connector->hue)
1739 drm_property_destroy(dev, intel_sdvo_connector->hue);
1740 if (intel_sdvo_connector->sharpness)
1741 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1742 if (intel_sdvo_connector->flicker_filter)
1743 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1744 if (intel_sdvo_connector->flicker_filter_2d)
1745 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1746 if (intel_sdvo_connector->flicker_filter_adaptive)
1747 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1748 if (intel_sdvo_connector->tv_luma_filter)
1749 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1750 if (intel_sdvo_connector->tv_chroma_filter)
1751 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1752 if (intel_sdvo_connector->dot_crawl)
1753 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1754 if (intel_sdvo_connector->brightness)
1755 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1758 static void intel_sdvo_destroy(struct drm_connector *connector)
1760 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1762 if (intel_sdvo_connector->tv_format)
1763 drm_property_destroy(connector->dev,
1764 intel_sdvo_connector->tv_format);
1766 intel_sdvo_destroy_enhance_property(connector);
1767 drm_sysfs_connector_remove(connector);
1768 drm_connector_cleanup(connector);
1772 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1774 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1776 bool has_audio = false;
1778 if (!intel_sdvo->is_hdmi)
1781 edid = intel_sdvo_get_edid(connector);
1782 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1783 has_audio = drm_detect_monitor_audio(edid);
1790 intel_sdvo_set_property(struct drm_connector *connector,
1791 struct drm_property *property,
1794 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1795 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1796 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1797 uint16_t temp_value;
1801 ret = drm_connector_property_set_value(connector, property, val);
1805 if (property == dev_priv->force_audio_property) {
1809 if (i == intel_sdvo_connector->force_audio)
1812 intel_sdvo_connector->force_audio = i;
1814 if (i == HDMI_AUDIO_AUTO)
1815 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1817 has_audio = (i == HDMI_AUDIO_ON);
1819 if (has_audio == intel_sdvo->has_hdmi_audio)
1822 intel_sdvo->has_hdmi_audio = has_audio;
1826 if (property == dev_priv->broadcast_rgb_property) {
1827 if (val == !!intel_sdvo->color_range)
1830 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1834 #define CHECK_PROPERTY(name, NAME) \
1835 if (intel_sdvo_connector->name == property) { \
1836 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1837 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1838 cmd = SDVO_CMD_SET_##NAME; \
1839 intel_sdvo_connector->cur_##name = temp_value; \
1843 if (property == intel_sdvo_connector->tv_format) {
1844 if (val >= TV_FORMAT_NUM)
1847 if (intel_sdvo->tv_format_index ==
1848 intel_sdvo_connector->tv_format_supported[val])
1851 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1853 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1855 if (intel_sdvo_connector->left == property) {
1856 drm_connector_property_set_value(connector,
1857 intel_sdvo_connector->right, val);
1858 if (intel_sdvo_connector->left_margin == temp_value)
1861 intel_sdvo_connector->left_margin = temp_value;
1862 intel_sdvo_connector->right_margin = temp_value;
1863 temp_value = intel_sdvo_connector->max_hscan -
1864 intel_sdvo_connector->left_margin;
1865 cmd = SDVO_CMD_SET_OVERSCAN_H;
1867 } else if (intel_sdvo_connector->right == property) {
1868 drm_connector_property_set_value(connector,
1869 intel_sdvo_connector->left, val);
1870 if (intel_sdvo_connector->right_margin == temp_value)
1873 intel_sdvo_connector->left_margin = temp_value;
1874 intel_sdvo_connector->right_margin = temp_value;
1875 temp_value = intel_sdvo_connector->max_hscan -
1876 intel_sdvo_connector->left_margin;
1877 cmd = SDVO_CMD_SET_OVERSCAN_H;
1879 } else if (intel_sdvo_connector->top == property) {
1880 drm_connector_property_set_value(connector,
1881 intel_sdvo_connector->bottom, val);
1882 if (intel_sdvo_connector->top_margin == temp_value)
1885 intel_sdvo_connector->top_margin = temp_value;
1886 intel_sdvo_connector->bottom_margin = temp_value;
1887 temp_value = intel_sdvo_connector->max_vscan -
1888 intel_sdvo_connector->top_margin;
1889 cmd = SDVO_CMD_SET_OVERSCAN_V;
1891 } else if (intel_sdvo_connector->bottom == property) {
1892 drm_connector_property_set_value(connector,
1893 intel_sdvo_connector->top, val);
1894 if (intel_sdvo_connector->bottom_margin == temp_value)
1897 intel_sdvo_connector->top_margin = temp_value;
1898 intel_sdvo_connector->bottom_margin = temp_value;
1899 temp_value = intel_sdvo_connector->max_vscan -
1900 intel_sdvo_connector->top_margin;
1901 cmd = SDVO_CMD_SET_OVERSCAN_V;
1904 CHECK_PROPERTY(hpos, HPOS)
1905 CHECK_PROPERTY(vpos, VPOS)
1906 CHECK_PROPERTY(saturation, SATURATION)
1907 CHECK_PROPERTY(contrast, CONTRAST)
1908 CHECK_PROPERTY(hue, HUE)
1909 CHECK_PROPERTY(brightness, BRIGHTNESS)
1910 CHECK_PROPERTY(sharpness, SHARPNESS)
1911 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1912 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1913 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1914 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1915 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1916 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1919 return -EINVAL; /* unknown property */
1922 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1927 if (intel_sdvo->base.base.crtc) {
1928 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1929 intel_set_mode(crtc, &crtc->mode,
1930 crtc->x, crtc->y, crtc->fb);
1934 #undef CHECK_PROPERTY
1937 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1938 .mode_fixup = intel_sdvo_mode_fixup,
1939 .mode_set = intel_sdvo_mode_set,
1940 .disable = intel_encoder_noop,
1943 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1944 .dpms = intel_sdvo_dpms,
1945 .detect = intel_sdvo_detect,
1946 .fill_modes = drm_helper_probe_single_connector_modes,
1947 .set_property = intel_sdvo_set_property,
1948 .destroy = intel_sdvo_destroy,
1951 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1952 .get_modes = intel_sdvo_get_modes,
1953 .mode_valid = intel_sdvo_mode_valid,
1954 .best_encoder = intel_best_encoder,
1957 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1959 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1961 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1962 drm_mode_destroy(encoder->dev,
1963 intel_sdvo->sdvo_lvds_fixed_mode);
1965 i2c_del_adapter(&intel_sdvo->ddc);
1966 intel_encoder_destroy(encoder);
1969 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1970 .destroy = intel_sdvo_enc_destroy,
1974 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1977 unsigned int num_bits;
1979 /* Make a mask of outputs less than or equal to our own priority in the
1982 switch (sdvo->controlled_output) {
1983 case SDVO_OUTPUT_LVDS1:
1984 mask |= SDVO_OUTPUT_LVDS1;
1985 case SDVO_OUTPUT_LVDS0:
1986 mask |= SDVO_OUTPUT_LVDS0;
1987 case SDVO_OUTPUT_TMDS1:
1988 mask |= SDVO_OUTPUT_TMDS1;
1989 case SDVO_OUTPUT_TMDS0:
1990 mask |= SDVO_OUTPUT_TMDS0;
1991 case SDVO_OUTPUT_RGB1:
1992 mask |= SDVO_OUTPUT_RGB1;
1993 case SDVO_OUTPUT_RGB0:
1994 mask |= SDVO_OUTPUT_RGB0;
1998 /* Count bits to find what number we are in the priority list. */
1999 mask &= sdvo->caps.output_flags;
2000 num_bits = hweight16(mask);
2001 /* If more than 3 outputs, default to DDC bus 3 for now. */
2005 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2006 sdvo->ddc_bus = 1 << num_bits;
2010 * Choose the appropriate DDC bus for control bus switch command for this
2011 * SDVO output based on the controlled output.
2013 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2014 * outputs, then LVDS outputs.
2017 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2018 struct intel_sdvo *sdvo, u32 reg)
2020 struct sdvo_device_mapping *mapping;
2023 mapping = &(dev_priv->sdvo_mappings[0]);
2025 mapping = &(dev_priv->sdvo_mappings[1]);
2027 if (mapping->initialized)
2028 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2030 intel_sdvo_guess_ddc_bus(sdvo);
2034 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2035 struct intel_sdvo *sdvo, u32 reg)
2037 struct sdvo_device_mapping *mapping;
2041 mapping = &dev_priv->sdvo_mappings[0];
2043 mapping = &dev_priv->sdvo_mappings[1];
2045 pin = GMBUS_PORT_DPB;
2046 if (mapping->initialized)
2047 pin = mapping->i2c_pin;
2049 if (intel_gmbus_is_port_valid(pin)) {
2050 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2051 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
2052 intel_gmbus_force_bit(sdvo->i2c, true);
2054 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
2059 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2061 return intel_sdvo_check_supp_encode(intel_sdvo);
2065 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2067 struct drm_i915_private *dev_priv = dev->dev_private;
2068 struct sdvo_device_mapping *my_mapping, *other_mapping;
2070 if (sdvo->is_sdvob) {
2071 my_mapping = &dev_priv->sdvo_mappings[0];
2072 other_mapping = &dev_priv->sdvo_mappings[1];
2074 my_mapping = &dev_priv->sdvo_mappings[1];
2075 other_mapping = &dev_priv->sdvo_mappings[0];
2078 /* If the BIOS described our SDVO device, take advantage of it. */
2079 if (my_mapping->slave_addr)
2080 return my_mapping->slave_addr;
2082 /* If the BIOS only described a different SDVO device, use the
2083 * address that it isn't using.
2085 if (other_mapping->slave_addr) {
2086 if (other_mapping->slave_addr == 0x70)
2092 /* No SDVO device info is found for another DVO port,
2093 * so use mapping assumption we had before BIOS parsing.
2102 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2103 struct intel_sdvo *encoder)
2105 drm_connector_init(encoder->base.base.dev,
2106 &connector->base.base,
2107 &intel_sdvo_connector_funcs,
2108 connector->base.base.connector_type);
2110 drm_connector_helper_add(&connector->base.base,
2111 &intel_sdvo_connector_helper_funcs);
2113 connector->base.base.interlace_allowed = 1;
2114 connector->base.base.doublescan_allowed = 0;
2115 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2116 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2118 intel_connector_attach_encoder(&connector->base, &encoder->base);
2119 drm_sysfs_connector_add(&connector->base.base);
2123 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2125 struct drm_device *dev = connector->base.base.dev;
2127 intel_attach_force_audio_property(&connector->base.base);
2128 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2129 intel_attach_broadcast_rgb_property(&connector->base.base);
2133 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2135 struct drm_encoder *encoder = &intel_sdvo->base.base;
2136 struct drm_connector *connector;
2137 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2138 struct intel_connector *intel_connector;
2139 struct intel_sdvo_connector *intel_sdvo_connector;
2141 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2142 if (!intel_sdvo_connector)
2146 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2147 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2148 } else if (device == 1) {
2149 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2150 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2153 intel_connector = &intel_sdvo_connector->base;
2154 connector = &intel_connector->base;
2155 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2156 intel_sdvo_connector->output_flag) {
2157 connector->polled = DRM_CONNECTOR_POLL_HPD;
2158 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2159 /* Some SDVO devices have one-shot hotplug interrupts.
2160 * Ensure that they get re-enabled when an interrupt happens.
2162 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2163 intel_sdvo_enable_hotplug(intel_encoder);
2165 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2167 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2168 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2170 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2171 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2172 intel_sdvo->is_hdmi = true;
2174 intel_sdvo->base.cloneable = true;
2176 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2177 if (intel_sdvo->is_hdmi)
2178 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2184 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2186 struct drm_encoder *encoder = &intel_sdvo->base.base;
2187 struct drm_connector *connector;
2188 struct intel_connector *intel_connector;
2189 struct intel_sdvo_connector *intel_sdvo_connector;
2191 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2192 if (!intel_sdvo_connector)
2195 intel_connector = &intel_sdvo_connector->base;
2196 connector = &intel_connector->base;
2197 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2198 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2200 intel_sdvo->controlled_output |= type;
2201 intel_sdvo_connector->output_flag = type;
2203 intel_sdvo->is_tv = true;
2204 intel_sdvo->base.needs_tv_clock = true;
2205 intel_sdvo->base.cloneable = false;
2207 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2209 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2212 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2218 intel_sdvo_destroy(connector);
2223 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2225 struct drm_encoder *encoder = &intel_sdvo->base.base;
2226 struct drm_connector *connector;
2227 struct intel_connector *intel_connector;
2228 struct intel_sdvo_connector *intel_sdvo_connector;
2230 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2231 if (!intel_sdvo_connector)
2234 intel_connector = &intel_sdvo_connector->base;
2235 connector = &intel_connector->base;
2236 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2237 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2238 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2241 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2242 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2243 } else if (device == 1) {
2244 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2245 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2248 intel_sdvo->base.cloneable = true;
2250 intel_sdvo_connector_init(intel_sdvo_connector,
2256 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2258 struct drm_encoder *encoder = &intel_sdvo->base.base;
2259 struct drm_connector *connector;
2260 struct intel_connector *intel_connector;
2261 struct intel_sdvo_connector *intel_sdvo_connector;
2263 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2264 if (!intel_sdvo_connector)
2267 intel_connector = &intel_sdvo_connector->base;
2268 connector = &intel_connector->base;
2269 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2270 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2273 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2274 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2275 } else if (device == 1) {
2276 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2277 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2280 /* SDVO LVDS is cloneable because the SDVO encoder does the upscaling,
2281 * as opposed to native LVDS, where we upscale with the panel-fitter
2282 * (and hence only the native LVDS resolution could be cloned). */
2283 intel_sdvo->base.cloneable = true;
2285 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2286 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2292 intel_sdvo_destroy(connector);
2297 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2299 intel_sdvo->is_tv = false;
2300 intel_sdvo->base.needs_tv_clock = false;
2301 intel_sdvo->is_lvds = false;
2303 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2305 if (flags & SDVO_OUTPUT_TMDS0)
2306 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2309 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2310 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2313 /* TV has no XXX1 function block */
2314 if (flags & SDVO_OUTPUT_SVID0)
2315 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2318 if (flags & SDVO_OUTPUT_CVBS0)
2319 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2322 if (flags & SDVO_OUTPUT_YPRPB0)
2323 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2326 if (flags & SDVO_OUTPUT_RGB0)
2327 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2330 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2331 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2334 if (flags & SDVO_OUTPUT_LVDS0)
2335 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2338 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2339 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2342 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2343 unsigned char bytes[2];
2345 intel_sdvo->controlled_output = 0;
2346 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2347 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2348 SDVO_NAME(intel_sdvo),
2349 bytes[0], bytes[1]);
2352 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2357 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2358 struct intel_sdvo_connector *intel_sdvo_connector,
2361 struct drm_device *dev = intel_sdvo->base.base.dev;
2362 struct intel_sdvo_tv_format format;
2363 uint32_t format_map, i;
2365 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2368 BUILD_BUG_ON(sizeof(format) != 6);
2369 if (!intel_sdvo_get_value(intel_sdvo,
2370 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2371 &format, sizeof(format)))
2374 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2376 if (format_map == 0)
2379 intel_sdvo_connector->format_supported_num = 0;
2380 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2381 if (format_map & (1 << i))
2382 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2385 intel_sdvo_connector->tv_format =
2386 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2387 "mode", intel_sdvo_connector->format_supported_num);
2388 if (!intel_sdvo_connector->tv_format)
2391 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2392 drm_property_add_enum(
2393 intel_sdvo_connector->tv_format, i,
2394 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2396 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2397 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2398 intel_sdvo_connector->tv_format, 0);
2403 #define ENHANCEMENT(name, NAME) do { \
2404 if (enhancements.name) { \
2405 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2406 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2408 intel_sdvo_connector->max_##name = data_value[0]; \
2409 intel_sdvo_connector->cur_##name = response; \
2410 intel_sdvo_connector->name = \
2411 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2412 if (!intel_sdvo_connector->name) return false; \
2413 drm_connector_attach_property(connector, \
2414 intel_sdvo_connector->name, \
2415 intel_sdvo_connector->cur_##name); \
2416 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2417 data_value[0], data_value[1], response); \
2422 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2423 struct intel_sdvo_connector *intel_sdvo_connector,
2424 struct intel_sdvo_enhancements_reply enhancements)
2426 struct drm_device *dev = intel_sdvo->base.base.dev;
2427 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2428 uint16_t response, data_value[2];
2430 /* when horizontal overscan is supported, Add the left/right property */
2431 if (enhancements.overscan_h) {
2432 if (!intel_sdvo_get_value(intel_sdvo,
2433 SDVO_CMD_GET_MAX_OVERSCAN_H,
2437 if (!intel_sdvo_get_value(intel_sdvo,
2438 SDVO_CMD_GET_OVERSCAN_H,
2442 intel_sdvo_connector->max_hscan = data_value[0];
2443 intel_sdvo_connector->left_margin = data_value[0] - response;
2444 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2445 intel_sdvo_connector->left =
2446 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2447 if (!intel_sdvo_connector->left)
2450 drm_connector_attach_property(connector,
2451 intel_sdvo_connector->left,
2452 intel_sdvo_connector->left_margin);
2454 intel_sdvo_connector->right =
2455 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2456 if (!intel_sdvo_connector->right)
2459 drm_connector_attach_property(connector,
2460 intel_sdvo_connector->right,
2461 intel_sdvo_connector->right_margin);
2462 DRM_DEBUG_KMS("h_overscan: max %d, "
2463 "default %d, current %d\n",
2464 data_value[0], data_value[1], response);
2467 if (enhancements.overscan_v) {
2468 if (!intel_sdvo_get_value(intel_sdvo,
2469 SDVO_CMD_GET_MAX_OVERSCAN_V,
2473 if (!intel_sdvo_get_value(intel_sdvo,
2474 SDVO_CMD_GET_OVERSCAN_V,
2478 intel_sdvo_connector->max_vscan = data_value[0];
2479 intel_sdvo_connector->top_margin = data_value[0] - response;
2480 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2481 intel_sdvo_connector->top =
2482 drm_property_create_range(dev, 0,
2483 "top_margin", 0, data_value[0]);
2484 if (!intel_sdvo_connector->top)
2487 drm_connector_attach_property(connector,
2488 intel_sdvo_connector->top,
2489 intel_sdvo_connector->top_margin);
2491 intel_sdvo_connector->bottom =
2492 drm_property_create_range(dev, 0,
2493 "bottom_margin", 0, data_value[0]);
2494 if (!intel_sdvo_connector->bottom)
2497 drm_connector_attach_property(connector,
2498 intel_sdvo_connector->bottom,
2499 intel_sdvo_connector->bottom_margin);
2500 DRM_DEBUG_KMS("v_overscan: max %d, "
2501 "default %d, current %d\n",
2502 data_value[0], data_value[1], response);
2505 ENHANCEMENT(hpos, HPOS);
2506 ENHANCEMENT(vpos, VPOS);
2507 ENHANCEMENT(saturation, SATURATION);
2508 ENHANCEMENT(contrast, CONTRAST);
2509 ENHANCEMENT(hue, HUE);
2510 ENHANCEMENT(sharpness, SHARPNESS);
2511 ENHANCEMENT(brightness, BRIGHTNESS);
2512 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2513 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2514 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2515 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2516 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2518 if (enhancements.dot_crawl) {
2519 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2522 intel_sdvo_connector->max_dot_crawl = 1;
2523 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2524 intel_sdvo_connector->dot_crawl =
2525 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2526 if (!intel_sdvo_connector->dot_crawl)
2529 drm_connector_attach_property(connector,
2530 intel_sdvo_connector->dot_crawl,
2531 intel_sdvo_connector->cur_dot_crawl);
2532 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2539 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2540 struct intel_sdvo_connector *intel_sdvo_connector,
2541 struct intel_sdvo_enhancements_reply enhancements)
2543 struct drm_device *dev = intel_sdvo->base.base.dev;
2544 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2545 uint16_t response, data_value[2];
2547 ENHANCEMENT(brightness, BRIGHTNESS);
2553 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2554 struct intel_sdvo_connector *intel_sdvo_connector)
2557 struct intel_sdvo_enhancements_reply reply;
2561 BUILD_BUG_ON(sizeof(enhancements) != 2);
2563 enhancements.response = 0;
2564 intel_sdvo_get_value(intel_sdvo,
2565 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2566 &enhancements, sizeof(enhancements));
2567 if (enhancements.response == 0) {
2568 DRM_DEBUG_KMS("No enhancement is supported\n");
2572 if (IS_TV(intel_sdvo_connector))
2573 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2574 else if (IS_LVDS(intel_sdvo_connector))
2575 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2580 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2581 struct i2c_msg *msgs,
2584 struct intel_sdvo *sdvo = adapter->algo_data;
2586 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2589 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2592 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2594 struct intel_sdvo *sdvo = adapter->algo_data;
2595 return sdvo->i2c->algo->functionality(sdvo->i2c);
2598 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2599 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2600 .functionality = intel_sdvo_ddc_proxy_func
2604 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2605 struct drm_device *dev)
2607 sdvo->ddc.owner = THIS_MODULE;
2608 sdvo->ddc.class = I2C_CLASS_DDC;
2609 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2610 sdvo->ddc.dev.parent = &dev->pdev->dev;
2611 sdvo->ddc.algo_data = sdvo;
2612 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2614 return i2c_add_adapter(&sdvo->ddc) == 0;
2617 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2619 struct drm_i915_private *dev_priv = dev->dev_private;
2620 struct intel_encoder *intel_encoder;
2621 struct intel_sdvo *intel_sdvo;
2625 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2629 intel_sdvo->sdvo_reg = sdvo_reg;
2630 intel_sdvo->is_sdvob = is_sdvob;
2631 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2632 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2633 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2638 /* encoder type will be decided later */
2639 intel_encoder = &intel_sdvo->base;
2640 intel_encoder->type = INTEL_OUTPUT_SDVO;
2641 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2643 /* Read the regs to test if we can talk to the device */
2644 for (i = 0; i < 0x40; i++) {
2647 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2648 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2649 SDVO_NAME(intel_sdvo));
2656 hotplug_mask = intel_sdvo->is_sdvob ?
2657 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2658 } else if (IS_GEN4(dev)) {
2659 hotplug_mask = intel_sdvo->is_sdvob ?
2660 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2662 hotplug_mask = intel_sdvo->is_sdvob ?
2663 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2666 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2668 intel_encoder->disable = intel_disable_sdvo;
2669 intel_encoder->enable = intel_enable_sdvo;
2670 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2672 /* In default case sdvo lvds is false */
2673 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2676 if (intel_sdvo_output_setup(intel_sdvo,
2677 intel_sdvo->caps.output_flags) != true) {
2678 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2679 SDVO_NAME(intel_sdvo));
2683 /* Only enable the hotplug irq if we need it, to work around noisy
2686 if (intel_sdvo->hotplug_active)
2687 dev_priv->hotplug_supported_mask |= hotplug_mask;
2689 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2691 /* Set the input timing to the screen. Assume always input 0. */
2692 if (!intel_sdvo_set_target_input(intel_sdvo))
2695 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2696 &intel_sdvo->pixel_clock_min,
2697 &intel_sdvo->pixel_clock_max))
2700 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2701 "clock range %dMHz - %dMHz, "
2702 "input 1: %c, input 2: %c, "
2703 "output 1: %c, output 2: %c\n",
2704 SDVO_NAME(intel_sdvo),
2705 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2706 intel_sdvo->caps.device_rev_id,
2707 intel_sdvo->pixel_clock_min / 1000,
2708 intel_sdvo->pixel_clock_max / 1000,
2709 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2710 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2711 /* check currently supported outputs */
2712 intel_sdvo->caps.output_flags &
2713 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2714 intel_sdvo->caps.output_flags &
2715 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2719 drm_encoder_cleanup(&intel_encoder->base);
2720 i2c_del_adapter(&intel_sdvo->ddc);