2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
10 #include <linux/interrupt.h>
11 #include <linux/seq_file.h>
12 #include <linux/debugfs.h>
13 #include <linux/pfn.h>
14 #include <linux/percpu.h>
15 #include <linux/gfp.h>
18 #include <asm/processor.h>
19 #include <asm/tlbflush.h>
20 #include <asm/sections.h>
21 #include <asm/setup.h>
22 #include <asm/uaccess.h>
23 #include <asm/pgalloc.h>
24 #include <asm/proto.h>
28 * The current flushing context - we pass it instead of 5 arguments:
37 unsigned force_split : 1;
43 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
44 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
45 * entries change the page attribute in parallel to some other cpu
46 * splitting a large page entry along with changing the attribute.
48 static DEFINE_SPINLOCK(cpa_lock);
50 #define CPA_FLUSHTLB 1
52 #define CPA_PAGES_ARRAY 4
55 static unsigned long direct_pages_count[PG_LEVEL_NUM];
57 void update_page_count(int level, unsigned long pages)
61 /* Protect against CPA */
62 spin_lock_irqsave(&pgd_lock, flags);
63 direct_pages_count[level] += pages;
64 spin_unlock_irqrestore(&pgd_lock, flags);
67 static void split_page_count(int level)
69 direct_pages_count[level]--;
70 direct_pages_count[level - 1] += PTRS_PER_PTE;
73 void arch_report_meminfo(struct seq_file *m)
75 seq_printf(m, "DirectMap4k: %8lu kB\n",
76 direct_pages_count[PG_LEVEL_4K] << 2);
77 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
78 seq_printf(m, "DirectMap2M: %8lu kB\n",
79 direct_pages_count[PG_LEVEL_2M] << 11);
81 seq_printf(m, "DirectMap4M: %8lu kB\n",
82 direct_pages_count[PG_LEVEL_2M] << 12);
86 seq_printf(m, "DirectMap1G: %8lu kB\n",
87 direct_pages_count[PG_LEVEL_1G] << 20);
91 static inline void split_page_count(int level) { }
96 static inline unsigned long highmap_start_pfn(void)
98 return __pa(_text) >> PAGE_SHIFT;
101 static inline unsigned long highmap_end_pfn(void)
103 return __pa(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
108 #ifdef CONFIG_DEBUG_PAGEALLOC
109 # define debug_pagealloc 1
111 # define debug_pagealloc 0
115 within(unsigned long addr, unsigned long start, unsigned long end)
117 return addr >= start && addr < end;
125 * clflush_cache_range - flush a cache range with clflush
126 * @addr: virtual start address
127 * @size: number of bytes to flush
129 * clflush is an unordered instruction which needs fencing with mfence
130 * to avoid ordering issues.
132 void clflush_cache_range(void *vaddr, unsigned int size)
134 void *vend = vaddr + size - 1;
138 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
141 * Flush any possible final partial cacheline:
147 EXPORT_SYMBOL_GPL(clflush_cache_range);
149 static void __cpa_flush_all(void *arg)
151 unsigned long cache = (unsigned long)arg;
154 * Flush all to work around Errata in early athlons regarding
155 * large page flushing.
159 if (cache && boot_cpu_data.x86 >= 4)
163 static void cpa_flush_all(unsigned long cache)
165 BUG_ON(irqs_disabled());
167 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
170 static void __cpa_flush_range(void *arg)
173 * We could optimize that further and do individual per page
174 * tlb invalidates for a low number of pages. Caveat: we must
175 * flush the high aliases on 64bit as well.
180 static void cpa_flush_range(unsigned long start, int numpages, int cache)
182 unsigned int i, level;
185 BUG_ON(irqs_disabled());
186 WARN_ON(PAGE_ALIGN(start) != start);
188 on_each_cpu(__cpa_flush_range, NULL, 1);
194 * We only need to flush on one CPU,
195 * clflush is a MESI-coherent instruction that
196 * will cause all other CPUs to flush the same
199 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
200 pte_t *pte = lookup_address(addr, &level);
203 * Only flush present addresses:
205 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
206 clflush_cache_range((void *) addr, PAGE_SIZE);
210 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
211 int in_flags, struct page **pages)
213 unsigned int i, level;
214 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
216 BUG_ON(irqs_disabled());
218 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
220 if (!cache || do_wbinvd)
224 * We only need to flush on one CPU,
225 * clflush is a MESI-coherent instruction that
226 * will cause all other CPUs to flush the same
229 for (i = 0; i < numpages; i++) {
233 if (in_flags & CPA_PAGES_ARRAY)
234 addr = (unsigned long)page_address(pages[i]);
238 pte = lookup_address(addr, &level);
241 * Only flush present addresses:
243 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
244 clflush_cache_range((void *)addr, PAGE_SIZE);
249 * Certain areas of memory on x86 require very specific protection flags,
250 * for example the BIOS area or kernel text. Callers don't always get this
251 * right (again, ioremap() on BIOS memory is not uncommon) so this function
252 * checks and fixes these known static required protection bits.
254 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
257 pgprot_t forbidden = __pgprot(0);
258 pgprot_t required = __pgprot(0);
261 * The BIOS area between 640k and 1Mb needs to be executable for
262 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
264 if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
265 pgprot_val(forbidden) |= _PAGE_NX;
268 * The kernel text needs to be executable for obvious reasons
269 * Does not cover __inittext since that is gone later on. On
270 * 64bit we do not enforce !NX on the low mapping
272 if (within(address, (unsigned long)_text, (unsigned long)_etext))
273 pgprot_val(forbidden) |= _PAGE_NX;
276 * The .rodata section needs to be read-only. Using the pfn
277 * catches all aliases.
279 if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
280 __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
281 pgprot_val(forbidden) |= _PAGE_RW;
283 * .data and .bss should always be writable.
285 if (within(address, (unsigned long)_sdata, (unsigned long)_edata) ||
286 within(address, (unsigned long)__bss_start, (unsigned long)__bss_stop))
287 pgprot_val(required) |= _PAGE_RW;
289 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
291 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
292 * kernel text mappings for the large page aligned text, rodata sections
293 * will be always read-only. For the kernel identity mappings covering
294 * the holes caused by this alignment can be anything that user asks.
296 * This will preserve the large page mappings for kernel text/data
299 if (kernel_set_to_readonly &&
300 within(address, (unsigned long)_text,
301 (unsigned long)__end_rodata_hpage_align)) {
305 * Don't enforce the !RW mapping for the kernel text mapping,
306 * if the current mapping is already using small page mapping.
307 * No need to work hard to preserve large page mappings in this
310 * This also fixes the Linux Xen paravirt guest boot failure
311 * (because of unexpected read-only mappings for kernel identity
312 * mappings). In this paravirt guest case, the kernel text
313 * mapping and the kernel identity mapping share the same
314 * page-table pages. Thus we can't really use different
315 * protections for the kernel text and identity mappings. Also,
316 * these shared mappings are made of small page mappings.
317 * Thus this don't enforce !RW mapping for small page kernel
318 * text mapping logic will help Linux Xen parvirt guest boot
321 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
322 pgprot_val(forbidden) |= _PAGE_RW;
326 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
327 prot = __pgprot(pgprot_val(prot) | pgprot_val(required));
333 * Lookup the page table entry for a virtual address. Return a pointer
334 * to the entry and the level of the mapping.
336 * Note: We return pud and pmd either when the entry is marked large
337 * or when the present bit is not set. Otherwise we would return a
338 * pointer to a nonexisting mapping.
340 pte_t *lookup_address(unsigned long address, unsigned int *level)
342 pgd_t *pgd = pgd_offset_k(address);
346 *level = PG_LEVEL_NONE;
351 pud = pud_offset(pgd, address);
355 *level = PG_LEVEL_1G;
356 if (pud_large(*pud) || !pud_present(*pud))
359 pmd = pmd_offset(pud, address);
363 *level = PG_LEVEL_2M;
364 if (pmd_large(*pmd) || !pmd_present(*pmd))
367 *level = PG_LEVEL_4K;
369 return pte_offset_kernel(pmd, address);
371 EXPORT_SYMBOL_GPL(lookup_address);
374 * Set the new pmd in all the pgds we know about:
376 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
379 set_pte_atomic(kpte, pte);
381 if (!SHARED_KERNEL_PMD) {
384 list_for_each_entry(page, &pgd_list, lru) {
389 pgd = (pgd_t *)page_address(page) + pgd_index(address);
390 pud = pud_offset(pgd, address);
391 pmd = pmd_offset(pud, address);
392 set_pte_atomic((pte_t *)pmd, pte);
399 try_preserve_large_page(pte_t *kpte, unsigned long address,
400 struct cpa_data *cpa)
402 unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
403 pte_t new_pte, old_pte, *tmp;
404 pgprot_t old_prot, new_prot, req_prot;
408 if (cpa->force_split)
411 spin_lock_irqsave(&pgd_lock, flags);
413 * Check for races, another CPU might have split this page
416 tmp = lookup_address(address, &level);
422 psize = PMD_PAGE_SIZE;
423 pmask = PMD_PAGE_MASK;
427 psize = PUD_PAGE_SIZE;
428 pmask = PUD_PAGE_MASK;
437 * Calculate the number of pages, which fit into this large
438 * page starting at address:
440 nextpage_addr = (address + psize) & pmask;
441 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
442 if (numpages < cpa->numpages)
443 cpa->numpages = numpages;
446 * We are safe now. Check whether the new pgprot is the same:
449 old_prot = new_prot = req_prot = pte_pgprot(old_pte);
451 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
452 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
455 * old_pte points to the large page base address. So we need
456 * to add the offset of the virtual address:
458 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
461 new_prot = static_protections(req_prot, address, pfn);
464 * We need to check the full range, whether
465 * static_protection() requires a different pgprot for one of
466 * the pages in the range we try to preserve:
468 addr = address & pmask;
469 pfn = pte_pfn(old_pte);
470 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
471 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
473 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
478 * If there are no changes, return. maxpages has been updated
481 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
487 * We need to change the attributes. Check, whether we can
488 * change the large page in one go. We request a split, when
489 * the address is not aligned and the number of pages is
490 * smaller than the number of pages in the large page. Note
491 * that we limited the number of possible pages already to
492 * the number of pages in the large page.
494 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
496 * The address is aligned and the number of pages
497 * covers the full page.
499 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
500 __set_pmd_pte(kpte, address, new_pte);
501 cpa->flags |= CPA_FLUSHTLB;
506 spin_unlock_irqrestore(&pgd_lock, flags);
511 static int split_large_page(pte_t *kpte, unsigned long address)
513 unsigned long flags, pfn, pfninc = 1;
514 unsigned int i, level;
519 if (!debug_pagealloc)
520 spin_unlock(&cpa_lock);
521 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
522 if (!debug_pagealloc)
523 spin_lock(&cpa_lock);
527 spin_lock_irqsave(&pgd_lock, flags);
529 * Check for races, another CPU might have split this page
532 tmp = lookup_address(address, &level);
536 pbase = (pte_t *)page_address(base);
537 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
538 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
540 * If we ever want to utilize the PAT bit, we need to
541 * update this function to make sure it's converted from
542 * bit 12 to bit 7 when we cross from the 2MB level to
545 WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
548 if (level == PG_LEVEL_1G) {
549 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
550 pgprot_val(ref_prot) |= _PAGE_PSE;
555 * Get the target pfn from the original entry:
557 pfn = pte_pfn(*kpte);
558 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
559 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
561 if (address >= (unsigned long)__va(0) &&
562 address < (unsigned long)__va(max_low_pfn_mapped << PAGE_SHIFT))
563 split_page_count(level);
566 if (address >= (unsigned long)__va(1UL<<32) &&
567 address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT))
568 split_page_count(level);
572 * Install the new, split up pagetable.
574 * We use the standard kernel pagetable protections for the new
575 * pagetable protections, the actual ptes set above control the
576 * primary protection behavior:
578 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
581 * Intel Atom errata AAH41 workaround.
583 * The real fix should be in hw or in a microcode update, but
584 * we also probabilistically try to reduce the window of having
585 * a large TLB mixed with 4K TLBs while instruction fetches are
594 * If we dropped out via the lookup_address check under
595 * pgd_lock then stick the page back into the pool:
599 spin_unlock_irqrestore(&pgd_lock, flags);
604 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
608 * Ignore all non primary paths.
614 * Ignore the NULL PTE for kernel identity mapping, as it is expected
616 * Also set numpages to '1' indicating that we processed cpa req for
617 * one virtual address page and its pfn. TBD: numpages can be set based
618 * on the initial value and the level returned by lookup_address().
620 if (within(vaddr, PAGE_OFFSET,
621 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
623 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
626 WARN(1, KERN_WARNING "CPA: called for zero pte. "
627 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
634 static int __change_page_attr(struct cpa_data *cpa, int primary)
636 unsigned long address;
639 pte_t *kpte, old_pte;
641 if (cpa->flags & CPA_PAGES_ARRAY) {
642 struct page *page = cpa->pages[cpa->curpage];
643 if (unlikely(PageHighMem(page)))
645 address = (unsigned long)page_address(page);
646 } else if (cpa->flags & CPA_ARRAY)
647 address = cpa->vaddr[cpa->curpage];
649 address = *cpa->vaddr;
651 kpte = lookup_address(address, &level);
653 return __cpa_process_fault(cpa, address, primary);
656 if (!pte_val(old_pte))
657 return __cpa_process_fault(cpa, address, primary);
659 if (level == PG_LEVEL_4K) {
661 pgprot_t new_prot = pte_pgprot(old_pte);
662 unsigned long pfn = pte_pfn(old_pte);
664 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
665 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
667 new_prot = static_protections(new_prot, address, pfn);
670 * We need to keep the pfn from the existing PTE,
671 * after all we're only going to change it's attributes
672 * not the memory it points to
674 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
677 * Do we really change anything ?
679 if (pte_val(old_pte) != pte_val(new_pte)) {
680 set_pte_atomic(kpte, new_pte);
681 cpa->flags |= CPA_FLUSHTLB;
688 * Check, whether we can keep the large page intact
689 * and just change the pte:
691 do_split = try_preserve_large_page(kpte, address, cpa);
693 * When the range fits into the existing large page,
694 * return. cp->numpages and cpa->tlbflush have been updated in
701 * We have to split the large page:
703 err = split_large_page(kpte, address);
706 * Do a global flush tlb after splitting the large page
707 * and before we do the actual change page attribute in the PTE.
709 * With out this, we violate the TLB application note, that says
710 * "The TLBs may contain both ordinary and large-page
711 * translations for a 4-KByte range of linear addresses. This
712 * may occur if software modifies the paging structures so that
713 * the page size used for the address range changes. If the two
714 * translations differ with respect to page frame or attributes
715 * (e.g., permissions), processor behavior is undefined and may
716 * be implementation-specific."
718 * We do this global tlb flush inside the cpa_lock, so that we
719 * don't allow any other cpu, with stale tlb entries change the
720 * page attribute in parallel, that also falls into the
721 * just split large page entry.
730 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
732 static int cpa_process_alias(struct cpa_data *cpa)
734 struct cpa_data alias_cpa;
735 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
739 if (cpa->pfn >= max_pfn_mapped)
743 if (cpa->pfn >= max_low_pfn_mapped && cpa->pfn < (1UL<<(32-PAGE_SHIFT)))
747 * No need to redo, when the primary call touched the direct
750 if (cpa->flags & CPA_PAGES_ARRAY) {
751 struct page *page = cpa->pages[cpa->curpage];
752 if (unlikely(PageHighMem(page)))
754 vaddr = (unsigned long)page_address(page);
755 } else if (cpa->flags & CPA_ARRAY)
756 vaddr = cpa->vaddr[cpa->curpage];
760 if (!(within(vaddr, PAGE_OFFSET,
761 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
764 alias_cpa.vaddr = &laddr;
765 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
767 ret = __change_page_attr_set_clr(&alias_cpa, 0);
774 * If the primary call didn't touch the high mapping already
775 * and the physical address is inside the kernel map, we need
776 * to touch the high mapped kernel as well:
778 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
779 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
780 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
781 __START_KERNEL_map - phys_base;
783 alias_cpa.vaddr = &temp_cpa_vaddr;
784 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
787 * The high mapping range is imprecise, so ignore the
790 __change_page_attr_set_clr(&alias_cpa, 0);
797 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
799 int ret, numpages = cpa->numpages;
803 * Store the remaining nr of pages for the large page
804 * preservation check.
806 cpa->numpages = numpages;
807 /* for array changes, we can't use large page */
808 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
811 if (!debug_pagealloc)
812 spin_lock(&cpa_lock);
813 ret = __change_page_attr(cpa, checkalias);
814 if (!debug_pagealloc)
815 spin_unlock(&cpa_lock);
820 ret = cpa_process_alias(cpa);
826 * Adjust the number of pages with the result of the
827 * CPA operation. Either a large page has been
828 * preserved or a single page update happened.
830 BUG_ON(cpa->numpages > numpages);
831 numpages -= cpa->numpages;
832 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
835 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
841 static inline int cache_attr(pgprot_t attr)
843 return pgprot_val(attr) &
844 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
847 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
848 pgprot_t mask_set, pgprot_t mask_clr,
849 int force_split, int in_flag,
853 int ret, cache, checkalias;
854 unsigned long baddr = 0;
857 * Check, if we are requested to change a not supported
860 mask_set = canon_pgprot(mask_set);
861 mask_clr = canon_pgprot(mask_clr);
862 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
865 /* Ensure we are PAGE_SIZE aligned */
866 if (in_flag & CPA_ARRAY) {
868 for (i = 0; i < numpages; i++) {
869 if (addr[i] & ~PAGE_MASK) {
870 addr[i] &= PAGE_MASK;
874 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
876 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
877 * No need to cehck in that case
879 if (*addr & ~PAGE_MASK) {
882 * People should not be passing in unaligned addresses:
887 * Save address for cache flush. *addr is modified in the call
888 * to __change_page_attr_set_clr() below.
893 /* Must avoid aliasing mappings in the highmem code */
900 cpa.numpages = numpages;
901 cpa.mask_set = mask_set;
902 cpa.mask_clr = mask_clr;
905 cpa.force_split = force_split;
907 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
908 cpa.flags |= in_flag;
910 /* No alias checking for _NX bit modifications */
911 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
913 ret = __change_page_attr_set_clr(&cpa, checkalias);
916 * Check whether we really changed something:
918 if (!(cpa.flags & CPA_FLUSHTLB))
922 * No need to flush, when we did not set any of the caching
925 cache = cache_attr(mask_set);
928 * On success we use clflush, when the CPU supports it to
929 * avoid the wbindv. If the CPU does not support it and in the
930 * error case we fall back to cpa_flush_all (which uses
933 if (!ret && cpu_has_clflush) {
934 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
935 cpa_flush_array(addr, numpages, cache,
938 cpa_flush_range(baddr, numpages, cache);
940 cpa_flush_all(cache);
946 static inline int change_page_attr_set(unsigned long *addr, int numpages,
947 pgprot_t mask, int array)
949 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
950 (array ? CPA_ARRAY : 0), NULL);
953 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
954 pgprot_t mask, int array)
956 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
957 (array ? CPA_ARRAY : 0), NULL);
960 static inline int cpa_set_pages_array(struct page **pages, int numpages,
963 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
964 CPA_PAGES_ARRAY, pages);
967 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
970 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
971 CPA_PAGES_ARRAY, pages);
974 int _set_memory_uc(unsigned long addr, int numpages)
977 * for now UC MINUS. see comments in ioremap_nocache()
979 return change_page_attr_set(&addr, numpages,
980 __pgprot(_PAGE_CACHE_UC_MINUS), 0);
983 int set_memory_uc(unsigned long addr, int numpages)
988 * for now UC MINUS. see comments in ioremap_nocache()
990 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
991 _PAGE_CACHE_UC_MINUS, NULL);
995 ret = _set_memory_uc(addr, numpages);
1002 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1006 EXPORT_SYMBOL(set_memory_uc);
1008 int _set_memory_array(unsigned long *addr, int addrinarray,
1009 unsigned long new_type)
1015 * for now UC MINUS. see comments in ioremap_nocache()
1017 for (i = 0; i < addrinarray; i++) {
1018 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1024 ret = change_page_attr_set(addr, addrinarray,
1025 __pgprot(_PAGE_CACHE_UC_MINUS), 1);
1027 if (!ret && new_type == _PAGE_CACHE_WC)
1028 ret = change_page_attr_set_clr(addr, addrinarray,
1029 __pgprot(_PAGE_CACHE_WC),
1030 __pgprot(_PAGE_CACHE_MASK),
1031 0, CPA_ARRAY, NULL);
1038 for (j = 0; j < i; j++)
1039 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1044 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1046 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_UC_MINUS);
1048 EXPORT_SYMBOL(set_memory_array_uc);
1050 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1052 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_WC);
1054 EXPORT_SYMBOL(set_memory_array_wc);
1056 int _set_memory_wc(unsigned long addr, int numpages)
1059 unsigned long addr_copy = addr;
1061 ret = change_page_attr_set(&addr, numpages,
1062 __pgprot(_PAGE_CACHE_UC_MINUS), 0);
1064 ret = change_page_attr_set_clr(&addr_copy, numpages,
1065 __pgprot(_PAGE_CACHE_WC),
1066 __pgprot(_PAGE_CACHE_MASK),
1072 int set_memory_wc(unsigned long addr, int numpages)
1077 return set_memory_uc(addr, numpages);
1079 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1080 _PAGE_CACHE_WC, NULL);
1084 ret = _set_memory_wc(addr, numpages);
1091 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1095 EXPORT_SYMBOL(set_memory_wc);
1097 int _set_memory_wb(unsigned long addr, int numpages)
1099 return change_page_attr_clear(&addr, numpages,
1100 __pgprot(_PAGE_CACHE_MASK), 0);
1103 int set_memory_wb(unsigned long addr, int numpages)
1107 ret = _set_memory_wb(addr, numpages);
1111 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1114 EXPORT_SYMBOL(set_memory_wb);
1116 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1121 ret = change_page_attr_clear(addr, addrinarray,
1122 __pgprot(_PAGE_CACHE_MASK), 1);
1126 for (i = 0; i < addrinarray; i++)
1127 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1131 EXPORT_SYMBOL(set_memory_array_wb);
1133 int set_memory_x(unsigned long addr, int numpages)
1135 if (!(__supported_pte_mask & _PAGE_NX))
1138 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1140 EXPORT_SYMBOL(set_memory_x);
1142 int set_memory_nx(unsigned long addr, int numpages)
1144 if (!(__supported_pte_mask & _PAGE_NX))
1147 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1149 EXPORT_SYMBOL(set_memory_nx);
1151 int set_memory_ro(unsigned long addr, int numpages)
1153 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1155 EXPORT_SYMBOL_GPL(set_memory_ro);
1157 int set_memory_rw(unsigned long addr, int numpages)
1159 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1161 EXPORT_SYMBOL_GPL(set_memory_rw);
1163 int set_memory_np(unsigned long addr, int numpages)
1165 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1168 int set_memory_4k(unsigned long addr, int numpages)
1170 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1171 __pgprot(0), 1, 0, NULL);
1174 int set_pages_uc(struct page *page, int numpages)
1176 unsigned long addr = (unsigned long)page_address(page);
1178 return set_memory_uc(addr, numpages);
1180 EXPORT_SYMBOL(set_pages_uc);
1182 static int _set_pages_array(struct page **pages, int addrinarray,
1183 unsigned long new_type)
1185 unsigned long start;
1191 for (i = 0; i < addrinarray; i++) {
1192 if (PageHighMem(pages[i]))
1194 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1195 end = start + PAGE_SIZE;
1196 if (reserve_memtype(start, end, new_type, NULL))
1200 ret = cpa_set_pages_array(pages, addrinarray,
1201 __pgprot(_PAGE_CACHE_UC_MINUS));
1202 if (!ret && new_type == _PAGE_CACHE_WC)
1203 ret = change_page_attr_set_clr(NULL, addrinarray,
1204 __pgprot(_PAGE_CACHE_WC),
1205 __pgprot(_PAGE_CACHE_MASK),
1206 0, CPA_PAGES_ARRAY, pages);
1209 return 0; /* Success */
1212 for (i = 0; i < free_idx; i++) {
1213 if (PageHighMem(pages[i]))
1215 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1216 end = start + PAGE_SIZE;
1217 free_memtype(start, end);
1222 int set_pages_array_uc(struct page **pages, int addrinarray)
1224 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_UC_MINUS);
1226 EXPORT_SYMBOL(set_pages_array_uc);
1228 int set_pages_array_wc(struct page **pages, int addrinarray)
1230 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_WC);
1232 EXPORT_SYMBOL(set_pages_array_wc);
1234 int set_pages_wb(struct page *page, int numpages)
1236 unsigned long addr = (unsigned long)page_address(page);
1238 return set_memory_wb(addr, numpages);
1240 EXPORT_SYMBOL(set_pages_wb);
1242 int set_pages_array_wb(struct page **pages, int addrinarray)
1245 unsigned long start;
1249 retval = cpa_clear_pages_array(pages, addrinarray,
1250 __pgprot(_PAGE_CACHE_MASK));
1254 for (i = 0; i < addrinarray; i++) {
1255 if (PageHighMem(pages[i]))
1257 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1258 end = start + PAGE_SIZE;
1259 free_memtype(start, end);
1264 EXPORT_SYMBOL(set_pages_array_wb);
1266 int set_pages_x(struct page *page, int numpages)
1268 unsigned long addr = (unsigned long)page_address(page);
1270 return set_memory_x(addr, numpages);
1272 EXPORT_SYMBOL(set_pages_x);
1274 int set_pages_nx(struct page *page, int numpages)
1276 unsigned long addr = (unsigned long)page_address(page);
1278 return set_memory_nx(addr, numpages);
1280 EXPORT_SYMBOL(set_pages_nx);
1282 int set_pages_ro(struct page *page, int numpages)
1284 unsigned long addr = (unsigned long)page_address(page);
1286 return set_memory_ro(addr, numpages);
1289 int set_pages_rw(struct page *page, int numpages)
1291 unsigned long addr = (unsigned long)page_address(page);
1293 return set_memory_rw(addr, numpages);
1296 #ifdef CONFIG_DEBUG_PAGEALLOC
1298 static int __set_pages_p(struct page *page, int numpages)
1300 unsigned long tempaddr = (unsigned long) page_address(page);
1301 struct cpa_data cpa = { .vaddr = &tempaddr,
1302 .numpages = numpages,
1303 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1304 .mask_clr = __pgprot(0),
1308 * No alias checking needed for setting present flag. otherwise,
1309 * we may need to break large pages for 64-bit kernel text
1310 * mappings (this adds to complexity if we want to do this from
1311 * atomic context especially). Let's keep it simple!
1313 return __change_page_attr_set_clr(&cpa, 0);
1316 static int __set_pages_np(struct page *page, int numpages)
1318 unsigned long tempaddr = (unsigned long) page_address(page);
1319 struct cpa_data cpa = { .vaddr = &tempaddr,
1320 .numpages = numpages,
1321 .mask_set = __pgprot(0),
1322 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1326 * No alias checking needed for setting not present flag. otherwise,
1327 * we may need to break large pages for 64-bit kernel text
1328 * mappings (this adds to complexity if we want to do this from
1329 * atomic context especially). Let's keep it simple!
1331 return __change_page_attr_set_clr(&cpa, 0);
1334 void kernel_map_pages(struct page *page, int numpages, int enable)
1336 if (PageHighMem(page))
1339 debug_check_no_locks_freed(page_address(page),
1340 numpages * PAGE_SIZE);
1344 * If page allocator is not up yet then do not call c_p_a():
1346 if (!debug_pagealloc_enabled)
1350 * The return value is ignored as the calls cannot fail.
1351 * Large pages for identity mappings are not used at boot time
1352 * and hence no memory allocations during large page split.
1355 __set_pages_p(page, numpages);
1357 __set_pages_np(page, numpages);
1360 * We should perform an IPI and flush all tlbs,
1361 * but that can deadlock->flush only current cpu:
1366 #ifdef CONFIG_HIBERNATION
1368 bool kernel_page_present(struct page *page)
1373 if (PageHighMem(page))
1376 pte = lookup_address((unsigned long)page_address(page), &level);
1377 return (pte_val(*pte) & _PAGE_PRESENT);
1380 #endif /* CONFIG_HIBERNATION */
1382 #endif /* CONFIG_DEBUG_PAGEALLOC */
1385 * The testcases use internal knowledge of the implementation that shouldn't
1386 * be exposed to the rest of the kernel. Include these directly here.
1388 #ifdef CONFIG_CPA_DEBUG
1389 #include "pageattr-test.c"