2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
27 #include <linux/kvm_host.h>
28 #include <linux/types.h>
29 #include <linux/string.h>
31 #include <linux/highmem.h>
32 #include <linux/module.h>
33 #include <linux/swap.h>
34 #include <linux/hugetlb.h>
35 #include <linux/compiler.h>
36 #include <linux/srcu.h>
37 #include <linux/slab.h>
38 #include <linux/uaccess.h>
41 #include <asm/cmpxchg.h>
46 * When setting this variable to true it enables Two-Dimensional-Paging
47 * where the hardware walks 2 page tables:
48 * 1. the guest-virtual to guest-physical
49 * 2. while doing 1. it walks guest-physical to host-physical
50 * If the hardware supports that we don't need to do shadow paging.
52 bool tdp_enabled = false;
56 AUDIT_POST_PAGE_FAULT,
63 char *audit_point_name[] = {
76 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
77 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
81 #define pgprintk(x...) do { } while (0)
82 #define rmap_printk(x...) do { } while (0)
88 module_param(dbg, bool, 0644);
91 static int oos_shadow = 1;
92 module_param(oos_shadow, bool, 0644);
95 #define ASSERT(x) do { } while (0)
99 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
100 __FILE__, __LINE__, #x); \
104 #define PTE_PREFETCH_NUM 8
106 #define PT_FIRST_AVAIL_BITS_SHIFT 9
107 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
109 #define PT64_LEVEL_BITS 9
111 #define PT64_LEVEL_SHIFT(level) \
112 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
114 #define PT64_LEVEL_MASK(level) \
115 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
117 #define PT64_INDEX(address, level)\
118 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
121 #define PT32_LEVEL_BITS 10
123 #define PT32_LEVEL_SHIFT(level) \
124 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
126 #define PT32_LEVEL_MASK(level) \
127 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
128 #define PT32_LVL_OFFSET_MASK(level) \
129 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT32_LEVEL_BITS))) - 1))
132 #define PT32_INDEX(address, level)\
133 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
136 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
137 #define PT64_DIR_BASE_ADDR_MASK \
138 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
139 #define PT64_LVL_ADDR_MASK(level) \
140 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
141 * PT64_LEVEL_BITS))) - 1))
142 #define PT64_LVL_OFFSET_MASK(level) \
143 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
144 * PT64_LEVEL_BITS))) - 1))
146 #define PT32_BASE_ADDR_MASK PAGE_MASK
147 #define PT32_DIR_BASE_ADDR_MASK \
148 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
149 #define PT32_LVL_ADDR_MASK(level) \
150 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
151 * PT32_LEVEL_BITS))) - 1))
153 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
158 #define ACC_EXEC_MASK 1
159 #define ACC_WRITE_MASK PT_WRITABLE_MASK
160 #define ACC_USER_MASK PT_USER_MASK
161 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
163 #include <trace/events/kvm.h>
165 #define CREATE_TRACE_POINTS
166 #include "mmutrace.h"
168 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
170 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
172 struct kvm_rmap_desc {
173 u64 *sptes[RMAP_EXT];
174 struct kvm_rmap_desc *more;
177 struct kvm_shadow_walk_iterator {
185 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
186 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
187 shadow_walk_okay(&(_walker)); \
188 shadow_walk_next(&(_walker)))
190 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
192 static struct kmem_cache *pte_chain_cache;
193 static struct kmem_cache *rmap_desc_cache;
194 static struct kmem_cache *mmu_page_header_cache;
195 static struct percpu_counter kvm_total_used_mmu_pages;
197 static u64 __read_mostly shadow_trap_nonpresent_pte;
198 static u64 __read_mostly shadow_notrap_nonpresent_pte;
199 static u64 __read_mostly shadow_nx_mask;
200 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
201 static u64 __read_mostly shadow_user_mask;
202 static u64 __read_mostly shadow_accessed_mask;
203 static u64 __read_mostly shadow_dirty_mask;
205 static inline u64 rsvd_bits(int s, int e)
207 return ((1ULL << (e - s + 1)) - 1) << s;
210 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
212 shadow_trap_nonpresent_pte = trap_pte;
213 shadow_notrap_nonpresent_pte = notrap_pte;
215 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
217 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
218 u64 dirty_mask, u64 nx_mask, u64 x_mask)
220 shadow_user_mask = user_mask;
221 shadow_accessed_mask = accessed_mask;
222 shadow_dirty_mask = dirty_mask;
223 shadow_nx_mask = nx_mask;
224 shadow_x_mask = x_mask;
226 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
228 static bool is_write_protection(struct kvm_vcpu *vcpu)
230 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
233 static int is_cpuid_PSE36(void)
238 static int is_nx(struct kvm_vcpu *vcpu)
240 return vcpu->arch.efer & EFER_NX;
243 static int is_shadow_present_pte(u64 pte)
245 return pte != shadow_trap_nonpresent_pte
246 && pte != shadow_notrap_nonpresent_pte;
249 static int is_large_pte(u64 pte)
251 return pte & PT_PAGE_SIZE_MASK;
254 static int is_writable_pte(unsigned long pte)
256 return pte & PT_WRITABLE_MASK;
259 static int is_dirty_gpte(unsigned long pte)
261 return pte & PT_DIRTY_MASK;
264 static int is_rmap_spte(u64 pte)
266 return is_shadow_present_pte(pte);
269 static int is_last_spte(u64 pte, int level)
271 if (level == PT_PAGE_TABLE_LEVEL)
273 if (is_large_pte(pte))
278 static pfn_t spte_to_pfn(u64 pte)
280 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
283 static gfn_t pse36_gfn_delta(u32 gpte)
285 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
287 return (gpte & PT32_DIR_PSE36_MASK) << shift;
290 static void __set_spte(u64 *sptep, u64 spte)
292 set_64bit(sptep, spte);
295 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
298 return xchg(sptep, new_spte);
304 } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
310 static bool spte_has_volatile_bits(u64 spte)
312 if (!shadow_accessed_mask)
315 if (!is_shadow_present_pte(spte))
318 if ((spte & shadow_accessed_mask) &&
319 (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
325 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
327 return (old_spte & bit_mask) && !(new_spte & bit_mask);
330 static void update_spte(u64 *sptep, u64 new_spte)
332 u64 mask, old_spte = *sptep;
334 WARN_ON(!is_rmap_spte(new_spte));
336 new_spte |= old_spte & shadow_dirty_mask;
338 mask = shadow_accessed_mask;
339 if (is_writable_pte(old_spte))
340 mask |= shadow_dirty_mask;
342 if (!spte_has_volatile_bits(old_spte) || (new_spte & mask) == mask)
343 __set_spte(sptep, new_spte);
345 old_spte = __xchg_spte(sptep, new_spte);
347 if (!shadow_accessed_mask)
350 if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
351 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
352 if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
353 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
356 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
357 struct kmem_cache *base_cache, int min)
361 if (cache->nobjs >= min)
363 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
364 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
367 cache->objects[cache->nobjs++] = obj;
372 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
373 struct kmem_cache *cache)
376 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
379 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
384 if (cache->nobjs >= min)
386 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
387 page = alloc_page(GFP_KERNEL);
390 cache->objects[cache->nobjs++] = page_address(page);
395 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
398 free_page((unsigned long)mc->objects[--mc->nobjs]);
401 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
405 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
409 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
410 rmap_desc_cache, 4 + PTE_PREFETCH_NUM);
413 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
416 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
417 mmu_page_header_cache, 4);
422 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
424 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
425 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
426 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
427 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
428 mmu_page_header_cache);
431 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
437 p = mc->objects[--mc->nobjs];
441 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
443 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
444 sizeof(struct kvm_pte_chain));
447 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
449 kmem_cache_free(pte_chain_cache, pc);
452 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
454 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
455 sizeof(struct kvm_rmap_desc));
458 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
460 kmem_cache_free(rmap_desc_cache, rd);
463 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
465 if (!sp->role.direct)
466 return sp->gfns[index];
468 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
471 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
474 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
476 sp->gfns[index] = gfn;
480 * Return the pointer to the large page information for a given gfn,
481 * handling slots that are not large page aligned.
483 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
484 struct kvm_memory_slot *slot,
489 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
490 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
491 return &slot->lpage_info[level - 2][idx];
494 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
496 struct kvm_memory_slot *slot;
497 struct kvm_lpage_info *linfo;
500 slot = gfn_to_memslot(kvm, gfn);
501 for (i = PT_DIRECTORY_LEVEL;
502 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
503 linfo = lpage_info_slot(gfn, slot, i);
504 linfo->write_count += 1;
508 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
510 struct kvm_memory_slot *slot;
511 struct kvm_lpage_info *linfo;
514 slot = gfn_to_memslot(kvm, gfn);
515 for (i = PT_DIRECTORY_LEVEL;
516 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
517 linfo = lpage_info_slot(gfn, slot, i);
518 linfo->write_count -= 1;
519 WARN_ON(linfo->write_count < 0);
523 static int has_wrprotected_page(struct kvm *kvm,
527 struct kvm_memory_slot *slot;
528 struct kvm_lpage_info *linfo;
530 slot = gfn_to_memslot(kvm, gfn);
532 linfo = lpage_info_slot(gfn, slot, level);
533 return linfo->write_count;
539 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
541 unsigned long page_size;
544 page_size = kvm_host_page_size(kvm, gfn);
546 for (i = PT_PAGE_TABLE_LEVEL;
547 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
548 if (page_size >= KVM_HPAGE_SIZE(i))
557 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
559 struct kvm_memory_slot *slot;
560 int host_level, level, max_level;
562 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
563 if (slot && slot->dirty_bitmap)
564 return PT_PAGE_TABLE_LEVEL;
566 host_level = host_mapping_level(vcpu->kvm, large_gfn);
568 if (host_level == PT_PAGE_TABLE_LEVEL)
571 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
572 kvm_x86_ops->get_lpage_level() : host_level;
574 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
575 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
582 * Take gfn and return the reverse mapping to it.
585 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
587 struct kvm_memory_slot *slot;
588 struct kvm_lpage_info *linfo;
590 slot = gfn_to_memslot(kvm, gfn);
591 if (likely(level == PT_PAGE_TABLE_LEVEL))
592 return &slot->rmap[gfn - slot->base_gfn];
594 linfo = lpage_info_slot(gfn, slot, level);
596 return &linfo->rmap_pde;
600 * Reverse mapping data structures:
602 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
603 * that points to page_address(page).
605 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
606 * containing more mappings.
608 * Returns the number of rmap entries before the spte was added or zero if
609 * the spte was not added.
612 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
614 struct kvm_mmu_page *sp;
615 struct kvm_rmap_desc *desc;
616 unsigned long *rmapp;
619 if (!is_rmap_spte(*spte))
621 sp = page_header(__pa(spte));
622 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
623 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
625 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
626 *rmapp = (unsigned long)spte;
627 } else if (!(*rmapp & 1)) {
628 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
629 desc = mmu_alloc_rmap_desc(vcpu);
630 desc->sptes[0] = (u64 *)*rmapp;
631 desc->sptes[1] = spte;
632 *rmapp = (unsigned long)desc | 1;
635 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
636 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
637 while (desc->sptes[RMAP_EXT-1] && desc->more) {
641 if (desc->sptes[RMAP_EXT-1]) {
642 desc->more = mmu_alloc_rmap_desc(vcpu);
645 for (i = 0; desc->sptes[i]; ++i)
647 desc->sptes[i] = spte;
652 static void rmap_desc_remove_entry(unsigned long *rmapp,
653 struct kvm_rmap_desc *desc,
655 struct kvm_rmap_desc *prev_desc)
659 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
661 desc->sptes[i] = desc->sptes[j];
662 desc->sptes[j] = NULL;
665 if (!prev_desc && !desc->more)
666 *rmapp = (unsigned long)desc->sptes[0];
669 prev_desc->more = desc->more;
671 *rmapp = (unsigned long)desc->more | 1;
672 mmu_free_rmap_desc(desc);
675 static void rmap_remove(struct kvm *kvm, u64 *spte)
677 struct kvm_rmap_desc *desc;
678 struct kvm_rmap_desc *prev_desc;
679 struct kvm_mmu_page *sp;
681 unsigned long *rmapp;
684 sp = page_header(__pa(spte));
685 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
686 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
688 printk(KERN_ERR "rmap_remove: %p 0->BUG\n", spte);
690 } else if (!(*rmapp & 1)) {
691 rmap_printk("rmap_remove: %p 1->0\n", spte);
692 if ((u64 *)*rmapp != spte) {
693 printk(KERN_ERR "rmap_remove: %p 1->BUG\n", spte);
698 rmap_printk("rmap_remove: %p many->many\n", spte);
699 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
702 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
703 if (desc->sptes[i] == spte) {
704 rmap_desc_remove_entry(rmapp,
712 pr_err("rmap_remove: %p many->many\n", spte);
717 static int set_spte_track_bits(u64 *sptep, u64 new_spte)
720 u64 old_spte = *sptep;
722 if (!spte_has_volatile_bits(old_spte))
723 __set_spte(sptep, new_spte);
725 old_spte = __xchg_spte(sptep, new_spte);
727 if (!is_rmap_spte(old_spte))
730 pfn = spte_to_pfn(old_spte);
731 if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
732 kvm_set_pfn_accessed(pfn);
733 if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
734 kvm_set_pfn_dirty(pfn);
738 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
740 if (set_spte_track_bits(sptep, new_spte))
741 rmap_remove(kvm, sptep);
744 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
746 struct kvm_rmap_desc *desc;
752 else if (!(*rmapp & 1)) {
754 return (u64 *)*rmapp;
757 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
760 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
761 if (prev_spte == spte)
762 return desc->sptes[i];
763 prev_spte = desc->sptes[i];
770 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
772 unsigned long *rmapp;
774 int i, write_protected = 0;
776 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
778 spte = rmap_next(kvm, rmapp, NULL);
781 BUG_ON(!(*spte & PT_PRESENT_MASK));
782 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
783 if (is_writable_pte(*spte)) {
784 update_spte(spte, *spte & ~PT_WRITABLE_MASK);
787 spte = rmap_next(kvm, rmapp, spte);
790 /* check for huge page mappings */
791 for (i = PT_DIRECTORY_LEVEL;
792 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
793 rmapp = gfn_to_rmap(kvm, gfn, i);
794 spte = rmap_next(kvm, rmapp, NULL);
797 BUG_ON(!(*spte & PT_PRESENT_MASK));
798 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
799 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
800 if (is_writable_pte(*spte)) {
802 shadow_trap_nonpresent_pte);
807 spte = rmap_next(kvm, rmapp, spte);
811 return write_protected;
814 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
818 int need_tlb_flush = 0;
820 while ((spte = rmap_next(kvm, rmapp, NULL))) {
821 BUG_ON(!(*spte & PT_PRESENT_MASK));
822 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
823 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
826 return need_tlb_flush;
829 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
834 pte_t *ptep = (pte_t *)data;
837 WARN_ON(pte_huge(*ptep));
838 new_pfn = pte_pfn(*ptep);
839 spte = rmap_next(kvm, rmapp, NULL);
841 BUG_ON(!is_shadow_present_pte(*spte));
842 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
844 if (pte_write(*ptep)) {
845 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
846 spte = rmap_next(kvm, rmapp, NULL);
848 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
849 new_spte |= (u64)new_pfn << PAGE_SHIFT;
851 new_spte &= ~PT_WRITABLE_MASK;
852 new_spte &= ~SPTE_HOST_WRITEABLE;
853 new_spte &= ~shadow_accessed_mask;
854 set_spte_track_bits(spte, new_spte);
855 spte = rmap_next(kvm, rmapp, spte);
859 kvm_flush_remote_tlbs(kvm);
864 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
866 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
872 struct kvm_memslots *slots;
874 slots = kvm_memslots(kvm);
876 for (i = 0; i < slots->nmemslots; i++) {
877 struct kvm_memory_slot *memslot = &slots->memslots[i];
878 unsigned long start = memslot->userspace_addr;
881 end = start + (memslot->npages << PAGE_SHIFT);
882 if (hva >= start && hva < end) {
883 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
884 gfn_t gfn = memslot->base_gfn + gfn_offset;
886 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
888 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
889 struct kvm_lpage_info *linfo;
891 linfo = lpage_info_slot(gfn, memslot,
892 PT_DIRECTORY_LEVEL + j);
893 ret |= handler(kvm, &linfo->rmap_pde, data);
895 trace_kvm_age_page(hva, memslot, ret);
903 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
905 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
908 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
910 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
913 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
920 * Emulate the accessed bit for EPT, by checking if this page has
921 * an EPT mapping, and clearing it if it does. On the next access,
922 * a new EPT mapping will be established.
923 * This has some overhead, but not as much as the cost of swapping
924 * out actively used pages or breaking up actively used hugepages.
926 if (!shadow_accessed_mask)
927 return kvm_unmap_rmapp(kvm, rmapp, data);
929 spte = rmap_next(kvm, rmapp, NULL);
933 BUG_ON(!(_spte & PT_PRESENT_MASK));
934 _young = _spte & PT_ACCESSED_MASK;
937 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
939 spte = rmap_next(kvm, rmapp, spte);
944 #define RMAP_RECYCLE_THRESHOLD 1000
946 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
948 unsigned long *rmapp;
949 struct kvm_mmu_page *sp;
951 sp = page_header(__pa(spte));
953 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
955 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
956 kvm_flush_remote_tlbs(vcpu->kvm);
959 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
961 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
965 static int is_empty_shadow_page(u64 *spt)
970 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
971 if (is_shadow_present_pte(*pos)) {
972 printk(KERN_ERR "%s: %p %llx\n", __func__,
981 * This value is the sum of all of the kvm instances's
982 * kvm->arch.n_used_mmu_pages values. We need a global,
983 * aggregate version in order to make the slab shrinker
986 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
988 kvm->arch.n_used_mmu_pages += nr;
989 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
992 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
994 ASSERT(is_empty_shadow_page(sp->spt));
995 hlist_del(&sp->hash_link);
997 __free_page(virt_to_page(sp->spt));
998 if (!sp->role.direct)
999 __free_page(virt_to_page(sp->gfns));
1000 kmem_cache_free(mmu_page_header_cache, sp);
1001 kvm_mod_used_mmu_pages(kvm, -1);
1004 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1006 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1009 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1010 u64 *parent_pte, int direct)
1012 struct kvm_mmu_page *sp;
1014 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
1015 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
1017 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
1019 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1020 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1021 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
1022 sp->multimapped = 0;
1023 sp->parent_pte = parent_pte;
1024 kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1028 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1029 struct kvm_mmu_page *sp, u64 *parent_pte)
1031 struct kvm_pte_chain *pte_chain;
1032 struct hlist_node *node;
1037 if (!sp->multimapped) {
1038 u64 *old = sp->parent_pte;
1041 sp->parent_pte = parent_pte;
1044 sp->multimapped = 1;
1045 pte_chain = mmu_alloc_pte_chain(vcpu);
1046 INIT_HLIST_HEAD(&sp->parent_ptes);
1047 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1048 pte_chain->parent_ptes[0] = old;
1050 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1051 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1053 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1054 if (!pte_chain->parent_ptes[i]) {
1055 pte_chain->parent_ptes[i] = parent_pte;
1059 pte_chain = mmu_alloc_pte_chain(vcpu);
1061 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1062 pte_chain->parent_ptes[0] = parent_pte;
1065 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1068 struct kvm_pte_chain *pte_chain;
1069 struct hlist_node *node;
1072 if (!sp->multimapped) {
1073 BUG_ON(sp->parent_pte != parent_pte);
1074 sp->parent_pte = NULL;
1077 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1078 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1079 if (!pte_chain->parent_ptes[i])
1081 if (pte_chain->parent_ptes[i] != parent_pte)
1083 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1084 && pte_chain->parent_ptes[i + 1]) {
1085 pte_chain->parent_ptes[i]
1086 = pte_chain->parent_ptes[i + 1];
1089 pte_chain->parent_ptes[i] = NULL;
1091 hlist_del(&pte_chain->link);
1092 mmu_free_pte_chain(pte_chain);
1093 if (hlist_empty(&sp->parent_ptes)) {
1094 sp->multimapped = 0;
1095 sp->parent_pte = NULL;
1103 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1105 struct kvm_pte_chain *pte_chain;
1106 struct hlist_node *node;
1107 struct kvm_mmu_page *parent_sp;
1110 if (!sp->multimapped && sp->parent_pte) {
1111 parent_sp = page_header(__pa(sp->parent_pte));
1112 fn(parent_sp, sp->parent_pte);
1116 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1117 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1118 u64 *spte = pte_chain->parent_ptes[i];
1122 parent_sp = page_header(__pa(spte));
1123 fn(parent_sp, spte);
1127 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1128 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1130 mmu_parent_walk(sp, mark_unsync);
1133 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1137 index = spte - sp->spt;
1138 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1140 if (sp->unsync_children++)
1142 kvm_mmu_mark_parents_unsync(sp);
1145 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1146 struct kvm_mmu_page *sp)
1150 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1151 sp->spt[i] = shadow_trap_nonpresent_pte;
1154 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1155 struct kvm_mmu_page *sp)
1160 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1164 #define KVM_PAGE_ARRAY_NR 16
1166 struct kvm_mmu_pages {
1167 struct mmu_page_and_offset {
1168 struct kvm_mmu_page *sp;
1170 } page[KVM_PAGE_ARRAY_NR];
1174 #define for_each_unsync_children(bitmap, idx) \
1175 for (idx = find_first_bit(bitmap, 512); \
1177 idx = find_next_bit(bitmap, 512, idx+1))
1179 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1185 for (i=0; i < pvec->nr; i++)
1186 if (pvec->page[i].sp == sp)
1189 pvec->page[pvec->nr].sp = sp;
1190 pvec->page[pvec->nr].idx = idx;
1192 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1195 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1196 struct kvm_mmu_pages *pvec)
1198 int i, ret, nr_unsync_leaf = 0;
1200 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1201 struct kvm_mmu_page *child;
1202 u64 ent = sp->spt[i];
1204 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1205 goto clear_child_bitmap;
1207 child = page_header(ent & PT64_BASE_ADDR_MASK);
1209 if (child->unsync_children) {
1210 if (mmu_pages_add(pvec, child, i))
1213 ret = __mmu_unsync_walk(child, pvec);
1215 goto clear_child_bitmap;
1217 nr_unsync_leaf += ret;
1220 } else if (child->unsync) {
1222 if (mmu_pages_add(pvec, child, i))
1225 goto clear_child_bitmap;
1230 __clear_bit(i, sp->unsync_child_bitmap);
1231 sp->unsync_children--;
1232 WARN_ON((int)sp->unsync_children < 0);
1236 return nr_unsync_leaf;
1239 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1240 struct kvm_mmu_pages *pvec)
1242 if (!sp->unsync_children)
1245 mmu_pages_add(pvec, sp, 0);
1246 return __mmu_unsync_walk(sp, pvec);
1249 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1251 WARN_ON(!sp->unsync);
1252 trace_kvm_mmu_sync_page(sp);
1254 --kvm->stat.mmu_unsync;
1257 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1258 struct list_head *invalid_list);
1259 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1260 struct list_head *invalid_list);
1262 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1263 hlist_for_each_entry(sp, pos, \
1264 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1265 if ((sp)->gfn != (gfn)) {} else
1267 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1268 hlist_for_each_entry(sp, pos, \
1269 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1270 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1271 (sp)->role.invalid) {} else
1273 /* @sp->gfn should be write-protected at the call site */
1274 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1275 struct list_head *invalid_list, bool clear_unsync)
1277 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1278 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1283 kvm_unlink_unsync_page(vcpu->kvm, sp);
1285 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1286 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1290 kvm_mmu_flush_tlb(vcpu);
1294 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1295 struct kvm_mmu_page *sp)
1297 LIST_HEAD(invalid_list);
1300 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1302 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1307 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1308 struct list_head *invalid_list)
1310 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1313 /* @gfn should be write-protected at the call site */
1314 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1316 struct kvm_mmu_page *s;
1317 struct hlist_node *node;
1318 LIST_HEAD(invalid_list);
1321 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1325 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1326 kvm_unlink_unsync_page(vcpu->kvm, s);
1327 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1328 (vcpu->arch.mmu.sync_page(vcpu, s))) {
1329 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1335 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1337 kvm_mmu_flush_tlb(vcpu);
1340 struct mmu_page_path {
1341 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1342 unsigned int idx[PT64_ROOT_LEVEL-1];
1345 #define for_each_sp(pvec, sp, parents, i) \
1346 for (i = mmu_pages_next(&pvec, &parents, -1), \
1347 sp = pvec.page[i].sp; \
1348 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1349 i = mmu_pages_next(&pvec, &parents, i))
1351 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1352 struct mmu_page_path *parents,
1357 for (n = i+1; n < pvec->nr; n++) {
1358 struct kvm_mmu_page *sp = pvec->page[n].sp;
1360 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1361 parents->idx[0] = pvec->page[n].idx;
1365 parents->parent[sp->role.level-2] = sp;
1366 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1372 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1374 struct kvm_mmu_page *sp;
1375 unsigned int level = 0;
1378 unsigned int idx = parents->idx[level];
1380 sp = parents->parent[level];
1384 --sp->unsync_children;
1385 WARN_ON((int)sp->unsync_children < 0);
1386 __clear_bit(idx, sp->unsync_child_bitmap);
1388 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1391 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1392 struct mmu_page_path *parents,
1393 struct kvm_mmu_pages *pvec)
1395 parents->parent[parent->role.level-1] = NULL;
1399 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1400 struct kvm_mmu_page *parent)
1403 struct kvm_mmu_page *sp;
1404 struct mmu_page_path parents;
1405 struct kvm_mmu_pages pages;
1406 LIST_HEAD(invalid_list);
1408 kvm_mmu_pages_init(parent, &parents, &pages);
1409 while (mmu_unsync_walk(parent, &pages)) {
1412 for_each_sp(pages, sp, parents, i)
1413 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1416 kvm_flush_remote_tlbs(vcpu->kvm);
1418 for_each_sp(pages, sp, parents, i) {
1419 kvm_sync_page(vcpu, sp, &invalid_list);
1420 mmu_pages_clear_parents(&parents);
1422 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1423 cond_resched_lock(&vcpu->kvm->mmu_lock);
1424 kvm_mmu_pages_init(parent, &parents, &pages);
1428 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1436 union kvm_mmu_page_role role;
1438 struct kvm_mmu_page *sp;
1439 struct hlist_node *node;
1440 bool need_sync = false;
1442 role = vcpu->arch.mmu.base_role;
1444 role.direct = direct;
1447 role.access = access;
1448 if (!vcpu->arch.mmu.direct_map
1449 && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1450 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1451 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1452 role.quadrant = quadrant;
1454 for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1455 if (!need_sync && sp->unsync)
1458 if (sp->role.word != role.word)
1461 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1464 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1465 if (sp->unsync_children) {
1466 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1467 kvm_mmu_mark_parents_unsync(sp);
1468 } else if (sp->unsync)
1469 kvm_mmu_mark_parents_unsync(sp);
1471 trace_kvm_mmu_get_page(sp, false);
1474 ++vcpu->kvm->stat.mmu_cache_miss;
1475 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1480 hlist_add_head(&sp->hash_link,
1481 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1483 if (rmap_write_protect(vcpu->kvm, gfn))
1484 kvm_flush_remote_tlbs(vcpu->kvm);
1485 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1486 kvm_sync_pages(vcpu, gfn);
1488 account_shadowed(vcpu->kvm, gfn);
1490 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1491 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1493 nonpaging_prefetch_page(vcpu, sp);
1494 trace_kvm_mmu_get_page(sp, true);
1498 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1499 struct kvm_vcpu *vcpu, u64 addr)
1501 iterator->addr = addr;
1502 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1503 iterator->level = vcpu->arch.mmu.shadow_root_level;
1505 if (iterator->level == PT64_ROOT_LEVEL &&
1506 vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
1507 !vcpu->arch.mmu.direct_map)
1510 if (iterator->level == PT32E_ROOT_LEVEL) {
1511 iterator->shadow_addr
1512 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1513 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1515 if (!iterator->shadow_addr)
1516 iterator->level = 0;
1520 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1522 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1525 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1526 if (is_large_pte(*iterator->sptep))
1529 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1530 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1534 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1536 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1540 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1544 spte = __pa(sp->spt)
1545 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1546 | PT_WRITABLE_MASK | PT_USER_MASK;
1547 __set_spte(sptep, spte);
1550 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1552 if (is_large_pte(*sptep)) {
1553 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1554 kvm_flush_remote_tlbs(vcpu->kvm);
1558 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1559 unsigned direct_access)
1561 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1562 struct kvm_mmu_page *child;
1565 * For the direct sp, if the guest pte's dirty bit
1566 * changed form clean to dirty, it will corrupt the
1567 * sp's access: allow writable in the read-only sp,
1568 * so we should update the spte at this point to get
1569 * a new sp with the correct access.
1571 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1572 if (child->role.access == direct_access)
1575 mmu_page_remove_parent_pte(child, sptep);
1576 __set_spte(sptep, shadow_trap_nonpresent_pte);
1577 kvm_flush_remote_tlbs(vcpu->kvm);
1581 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1582 struct kvm_mmu_page *sp)
1590 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1593 if (is_shadow_present_pte(ent)) {
1594 if (!is_last_spte(ent, sp->role.level)) {
1595 ent &= PT64_BASE_ADDR_MASK;
1596 mmu_page_remove_parent_pte(page_header(ent),
1599 if (is_large_pte(ent))
1601 drop_spte(kvm, &pt[i],
1602 shadow_trap_nonpresent_pte);
1605 pt[i] = shadow_trap_nonpresent_pte;
1609 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1611 mmu_page_remove_parent_pte(sp, parent_pte);
1614 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1617 struct kvm_vcpu *vcpu;
1619 kvm_for_each_vcpu(i, vcpu, kvm)
1620 vcpu->arch.last_pte_updated = NULL;
1623 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1627 while (sp->multimapped || sp->parent_pte) {
1628 if (!sp->multimapped)
1629 parent_pte = sp->parent_pte;
1631 struct kvm_pte_chain *chain;
1633 chain = container_of(sp->parent_ptes.first,
1634 struct kvm_pte_chain, link);
1635 parent_pte = chain->parent_ptes[0];
1637 BUG_ON(!parent_pte);
1638 kvm_mmu_put_page(sp, parent_pte);
1639 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1643 static int mmu_zap_unsync_children(struct kvm *kvm,
1644 struct kvm_mmu_page *parent,
1645 struct list_head *invalid_list)
1648 struct mmu_page_path parents;
1649 struct kvm_mmu_pages pages;
1651 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1654 kvm_mmu_pages_init(parent, &parents, &pages);
1655 while (mmu_unsync_walk(parent, &pages)) {
1656 struct kvm_mmu_page *sp;
1658 for_each_sp(pages, sp, parents, i) {
1659 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1660 mmu_pages_clear_parents(&parents);
1663 kvm_mmu_pages_init(parent, &parents, &pages);
1669 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1670 struct list_head *invalid_list)
1674 trace_kvm_mmu_prepare_zap_page(sp);
1675 ++kvm->stat.mmu_shadow_zapped;
1676 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1677 kvm_mmu_page_unlink_children(kvm, sp);
1678 kvm_mmu_unlink_parents(kvm, sp);
1679 if (!sp->role.invalid && !sp->role.direct)
1680 unaccount_shadowed(kvm, sp->gfn);
1682 kvm_unlink_unsync_page(kvm, sp);
1683 if (!sp->root_count) {
1686 list_move(&sp->link, invalid_list);
1688 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1689 kvm_reload_remote_mmus(kvm);
1692 sp->role.invalid = 1;
1693 kvm_mmu_reset_last_pte_updated(kvm);
1697 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1698 struct list_head *invalid_list)
1700 struct kvm_mmu_page *sp;
1702 if (list_empty(invalid_list))
1705 kvm_flush_remote_tlbs(kvm);
1708 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1709 WARN_ON(!sp->role.invalid || sp->root_count);
1710 kvm_mmu_free_page(kvm, sp);
1711 } while (!list_empty(invalid_list));
1716 * Changing the number of mmu pages allocated to the vm
1717 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
1719 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
1721 LIST_HEAD(invalid_list);
1723 * If we set the number of mmu pages to be smaller be than the
1724 * number of actived pages , we must to free some mmu pages before we
1728 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
1729 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages &&
1730 !list_empty(&kvm->arch.active_mmu_pages)) {
1731 struct kvm_mmu_page *page;
1733 page = container_of(kvm->arch.active_mmu_pages.prev,
1734 struct kvm_mmu_page, link);
1735 kvm_mmu_prepare_zap_page(kvm, page, &invalid_list);
1736 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1738 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
1741 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
1744 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1746 struct kvm_mmu_page *sp;
1747 struct hlist_node *node;
1748 LIST_HEAD(invalid_list);
1751 pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
1754 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1755 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
1758 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1760 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1764 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1766 struct kvm_mmu_page *sp;
1767 struct hlist_node *node;
1768 LIST_HEAD(invalid_list);
1770 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1771 pgprintk("%s: zap %llx %x\n",
1772 __func__, gfn, sp->role.word);
1773 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1775 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1778 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1780 int slot = memslot_id(kvm, gfn);
1781 struct kvm_mmu_page *sp = page_header(__pa(pte));
1783 __set_bit(slot, sp->slot_bitmap);
1786 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1791 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1794 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1795 if (pt[i] == shadow_notrap_nonpresent_pte)
1796 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1801 * The function is based on mtrr_type_lookup() in
1802 * arch/x86/kernel/cpu/mtrr/generic.c
1804 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1809 u8 prev_match, curr_match;
1810 int num_var_ranges = KVM_NR_VAR_MTRR;
1812 if (!mtrr_state->enabled)
1815 /* Make end inclusive end, instead of exclusive */
1818 /* Look in fixed ranges. Just return the type as per start */
1819 if (mtrr_state->have_fixed && (start < 0x100000)) {
1822 if (start < 0x80000) {
1824 idx += (start >> 16);
1825 return mtrr_state->fixed_ranges[idx];
1826 } else if (start < 0xC0000) {
1828 idx += ((start - 0x80000) >> 14);
1829 return mtrr_state->fixed_ranges[idx];
1830 } else if (start < 0x1000000) {
1832 idx += ((start - 0xC0000) >> 12);
1833 return mtrr_state->fixed_ranges[idx];
1838 * Look in variable ranges
1839 * Look of multiple ranges matching this address and pick type
1840 * as per MTRR precedence
1842 if (!(mtrr_state->enabled & 2))
1843 return mtrr_state->def_type;
1846 for (i = 0; i < num_var_ranges; ++i) {
1847 unsigned short start_state, end_state;
1849 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1852 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1853 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1854 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1855 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1857 start_state = ((start & mask) == (base & mask));
1858 end_state = ((end & mask) == (base & mask));
1859 if (start_state != end_state)
1862 if ((start & mask) != (base & mask))
1865 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1866 if (prev_match == 0xFF) {
1867 prev_match = curr_match;
1871 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1872 curr_match == MTRR_TYPE_UNCACHABLE)
1873 return MTRR_TYPE_UNCACHABLE;
1875 if ((prev_match == MTRR_TYPE_WRBACK &&
1876 curr_match == MTRR_TYPE_WRTHROUGH) ||
1877 (prev_match == MTRR_TYPE_WRTHROUGH &&
1878 curr_match == MTRR_TYPE_WRBACK)) {
1879 prev_match = MTRR_TYPE_WRTHROUGH;
1880 curr_match = MTRR_TYPE_WRTHROUGH;
1883 if (prev_match != curr_match)
1884 return MTRR_TYPE_UNCACHABLE;
1887 if (prev_match != 0xFF)
1890 return mtrr_state->def_type;
1893 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1897 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1898 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1899 if (mtrr == 0xfe || mtrr == 0xff)
1900 mtrr = MTRR_TYPE_WRBACK;
1903 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1905 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1907 trace_kvm_mmu_unsync_page(sp);
1908 ++vcpu->kvm->stat.mmu_unsync;
1911 kvm_mmu_mark_parents_unsync(sp);
1912 mmu_convert_notrap(sp);
1915 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1917 struct kvm_mmu_page *s;
1918 struct hlist_node *node;
1920 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1923 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1924 __kvm_unsync_page(vcpu, s);
1928 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1931 struct kvm_mmu_page *s;
1932 struct hlist_node *node;
1933 bool need_unsync = false;
1935 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1939 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1942 if (!need_unsync && !s->unsync) {
1949 kvm_unsync_pages(vcpu, gfn);
1953 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1954 unsigned pte_access, int user_fault,
1955 int write_fault, int dirty, int level,
1956 gfn_t gfn, pfn_t pfn, bool speculative,
1957 bool can_unsync, bool host_writable)
1959 u64 spte, entry = *sptep;
1963 * We don't set the accessed bit, since we sometimes want to see
1964 * whether the guest actually used the pte (in order to detect
1967 spte = PT_PRESENT_MASK;
1969 spte |= shadow_accessed_mask;
1971 pte_access &= ~ACC_WRITE_MASK;
1972 if (pte_access & ACC_EXEC_MASK)
1973 spte |= shadow_x_mask;
1975 spte |= shadow_nx_mask;
1976 if (pte_access & ACC_USER_MASK)
1977 spte |= shadow_user_mask;
1978 if (level > PT_PAGE_TABLE_LEVEL)
1979 spte |= PT_PAGE_SIZE_MASK;
1981 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1982 kvm_is_mmio_pfn(pfn));
1985 spte |= SPTE_HOST_WRITEABLE;
1987 spte |= (u64)pfn << PAGE_SHIFT;
1989 if ((pte_access & ACC_WRITE_MASK)
1990 || (!vcpu->arch.mmu.direct_map && write_fault
1991 && !is_write_protection(vcpu) && !user_fault)) {
1993 if (level > PT_PAGE_TABLE_LEVEL &&
1994 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1996 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2000 spte |= PT_WRITABLE_MASK;
2002 if (!vcpu->arch.mmu.direct_map
2003 && !(pte_access & ACC_WRITE_MASK))
2004 spte &= ~PT_USER_MASK;
2007 * Optimization: for pte sync, if spte was writable the hash
2008 * lookup is unnecessary (and expensive). Write protection
2009 * is responsibility of mmu_get_page / kvm_sync_page.
2010 * Same reasoning can be applied to dirty page accounting.
2012 if (!can_unsync && is_writable_pte(*sptep))
2015 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2016 pgprintk("%s: found shadow page for %llx, marking ro\n",
2019 pte_access &= ~ACC_WRITE_MASK;
2020 if (is_writable_pte(spte))
2021 spte &= ~PT_WRITABLE_MASK;
2025 if (pte_access & ACC_WRITE_MASK)
2026 mark_page_dirty(vcpu->kvm, gfn);
2029 update_spte(sptep, spte);
2031 * If we overwrite a writable spte with a read-only one we
2032 * should flush remote TLBs. Otherwise rmap_write_protect
2033 * will find a read-only spte, even though the writable spte
2034 * might be cached on a CPU's TLB.
2036 if (is_writable_pte(entry) && !is_writable_pte(*sptep))
2037 kvm_flush_remote_tlbs(vcpu->kvm);
2042 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2043 unsigned pt_access, unsigned pte_access,
2044 int user_fault, int write_fault, int dirty,
2045 int *ptwrite, int level, gfn_t gfn,
2046 pfn_t pfn, bool speculative,
2049 int was_rmapped = 0;
2052 pgprintk("%s: spte %llx access %x write_fault %d"
2053 " user_fault %d gfn %llx\n",
2054 __func__, *sptep, pt_access,
2055 write_fault, user_fault, gfn);
2057 if (is_rmap_spte(*sptep)) {
2059 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2060 * the parent of the now unreachable PTE.
2062 if (level > PT_PAGE_TABLE_LEVEL &&
2063 !is_large_pte(*sptep)) {
2064 struct kvm_mmu_page *child;
2067 child = page_header(pte & PT64_BASE_ADDR_MASK);
2068 mmu_page_remove_parent_pte(child, sptep);
2069 __set_spte(sptep, shadow_trap_nonpresent_pte);
2070 kvm_flush_remote_tlbs(vcpu->kvm);
2071 } else if (pfn != spte_to_pfn(*sptep)) {
2072 pgprintk("hfn old %llx new %llx\n",
2073 spte_to_pfn(*sptep), pfn);
2074 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2075 kvm_flush_remote_tlbs(vcpu->kvm);
2080 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2081 dirty, level, gfn, pfn, speculative, true,
2085 kvm_mmu_flush_tlb(vcpu);
2088 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2089 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2090 is_large_pte(*sptep)? "2MB" : "4kB",
2091 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2093 if (!was_rmapped && is_large_pte(*sptep))
2094 ++vcpu->kvm->stat.lpages;
2096 page_header_update_slot(vcpu->kvm, sptep, gfn);
2098 rmap_count = rmap_add(vcpu, sptep, gfn);
2099 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2100 rmap_recycle(vcpu, sptep, gfn);
2102 kvm_release_pfn_clean(pfn);
2104 vcpu->arch.last_pte_updated = sptep;
2105 vcpu->arch.last_pte_gfn = gfn;
2109 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2113 static struct kvm_memory_slot *
2114 pte_prefetch_gfn_to_memslot(struct kvm_vcpu *vcpu, gfn_t gfn, bool no_dirty_log)
2116 struct kvm_memory_slot *slot;
2118 slot = gfn_to_memslot(vcpu->kvm, gfn);
2119 if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
2120 (no_dirty_log && slot->dirty_bitmap))
2126 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2129 struct kvm_memory_slot *slot;
2132 slot = pte_prefetch_gfn_to_memslot(vcpu, gfn, no_dirty_log);
2135 return page_to_pfn(bad_page);
2138 hva = gfn_to_hva_memslot(slot, gfn);
2140 return hva_to_pfn_atomic(vcpu->kvm, hva);
2143 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2144 struct kvm_mmu_page *sp,
2145 u64 *start, u64 *end)
2147 struct page *pages[PTE_PREFETCH_NUM];
2148 unsigned access = sp->role.access;
2152 gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2153 if (!pte_prefetch_gfn_to_memslot(vcpu, gfn, access & ACC_WRITE_MASK))
2156 ret = gfn_to_page_many_atomic(vcpu->kvm, gfn, pages, end - start);
2160 for (i = 0; i < ret; i++, gfn++, start++)
2161 mmu_set_spte(vcpu, start, ACC_ALL,
2162 access, 0, 0, 1, NULL,
2163 sp->role.level, gfn,
2164 page_to_pfn(pages[i]), true, true);
2169 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2170 struct kvm_mmu_page *sp, u64 *sptep)
2172 u64 *spte, *start = NULL;
2175 WARN_ON(!sp->role.direct);
2177 i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2180 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2181 if (*spte != shadow_trap_nonpresent_pte || spte == sptep) {
2184 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2192 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2194 struct kvm_mmu_page *sp;
2197 * Since it's no accessed bit on EPT, it's no way to
2198 * distinguish between actually accessed translations
2199 * and prefetched, so disable pte prefetch if EPT is
2202 if (!shadow_accessed_mask)
2205 sp = page_header(__pa(sptep));
2206 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2209 __direct_pte_prefetch(vcpu, sp, sptep);
2212 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2213 int map_writable, int level, gfn_t gfn, pfn_t pfn,
2216 struct kvm_shadow_walk_iterator iterator;
2217 struct kvm_mmu_page *sp;
2221 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2222 if (iterator.level == level) {
2223 unsigned pte_access = ACC_ALL;
2226 pte_access &= ~ACC_WRITE_MASK;
2227 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, pte_access,
2228 0, write, 1, &pt_write,
2229 level, gfn, pfn, prefault, map_writable);
2230 direct_pte_prefetch(vcpu, iterator.sptep);
2231 ++vcpu->stat.pf_fixed;
2235 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2236 u64 base_addr = iterator.addr;
2238 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2239 pseudo_gfn = base_addr >> PAGE_SHIFT;
2240 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2242 1, ACC_ALL, iterator.sptep);
2244 pgprintk("nonpaging_map: ENOMEM\n");
2245 kvm_release_pfn_clean(pfn);
2249 __set_spte(iterator.sptep,
2251 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2252 | shadow_user_mask | shadow_x_mask
2253 | shadow_accessed_mask);
2259 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2263 info.si_signo = SIGBUS;
2265 info.si_code = BUS_MCEERR_AR;
2266 info.si_addr = (void __user *)address;
2267 info.si_addr_lsb = PAGE_SHIFT;
2269 send_sig_info(SIGBUS, &info, tsk);
2272 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2274 kvm_release_pfn_clean(pfn);
2275 if (is_hwpoison_pfn(pfn)) {
2276 kvm_send_hwpoison_signal(gfn_to_hva(kvm, gfn), current);
2278 } else if (is_fault_pfn(pfn))
2284 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
2285 gva_t gva, pfn_t *pfn, bool write, bool *writable);
2287 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn,
2293 unsigned long mmu_seq;
2296 level = mapping_level(vcpu, gfn);
2299 * This path builds a PAE pagetable - so we can map 2mb pages at
2300 * maximum. Therefore check if the level is larger than that.
2302 if (level > PT_DIRECTORY_LEVEL)
2303 level = PT_DIRECTORY_LEVEL;
2305 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2307 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2310 if (try_async_pf(vcpu, prefault, gfn, v, &pfn, write, &map_writable))
2314 if (is_error_pfn(pfn))
2315 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2317 spin_lock(&vcpu->kvm->mmu_lock);
2318 if (mmu_notifier_retry(vcpu, mmu_seq))
2320 kvm_mmu_free_some_pages(vcpu);
2321 r = __direct_map(vcpu, v, write, map_writable, level, gfn, pfn,
2323 spin_unlock(&vcpu->kvm->mmu_lock);
2329 spin_unlock(&vcpu->kvm->mmu_lock);
2330 kvm_release_pfn_clean(pfn);
2335 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2338 struct kvm_mmu_page *sp;
2339 LIST_HEAD(invalid_list);
2341 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2343 spin_lock(&vcpu->kvm->mmu_lock);
2344 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
2345 (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
2346 vcpu->arch.mmu.direct_map)) {
2347 hpa_t root = vcpu->arch.mmu.root_hpa;
2349 sp = page_header(root);
2351 if (!sp->root_count && sp->role.invalid) {
2352 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2353 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2355 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2356 spin_unlock(&vcpu->kvm->mmu_lock);
2359 for (i = 0; i < 4; ++i) {
2360 hpa_t root = vcpu->arch.mmu.pae_root[i];
2363 root &= PT64_BASE_ADDR_MASK;
2364 sp = page_header(root);
2366 if (!sp->root_count && sp->role.invalid)
2367 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2370 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2372 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2373 spin_unlock(&vcpu->kvm->mmu_lock);
2374 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2377 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2381 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2382 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2389 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
2391 struct kvm_mmu_page *sp;
2394 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2395 spin_lock(&vcpu->kvm->mmu_lock);
2396 kvm_mmu_free_some_pages(vcpu);
2397 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL,
2400 spin_unlock(&vcpu->kvm->mmu_lock);
2401 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
2402 } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
2403 for (i = 0; i < 4; ++i) {
2404 hpa_t root = vcpu->arch.mmu.pae_root[i];
2406 ASSERT(!VALID_PAGE(root));
2407 spin_lock(&vcpu->kvm->mmu_lock);
2408 kvm_mmu_free_some_pages(vcpu);
2409 sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT),
2411 PT32_ROOT_LEVEL, 1, ACC_ALL,
2413 root = __pa(sp->spt);
2415 spin_unlock(&vcpu->kvm->mmu_lock);
2416 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2418 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2425 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
2427 struct kvm_mmu_page *sp;
2432 root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
2434 if (mmu_check_root(vcpu, root_gfn))
2438 * Do we shadow a long mode page table? If so we need to
2439 * write-protect the guests page table root.
2441 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2442 hpa_t root = vcpu->arch.mmu.root_hpa;
2444 ASSERT(!VALID_PAGE(root));
2446 spin_lock(&vcpu->kvm->mmu_lock);
2447 kvm_mmu_free_some_pages(vcpu);
2448 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
2450 root = __pa(sp->spt);
2452 spin_unlock(&vcpu->kvm->mmu_lock);
2453 vcpu->arch.mmu.root_hpa = root;
2458 * We shadow a 32 bit page table. This may be a legacy 2-level
2459 * or a PAE 3-level page table. In either case we need to be aware that
2460 * the shadow page table may be a PAE or a long mode page table.
2462 pm_mask = PT_PRESENT_MASK;
2463 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
2464 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
2466 for (i = 0; i < 4; ++i) {
2467 hpa_t root = vcpu->arch.mmu.pae_root[i];
2469 ASSERT(!VALID_PAGE(root));
2470 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2471 pdptr = kvm_pdptr_read_mmu(vcpu, &vcpu->arch.mmu, i);
2472 if (!is_present_gpte(pdptr)) {
2473 vcpu->arch.mmu.pae_root[i] = 0;
2476 root_gfn = pdptr >> PAGE_SHIFT;
2477 if (mmu_check_root(vcpu, root_gfn))
2480 spin_lock(&vcpu->kvm->mmu_lock);
2481 kvm_mmu_free_some_pages(vcpu);
2482 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2485 root = __pa(sp->spt);
2487 spin_unlock(&vcpu->kvm->mmu_lock);
2489 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
2491 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2494 * If we shadow a 32 bit page table with a long mode page
2495 * table we enter this path.
2497 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2498 if (vcpu->arch.mmu.lm_root == NULL) {
2500 * The additional page necessary for this is only
2501 * allocated on demand.
2506 lm_root = (void*)get_zeroed_page(GFP_KERNEL);
2507 if (lm_root == NULL)
2510 lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
2512 vcpu->arch.mmu.lm_root = lm_root;
2515 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
2521 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2523 if (vcpu->arch.mmu.direct_map)
2524 return mmu_alloc_direct_roots(vcpu);
2526 return mmu_alloc_shadow_roots(vcpu);
2529 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2532 struct kvm_mmu_page *sp;
2534 if (vcpu->arch.mmu.direct_map)
2537 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2540 trace_kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC);
2541 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2542 hpa_t root = vcpu->arch.mmu.root_hpa;
2543 sp = page_header(root);
2544 mmu_sync_children(vcpu, sp);
2545 trace_kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
2548 for (i = 0; i < 4; ++i) {
2549 hpa_t root = vcpu->arch.mmu.pae_root[i];
2551 if (root && VALID_PAGE(root)) {
2552 root &= PT64_BASE_ADDR_MASK;
2553 sp = page_header(root);
2554 mmu_sync_children(vcpu, sp);
2557 trace_kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
2560 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2562 spin_lock(&vcpu->kvm->mmu_lock);
2563 mmu_sync_roots(vcpu);
2564 spin_unlock(&vcpu->kvm->mmu_lock);
2567 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2568 u32 access, struct x86_exception *exception)
2571 exception->error_code = 0;
2575 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
2577 struct x86_exception *exception)
2580 exception->error_code = 0;
2581 return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access);
2584 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2585 u32 error_code, bool prefault)
2590 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2591 r = mmu_topup_memory_caches(vcpu);
2596 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2598 gfn = gva >> PAGE_SHIFT;
2600 return nonpaging_map(vcpu, gva & PAGE_MASK,
2601 error_code & PFERR_WRITE_MASK, gfn, prefault);
2604 static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn)
2606 struct kvm_arch_async_pf arch;
2608 arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
2610 arch.direct_map = vcpu->arch.mmu.direct_map;
2611 arch.cr3 = vcpu->arch.mmu.get_cr3(vcpu);
2613 return kvm_setup_async_pf(vcpu, gva, gfn, &arch);
2616 static bool can_do_async_pf(struct kvm_vcpu *vcpu)
2618 if (unlikely(!irqchip_in_kernel(vcpu->kvm) ||
2619 kvm_event_needs_reinjection(vcpu)))
2622 return kvm_x86_ops->interrupt_allowed(vcpu);
2625 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
2626 gva_t gva, pfn_t *pfn, bool write, bool *writable)
2630 *pfn = gfn_to_pfn_async(vcpu->kvm, gfn, &async, write, writable);
2633 return false; /* *pfn has correct page already */
2635 put_page(pfn_to_page(*pfn));
2637 if (!prefault && can_do_async_pf(vcpu)) {
2638 trace_kvm_try_async_get_page(gva, gfn);
2639 if (kvm_find_async_pf_gfn(vcpu, gfn)) {
2640 trace_kvm_async_pf_doublefault(gva, gfn);
2641 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
2643 } else if (kvm_arch_setup_async_pf(vcpu, gva, gfn))
2647 *pfn = gfn_to_pfn_prot(vcpu->kvm, gfn, write, writable);
2652 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code,
2658 gfn_t gfn = gpa >> PAGE_SHIFT;
2659 unsigned long mmu_seq;
2660 int write = error_code & PFERR_WRITE_MASK;
2664 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2666 r = mmu_topup_memory_caches(vcpu);
2670 level = mapping_level(vcpu, gfn);
2672 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2674 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2677 if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable))
2681 if (is_error_pfn(pfn))
2682 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2683 spin_lock(&vcpu->kvm->mmu_lock);
2684 if (mmu_notifier_retry(vcpu, mmu_seq))
2686 kvm_mmu_free_some_pages(vcpu);
2687 r = __direct_map(vcpu, gpa, write, map_writable,
2688 level, gfn, pfn, prefault);
2689 spin_unlock(&vcpu->kvm->mmu_lock);
2694 spin_unlock(&vcpu->kvm->mmu_lock);
2695 kvm_release_pfn_clean(pfn);
2699 static void nonpaging_free(struct kvm_vcpu *vcpu)
2701 mmu_free_roots(vcpu);
2704 static int nonpaging_init_context(struct kvm_vcpu *vcpu,
2705 struct kvm_mmu *context)
2707 context->new_cr3 = nonpaging_new_cr3;
2708 context->page_fault = nonpaging_page_fault;
2709 context->gva_to_gpa = nonpaging_gva_to_gpa;
2710 context->free = nonpaging_free;
2711 context->prefetch_page = nonpaging_prefetch_page;
2712 context->sync_page = nonpaging_sync_page;
2713 context->invlpg = nonpaging_invlpg;
2714 context->root_level = 0;
2715 context->shadow_root_level = PT32E_ROOT_LEVEL;
2716 context->root_hpa = INVALID_PAGE;
2717 context->direct_map = true;
2718 context->nx = false;
2722 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2724 ++vcpu->stat.tlb_flush;
2725 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2728 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2730 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2731 mmu_free_roots(vcpu);
2734 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
2736 return vcpu->arch.cr3;
2739 static void inject_page_fault(struct kvm_vcpu *vcpu,
2740 struct x86_exception *fault)
2742 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
2745 static void paging_free(struct kvm_vcpu *vcpu)
2747 nonpaging_free(vcpu);
2750 static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
2754 bit7 = (gpte >> 7) & 1;
2755 return (gpte & mmu->rsvd_bits_mask[bit7][level-1]) != 0;
2759 #include "paging_tmpl.h"
2763 #include "paging_tmpl.h"
2766 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
2767 struct kvm_mmu *context,
2770 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2771 u64 exb_bit_rsvd = 0;
2774 exb_bit_rsvd = rsvd_bits(63, 63);
2776 case PT32_ROOT_LEVEL:
2777 /* no rsvd bits for 2 level 4K page table entries */
2778 context->rsvd_bits_mask[0][1] = 0;
2779 context->rsvd_bits_mask[0][0] = 0;
2780 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2782 if (!is_pse(vcpu)) {
2783 context->rsvd_bits_mask[1][1] = 0;
2787 if (is_cpuid_PSE36())
2788 /* 36bits PSE 4MB page */
2789 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2791 /* 32 bits PSE 4MB page */
2792 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2794 case PT32E_ROOT_LEVEL:
2795 context->rsvd_bits_mask[0][2] =
2796 rsvd_bits(maxphyaddr, 63) |
2797 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2798 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2799 rsvd_bits(maxphyaddr, 62); /* PDE */
2800 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2801 rsvd_bits(maxphyaddr, 62); /* PTE */
2802 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2803 rsvd_bits(maxphyaddr, 62) |
2804 rsvd_bits(13, 20); /* large page */
2805 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2807 case PT64_ROOT_LEVEL:
2808 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2809 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2810 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2811 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2812 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2813 rsvd_bits(maxphyaddr, 51);
2814 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2815 rsvd_bits(maxphyaddr, 51);
2816 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2817 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2818 rsvd_bits(maxphyaddr, 51) |
2820 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2821 rsvd_bits(maxphyaddr, 51) |
2822 rsvd_bits(13, 20); /* large page */
2823 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2828 static int paging64_init_context_common(struct kvm_vcpu *vcpu,
2829 struct kvm_mmu *context,
2832 context->nx = is_nx(vcpu);
2834 reset_rsvds_bits_mask(vcpu, context, level);
2836 ASSERT(is_pae(vcpu));
2837 context->new_cr3 = paging_new_cr3;
2838 context->page_fault = paging64_page_fault;
2839 context->gva_to_gpa = paging64_gva_to_gpa;
2840 context->prefetch_page = paging64_prefetch_page;
2841 context->sync_page = paging64_sync_page;
2842 context->invlpg = paging64_invlpg;
2843 context->free = paging_free;
2844 context->root_level = level;
2845 context->shadow_root_level = level;
2846 context->root_hpa = INVALID_PAGE;
2847 context->direct_map = false;
2851 static int paging64_init_context(struct kvm_vcpu *vcpu,
2852 struct kvm_mmu *context)
2854 return paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
2857 static int paging32_init_context(struct kvm_vcpu *vcpu,
2858 struct kvm_mmu *context)
2860 context->nx = false;
2862 reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2864 context->new_cr3 = paging_new_cr3;
2865 context->page_fault = paging32_page_fault;
2866 context->gva_to_gpa = paging32_gva_to_gpa;
2867 context->free = paging_free;
2868 context->prefetch_page = paging32_prefetch_page;
2869 context->sync_page = paging32_sync_page;
2870 context->invlpg = paging32_invlpg;
2871 context->root_level = PT32_ROOT_LEVEL;
2872 context->shadow_root_level = PT32E_ROOT_LEVEL;
2873 context->root_hpa = INVALID_PAGE;
2874 context->direct_map = false;
2878 static int paging32E_init_context(struct kvm_vcpu *vcpu,
2879 struct kvm_mmu *context)
2881 return paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
2884 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2886 struct kvm_mmu *context = vcpu->arch.walk_mmu;
2888 context->new_cr3 = nonpaging_new_cr3;
2889 context->page_fault = tdp_page_fault;
2890 context->free = nonpaging_free;
2891 context->prefetch_page = nonpaging_prefetch_page;
2892 context->sync_page = nonpaging_sync_page;
2893 context->invlpg = nonpaging_invlpg;
2894 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2895 context->root_hpa = INVALID_PAGE;
2896 context->direct_map = true;
2897 context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
2898 context->get_cr3 = get_cr3;
2899 context->inject_page_fault = kvm_inject_page_fault;
2900 context->nx = is_nx(vcpu);
2902 if (!is_paging(vcpu)) {
2903 context->nx = false;
2904 context->gva_to_gpa = nonpaging_gva_to_gpa;
2905 context->root_level = 0;
2906 } else if (is_long_mode(vcpu)) {
2907 context->nx = is_nx(vcpu);
2908 reset_rsvds_bits_mask(vcpu, context, PT64_ROOT_LEVEL);
2909 context->gva_to_gpa = paging64_gva_to_gpa;
2910 context->root_level = PT64_ROOT_LEVEL;
2911 } else if (is_pae(vcpu)) {
2912 context->nx = is_nx(vcpu);
2913 reset_rsvds_bits_mask(vcpu, context, PT32E_ROOT_LEVEL);
2914 context->gva_to_gpa = paging64_gva_to_gpa;
2915 context->root_level = PT32E_ROOT_LEVEL;
2917 context->nx = false;
2918 reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2919 context->gva_to_gpa = paging32_gva_to_gpa;
2920 context->root_level = PT32_ROOT_LEVEL;
2926 int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
2930 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2932 if (!is_paging(vcpu))
2933 r = nonpaging_init_context(vcpu, context);
2934 else if (is_long_mode(vcpu))
2935 r = paging64_init_context(vcpu, context);
2936 else if (is_pae(vcpu))
2937 r = paging32E_init_context(vcpu, context);
2939 r = paging32_init_context(vcpu, context);
2941 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2942 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2946 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
2948 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2950 int r = kvm_init_shadow_mmu(vcpu, vcpu->arch.walk_mmu);
2952 vcpu->arch.walk_mmu->set_cr3 = kvm_x86_ops->set_cr3;
2953 vcpu->arch.walk_mmu->get_cr3 = get_cr3;
2954 vcpu->arch.walk_mmu->inject_page_fault = kvm_inject_page_fault;
2959 static int init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
2961 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
2963 g_context->get_cr3 = get_cr3;
2964 g_context->inject_page_fault = kvm_inject_page_fault;
2967 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
2968 * translation of l2_gpa to l1_gpa addresses is done using the
2969 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
2970 * functions between mmu and nested_mmu are swapped.
2972 if (!is_paging(vcpu)) {
2973 g_context->nx = false;
2974 g_context->root_level = 0;
2975 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
2976 } else if (is_long_mode(vcpu)) {
2977 g_context->nx = is_nx(vcpu);
2978 reset_rsvds_bits_mask(vcpu, g_context, PT64_ROOT_LEVEL);
2979 g_context->root_level = PT64_ROOT_LEVEL;
2980 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
2981 } else if (is_pae(vcpu)) {
2982 g_context->nx = is_nx(vcpu);
2983 reset_rsvds_bits_mask(vcpu, g_context, PT32E_ROOT_LEVEL);
2984 g_context->root_level = PT32E_ROOT_LEVEL;
2985 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
2987 g_context->nx = false;
2988 reset_rsvds_bits_mask(vcpu, g_context, PT32_ROOT_LEVEL);
2989 g_context->root_level = PT32_ROOT_LEVEL;
2990 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
2996 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2998 vcpu->arch.update_pte.pfn = bad_pfn;
3000 if (mmu_is_nested(vcpu))
3001 return init_kvm_nested_mmu(vcpu);
3002 else if (tdp_enabled)
3003 return init_kvm_tdp_mmu(vcpu);
3005 return init_kvm_softmmu(vcpu);
3008 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
3011 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
3012 /* mmu.free() should set root_hpa = INVALID_PAGE */
3013 vcpu->arch.mmu.free(vcpu);
3016 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
3018 destroy_kvm_mmu(vcpu);
3019 return init_kvm_mmu(vcpu);
3021 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
3023 int kvm_mmu_load(struct kvm_vcpu *vcpu)
3027 r = mmu_topup_memory_caches(vcpu);
3030 r = mmu_alloc_roots(vcpu);
3031 spin_lock(&vcpu->kvm->mmu_lock);
3032 mmu_sync_roots(vcpu);
3033 spin_unlock(&vcpu->kvm->mmu_lock);
3036 /* set_cr3() should ensure TLB has been flushed */
3037 vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
3041 EXPORT_SYMBOL_GPL(kvm_mmu_load);
3043 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
3045 mmu_free_roots(vcpu);
3047 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
3049 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
3050 struct kvm_mmu_page *sp,
3054 struct kvm_mmu_page *child;
3057 if (is_shadow_present_pte(pte)) {
3058 if (is_last_spte(pte, sp->role.level))
3059 drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
3061 child = page_header(pte & PT64_BASE_ADDR_MASK);
3062 mmu_page_remove_parent_pte(child, spte);
3065 __set_spte(spte, shadow_trap_nonpresent_pte);
3066 if (is_large_pte(pte))
3067 --vcpu->kvm->stat.lpages;
3070 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
3071 struct kvm_mmu_page *sp,
3075 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
3076 ++vcpu->kvm->stat.mmu_pde_zapped;
3080 ++vcpu->kvm->stat.mmu_pte_updated;
3081 if (!sp->role.cr4_pae)
3082 paging32_update_pte(vcpu, sp, spte, new);
3084 paging64_update_pte(vcpu, sp, spte, new);
3087 static bool need_remote_flush(u64 old, u64 new)
3089 if (!is_shadow_present_pte(old))
3091 if (!is_shadow_present_pte(new))
3093 if ((old ^ new) & PT64_BASE_ADDR_MASK)
3095 old ^= PT64_NX_MASK;
3096 new ^= PT64_NX_MASK;
3097 return (old & ~new & PT64_PERM_MASK) != 0;
3100 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
3101 bool remote_flush, bool local_flush)
3107 kvm_flush_remote_tlbs(vcpu->kvm);
3108 else if (local_flush)
3109 kvm_mmu_flush_tlb(vcpu);
3112 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
3114 u64 *spte = vcpu->arch.last_pte_updated;
3116 return !!(spte && (*spte & shadow_accessed_mask));
3119 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3125 if (!is_present_gpte(gpte))
3127 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
3129 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
3131 pfn = gfn_to_pfn(vcpu->kvm, gfn);
3133 if (is_error_pfn(pfn)) {
3134 kvm_release_pfn_clean(pfn);
3137 vcpu->arch.update_pte.gfn = gfn;
3138 vcpu->arch.update_pte.pfn = pfn;
3141 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
3143 u64 *spte = vcpu->arch.last_pte_updated;
3146 && vcpu->arch.last_pte_gfn == gfn
3147 && shadow_accessed_mask
3148 && !(*spte & shadow_accessed_mask)
3149 && is_shadow_present_pte(*spte))
3150 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
3153 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3154 const u8 *new, int bytes,
3155 bool guest_initiated)
3157 gfn_t gfn = gpa >> PAGE_SHIFT;
3158 union kvm_mmu_page_role mask = { .word = 0 };
3159 struct kvm_mmu_page *sp;
3160 struct hlist_node *node;
3161 LIST_HEAD(invalid_list);
3164 unsigned offset = offset_in_page(gpa);
3166 unsigned page_offset;
3167 unsigned misaligned;
3174 bool remote_flush, local_flush, zap_page;
3176 zap_page = remote_flush = local_flush = false;
3178 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
3180 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
3183 * Assume that the pte write on a page table of the same type
3184 * as the current vcpu paging mode. This is nearly always true
3185 * (might be false while changing modes). Note it is verified later
3188 if ((is_pae(vcpu) && bytes == 4) || !new) {
3189 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3194 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
3197 new = (const u8 *)&gentry;
3202 gentry = *(const u32 *)new;
3205 gentry = *(const u64 *)new;
3212 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
3213 spin_lock(&vcpu->kvm->mmu_lock);
3214 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
3216 kvm_mmu_access_page(vcpu, gfn);
3217 kvm_mmu_free_some_pages(vcpu);
3218 ++vcpu->kvm->stat.mmu_pte_write;
3219 trace_kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
3220 if (guest_initiated) {
3221 if (gfn == vcpu->arch.last_pt_write_gfn
3222 && !last_updated_pte_accessed(vcpu)) {
3223 ++vcpu->arch.last_pt_write_count;
3224 if (vcpu->arch.last_pt_write_count >= 3)
3227 vcpu->arch.last_pt_write_gfn = gfn;
3228 vcpu->arch.last_pt_write_count = 1;
3229 vcpu->arch.last_pte_updated = NULL;
3233 mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
3234 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
3235 pte_size = sp->role.cr4_pae ? 8 : 4;
3236 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
3237 misaligned |= bytes < 4;
3238 if (misaligned || flooded) {
3240 * Misaligned accesses are too much trouble to fix
3241 * up; also, they usually indicate a page is not used
3244 * If we're seeing too many writes to a page,
3245 * it may no longer be a page table, or we may be
3246 * forking, in which case it is better to unmap the
3249 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3250 gpa, bytes, sp->role.word);
3251 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3253 ++vcpu->kvm->stat.mmu_flooded;
3256 page_offset = offset;
3257 level = sp->role.level;
3259 if (!sp->role.cr4_pae) {
3260 page_offset <<= 1; /* 32->64 */
3262 * A 32-bit pde maps 4MB while the shadow pdes map
3263 * only 2MB. So we need to double the offset again
3264 * and zap two pdes instead of one.
3266 if (level == PT32_ROOT_LEVEL) {
3267 page_offset &= ~7; /* kill rounding error */
3271 quadrant = page_offset >> PAGE_SHIFT;
3272 page_offset &= ~PAGE_MASK;
3273 if (quadrant != sp->role.quadrant)
3277 spte = &sp->spt[page_offset / sizeof(*spte)];
3280 mmu_pte_write_zap_pte(vcpu, sp, spte);
3282 !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
3284 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
3285 if (!remote_flush && need_remote_flush(entry, *spte))
3286 remote_flush = true;
3290 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
3291 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3292 trace_kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
3293 spin_unlock(&vcpu->kvm->mmu_lock);
3294 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
3295 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
3296 vcpu->arch.update_pte.pfn = bad_pfn;
3300 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
3305 if (vcpu->arch.mmu.direct_map)
3308 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
3310 spin_lock(&vcpu->kvm->mmu_lock);
3311 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3312 spin_unlock(&vcpu->kvm->mmu_lock);
3315 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
3317 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
3319 LIST_HEAD(invalid_list);
3321 while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES &&
3322 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
3323 struct kvm_mmu_page *sp;
3325 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
3326 struct kvm_mmu_page, link);
3327 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3328 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3329 ++vcpu->kvm->stat.mmu_recycled;
3333 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code,
3334 void *insn, int insn_len)
3337 enum emulation_result er;
3339 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code, false);
3348 r = mmu_topup_memory_caches(vcpu);
3352 er = x86_emulate_instruction(vcpu, cr2, 0, insn, insn_len);
3357 case EMULATE_DO_MMIO:
3358 ++vcpu->stat.mmio_exits;
3368 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
3370 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
3372 vcpu->arch.mmu.invlpg(vcpu, gva);
3373 kvm_mmu_flush_tlb(vcpu);
3374 ++vcpu->stat.invlpg;
3376 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3378 void kvm_enable_tdp(void)
3382 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3384 void kvm_disable_tdp(void)
3386 tdp_enabled = false;
3388 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3390 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3392 free_page((unsigned long)vcpu->arch.mmu.pae_root);
3393 if (vcpu->arch.mmu.lm_root != NULL)
3394 free_page((unsigned long)vcpu->arch.mmu.lm_root);
3397 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3405 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3406 * Therefore we need to allocate shadow page tables in the first
3407 * 4GB of memory, which happens to fit the DMA32 zone.
3409 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3413 vcpu->arch.mmu.pae_root = page_address(page);
3414 for (i = 0; i < 4; ++i)
3415 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3420 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3423 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3425 return alloc_mmu_pages(vcpu);
3428 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3431 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3433 return init_kvm_mmu(vcpu);
3436 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3438 struct kvm_mmu_page *sp;
3440 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3444 if (!test_bit(slot, sp->slot_bitmap))
3448 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3450 if (is_writable_pte(pt[i]))
3451 update_spte(&pt[i], pt[i] & ~PT_WRITABLE_MASK);
3453 kvm_flush_remote_tlbs(kvm);
3456 void kvm_mmu_zap_all(struct kvm *kvm)
3458 struct kvm_mmu_page *sp, *node;
3459 LIST_HEAD(invalid_list);
3461 spin_lock(&kvm->mmu_lock);
3463 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3464 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3467 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3468 spin_unlock(&kvm->mmu_lock);
3471 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3472 struct list_head *invalid_list)
3474 struct kvm_mmu_page *page;
3476 page = container_of(kvm->arch.active_mmu_pages.prev,
3477 struct kvm_mmu_page, link);
3478 return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3481 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3484 struct kvm *kvm_freed = NULL;
3486 if (nr_to_scan == 0)
3489 spin_lock(&kvm_lock);
3491 list_for_each_entry(kvm, &vm_list, vm_list) {
3492 int idx, freed_pages;
3493 LIST_HEAD(invalid_list);
3495 idx = srcu_read_lock(&kvm->srcu);
3496 spin_lock(&kvm->mmu_lock);
3497 if (!kvm_freed && nr_to_scan > 0 &&
3498 kvm->arch.n_used_mmu_pages > 0) {
3499 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3505 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3506 spin_unlock(&kvm->mmu_lock);
3507 srcu_read_unlock(&kvm->srcu, idx);
3510 list_move_tail(&kvm_freed->vm_list, &vm_list);
3512 spin_unlock(&kvm_lock);
3515 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
3518 static struct shrinker mmu_shrinker = {
3519 .shrink = mmu_shrink,
3520 .seeks = DEFAULT_SEEKS * 10,
3523 static void mmu_destroy_caches(void)
3525 if (pte_chain_cache)
3526 kmem_cache_destroy(pte_chain_cache);
3527 if (rmap_desc_cache)
3528 kmem_cache_destroy(rmap_desc_cache);
3529 if (mmu_page_header_cache)
3530 kmem_cache_destroy(mmu_page_header_cache);
3533 void kvm_mmu_module_exit(void)
3535 mmu_destroy_caches();
3536 percpu_counter_destroy(&kvm_total_used_mmu_pages);
3537 unregister_shrinker(&mmu_shrinker);
3540 int kvm_mmu_module_init(void)
3542 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3543 sizeof(struct kvm_pte_chain),
3545 if (!pte_chain_cache)
3547 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3548 sizeof(struct kvm_rmap_desc),
3550 if (!rmap_desc_cache)
3553 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3554 sizeof(struct kvm_mmu_page),
3556 if (!mmu_page_header_cache)
3559 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0))
3562 register_shrinker(&mmu_shrinker);
3567 mmu_destroy_caches();
3572 * Caculate mmu pages needed for kvm.
3574 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3577 unsigned int nr_mmu_pages;
3578 unsigned int nr_pages = 0;
3579 struct kvm_memslots *slots;
3581 slots = kvm_memslots(kvm);
3583 for (i = 0; i < slots->nmemslots; i++)
3584 nr_pages += slots->memslots[i].npages;
3586 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3587 nr_mmu_pages = max(nr_mmu_pages,
3588 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3590 return nr_mmu_pages;
3593 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3596 if (len > buffer->len)
3601 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3606 ret = pv_mmu_peek_buffer(buffer, len);
3611 buffer->processed += len;
3615 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3616 gpa_t addr, gpa_t value)
3621 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3624 r = mmu_topup_memory_caches(vcpu);
3628 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3634 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3636 (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3640 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3642 spin_lock(&vcpu->kvm->mmu_lock);
3643 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3644 spin_unlock(&vcpu->kvm->mmu_lock);
3648 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3649 struct kvm_pv_mmu_op_buffer *buffer)
3651 struct kvm_mmu_op_header *header;
3653 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3656 switch (header->op) {
3657 case KVM_MMU_OP_WRITE_PTE: {
3658 struct kvm_mmu_op_write_pte *wpte;
3660 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3663 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3666 case KVM_MMU_OP_FLUSH_TLB: {
3667 struct kvm_mmu_op_flush_tlb *ftlb;
3669 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3672 return kvm_pv_mmu_flush_tlb(vcpu);
3674 case KVM_MMU_OP_RELEASE_PT: {
3675 struct kvm_mmu_op_release_pt *rpt;
3677 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3680 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3686 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3687 gpa_t addr, unsigned long *ret)
3690 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3692 buffer->ptr = buffer->buf;
3693 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3694 buffer->processed = 0;
3696 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3700 while (buffer->len) {
3701 r = kvm_pv_mmu_op_one(vcpu, buffer);
3710 *ret = buffer->processed;
3714 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3716 struct kvm_shadow_walk_iterator iterator;
3719 spin_lock(&vcpu->kvm->mmu_lock);
3720 for_each_shadow_entry(vcpu, addr, iterator) {
3721 sptes[iterator.level-1] = *iterator.sptep;
3723 if (!is_shadow_present_pte(*iterator.sptep))
3726 spin_unlock(&vcpu->kvm->mmu_lock);
3730 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3732 #ifdef CONFIG_KVM_MMU_AUDIT
3733 #include "mmu_audit.c"
3735 static void mmu_audit_disable(void) { }
3738 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3742 destroy_kvm_mmu(vcpu);
3743 free_mmu_pages(vcpu);
3744 mmu_free_memory_caches(vcpu);
3745 mmu_audit_disable();