2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
18 * Provides an API for controlling the simulator at runtime.
22 * @addtogroup arch_sim
25 * An API for controlling the simulator at runtime.
27 * The simulator's behavior can be modified while it is running.
28 * For example, human-readable trace output can be enabled and disabled
29 * around code of interest.
31 * There are two ways to modify simulator behavior:
32 * programmatically, by calling various sim_* functions, and
33 * interactively, by entering commands like "sim set functional true"
34 * at the tile-monitor prompt. Typing "sim help" at that prompt provides
35 * a list of interactive commands.
37 * All interactive commands can also be executed programmatically by
38 * passing a string to the sim_command function.
41 #ifndef __ARCH_SIM_H__
42 #define __ARCH_SIM_H__
44 #include <arch/sim_def.h>
49 #include <arch/spr_def.h>
53 * Return true if the current program is running under a simulator,
54 * rather than on real hardware. If running on hardware, other "sim_xxx()"
55 * calls have no useful effect.
58 sim_is_simulator(void)
60 return __insn_mfspr(SPR_SIM_CONTROL) != 0;
65 * Checkpoint the simulator state to a checkpoint file.
67 * The checkpoint file name is either the default or the name specified
68 * on the command line with "--checkpoint-file".
73 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_CHECKPOINT);
78 * Report whether or not various kinds of simulator tracing are enabled.
80 * @return The bitwise OR of these values:
82 * SIM_TRACE_CYCLES (--trace-cycles),
83 * SIM_TRACE_ROUTER (--trace-router),
84 * SIM_TRACE_REGISTER_WRITES (--trace-register-writes),
85 * SIM_TRACE_DISASM (--trace-disasm),
86 * SIM_TRACE_STALL_INFO (--trace-stall-info)
87 * SIM_TRACE_MEMORY_CONTROLLER (--trace-memory-controller)
88 * SIM_TRACE_L2_CACHE (--trace-l2)
89 * SIM_TRACE_LINES (--trace-lines)
91 static __inline unsigned int
94 return __insn_mfspr(SPR_SIM_CONTROL) & SIM_TRACE_FLAG_MASK;
99 * Turn on or off different kinds of simulator tracing.
101 * @param mask Either one of these special values:
103 * SIM_TRACE_NONE (turns off tracing),
104 * SIM_TRACE_ALL (turns on all possible tracing).
106 * or the bitwise OR of these values:
108 * SIM_TRACE_CYCLES (--trace-cycles),
109 * SIM_TRACE_ROUTER (--trace-router),
110 * SIM_TRACE_REGISTER_WRITES (--trace-register-writes),
111 * SIM_TRACE_DISASM (--trace-disasm),
112 * SIM_TRACE_STALL_INFO (--trace-stall-info)
113 * SIM_TRACE_MEMORY_CONTROLLER (--trace-memory-controller)
114 * SIM_TRACE_L2_CACHE (--trace-l2)
115 * SIM_TRACE_LINES (--trace-lines)
118 sim_set_tracing(unsigned int mask)
120 __insn_mtspr(SPR_SIM_CONTROL, SIM_TRACE_SPR_ARG(mask));
125 * Request dumping of different kinds of simulator state.
127 * @param mask Either this special value:
129 * SIM_DUMP_ALL (dump all known state)
131 * or the bitwise OR of these values:
133 * SIM_DUMP_REGS (the register file),
134 * SIM_DUMP_SPRS (the SPRs),
135 * SIM_DUMP_ITLB (the iTLB),
136 * SIM_DUMP_DTLB (the dTLB),
137 * SIM_DUMP_L1I (the L1 I-cache),
138 * SIM_DUMP_L1D (the L1 D-cache),
139 * SIM_DUMP_L2 (the L2 cache),
140 * SIM_DUMP_SNREGS (the switch register file),
141 * SIM_DUMP_SNITLB (the switch iTLB),
142 * SIM_DUMP_SNL1I (the switch L1 I-cache),
143 * SIM_DUMP_BACKTRACE (the current backtrace)
146 sim_dump(unsigned int mask)
148 __insn_mtspr(SPR_SIM_CONTROL, SIM_DUMP_SPR_ARG(mask));
153 * Print a string to the simulator stdout.
155 * @param str The string to be written.
158 sim_print(const char* str)
160 for ( ; *str != '\0'; str++)
162 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PUTC |
163 (*str << _SIM_CONTROL_OPERATOR_BITS));
165 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PUTC |
166 (SIM_PUTC_FLUSH_BINARY << _SIM_CONTROL_OPERATOR_BITS));
171 * Print a string to the simulator stdout.
173 * @param str The string to be written (a newline is automatically added).
176 sim_print_string(const char* str)
178 for ( ; *str != '\0'; str++)
180 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PUTC |
181 (*str << _SIM_CONTROL_OPERATOR_BITS));
183 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PUTC |
184 (SIM_PUTC_FLUSH_STRING << _SIM_CONTROL_OPERATOR_BITS));
189 * Execute a simulator command string.
191 * Type 'sim help' at the tile-monitor prompt to learn what commands
192 * are available. Note the use of the tile-monitor "sim" command to
193 * pass commands to the simulator.
195 * The argument to sim_command() does not include the leading "sim"
196 * prefix used at the tile-monitor prompt; for example, you might call
197 * sim_command("trace disasm").
200 sim_command(const char* str)
206 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_COMMAND |
207 (c << _SIM_CONTROL_OPERATOR_BITS));
217 * The underlying implementation of "_sim_syscall()".
219 * We use extra "and" instructions to ensure that all the values
220 * we are passing to the simulator are actually valid in the registers
221 * (i.e. returned from memory) prior to the SIM_CONTROL spr.
223 static __inline long _sim_syscall0(int val)
226 __asm__ __volatile__ ("mtspr SIM_CONTROL, r0"
227 : "=R00" (result) : "R00" (val));
231 static __inline long _sim_syscall1(int val, long arg1)
234 __asm__ __volatile__ ("{ and zero, r1, r1; mtspr SIM_CONTROL, r0 }"
235 : "=R00" (result) : "R00" (val), "R01" (arg1));
239 static __inline long _sim_syscall2(int val, long arg1, long arg2)
242 __asm__ __volatile__ ("{ and zero, r1, r2; mtspr SIM_CONTROL, r0 }"
244 : "R00" (val), "R01" (arg1), "R02" (arg2));
248 /* Note that _sim_syscall3() and higher are technically at risk of
249 receiving an interrupt right before the mtspr bundle, in which case
250 the register values for arguments 3 and up may still be in flight
251 to the core from a stack frame reload. */
253 static __inline long _sim_syscall3(int val, long arg1, long arg2, long arg3)
256 __asm__ __volatile__ ("{ and zero, r3, r3 };"
257 "{ and zero, r1, r2; mtspr SIM_CONTROL, r0 }"
259 : "R00" (val), "R01" (arg1), "R02" (arg2),
264 static __inline long _sim_syscall4(int val, long arg1, long arg2, long arg3,
268 __asm__ __volatile__ ("{ and zero, r3, r4 };"
269 "{ and zero, r1, r2; mtspr SIM_CONTROL, r0 }"
271 : "R00" (val), "R01" (arg1), "R02" (arg2),
272 "R03" (arg3), "R04" (arg4));
276 static __inline long _sim_syscall5(int val, long arg1, long arg2, long arg3,
277 long arg4, long arg5)
280 __asm__ __volatile__ ("{ and zero, r3, r4; and zero, r5, r5 };"
281 "{ and zero, r1, r2; mtspr SIM_CONTROL, r0 }"
283 : "R00" (val), "R01" (arg1), "R02" (arg2),
284 "R03" (arg3), "R04" (arg4), "R05" (arg5));
289 * Make a special syscall to the simulator itself, if running under
290 * simulation. This is used as the implementation of other functions
291 * and should not be used outside this file.
293 * @param syscall_num The simulator syscall number.
294 * @param nr The number of additional arguments provided.
296 * @return Varies by syscall.
298 #define _sim_syscall(syscall_num, nr, args...) \
300 ((syscall_num) << _SIM_CONTROL_OPERATOR_BITS) | SIM_CONTROL_SYSCALL, \
304 /* Values for the "access_mask" parameters below. */
305 #define SIM_WATCHPOINT_READ 1
306 #define SIM_WATCHPOINT_WRITE 2
307 #define SIM_WATCHPOINT_EXECUTE 4
311 sim_add_watchpoint(unsigned int process_id,
312 unsigned long address,
314 unsigned int access_mask,
315 unsigned long user_data)
317 return _sim_syscall(SIM_SYSCALL_ADD_WATCHPOINT, 5, process_id,
318 address, size, access_mask, user_data);
323 sim_remove_watchpoint(unsigned int process_id,
324 unsigned long address,
326 unsigned int access_mask,
327 unsigned long user_data)
329 return _sim_syscall(SIM_SYSCALL_REMOVE_WATCHPOINT, 5, process_id,
330 address, size, access_mask, user_data);
335 * Return value from sim_query_watchpoint.
337 struct SimQueryWatchpointStatus
340 * 0 if a watchpoint fired, 1 if no watchpoint fired, or -1 for
341 * error (meaning a bad process_id).
346 * The address of the watchpoint that fired (this is the address
347 * passed to sim_add_watchpoint, not an address within that range
348 * that actually triggered the watchpoint).
350 unsigned long address;
352 /** The arbitrary user_data installed by sim_add_watchpoint. */
353 unsigned long user_data;
357 static __inline struct SimQueryWatchpointStatus
358 sim_query_watchpoint(unsigned int process_id)
360 struct SimQueryWatchpointStatus status;
361 long val = SIM_CONTROL_SYSCALL |
362 (SIM_SYSCALL_QUERY_WATCHPOINT << _SIM_CONTROL_OPERATOR_BITS);
363 __asm__ __volatile__ ("{ and zero, r1, r1; mtspr SIM_CONTROL, r0 }"
364 : "=R00" (status.syscall_status),
365 "=R01" (status.address),
366 "=R02" (status.user_data)
367 : "R00" (val), "R01" (process_id));
372 /* On the simulator, confirm lines have been evicted everywhere. */
374 sim_validate_lines_evicted(unsigned long long pa, unsigned long length)
377 _sim_syscall(SIM_SYSCALL_VALIDATE_LINES_EVICTED, 2, pa, length);
379 _sim_syscall(SIM_SYSCALL_VALIDATE_LINES_EVICTED, 4,
380 0 /* dummy */, (long)(pa), (long)(pa >> 32), length);
385 /* Return the current CPU speed in cycles per second. */
387 sim_query_cpu_speed(void)
389 return _sim_syscall(SIM_SYSCALL_QUERY_CPU_SPEED, 0);
392 #endif /* !__DOXYGEN__ */
398 * Modify the shaping parameters of a shim.
400 * @param shim The shim to modify. One of:
401 * SIM_CONTROL_SHAPING_GBE_0
402 * SIM_CONTROL_SHAPING_GBE_1
403 * SIM_CONTROL_SHAPING_GBE_2
404 * SIM_CONTROL_SHAPING_GBE_3
405 * SIM_CONTROL_SHAPING_XGBE_0
406 * SIM_CONTROL_SHAPING_XGBE_1
408 * @param type The type of shaping. This should be the same type of
409 * shaping that is already in place on the shim. One of:
410 * SIM_CONTROL_SHAPING_MULTIPLIER
411 * SIM_CONTROL_SHAPING_PPS
412 * SIM_CONTROL_SHAPING_BPS
414 * @param units The magnitude of the rate. One of:
415 * SIM_CONTROL_SHAPING_UNITS_SINGLE
416 * SIM_CONTROL_SHAPING_UNITS_KILO
417 * SIM_CONTROL_SHAPING_UNITS_MEGA
418 * SIM_CONTROL_SHAPING_UNITS_GIGA
420 * @param rate The rate to which to change it. This must fit in
421 * SIM_CONTROL_SHAPING_RATE_BITS bits or a warning is issued and
422 * the shaping is not changed.
424 * @return 0 if no problems were detected in the arguments to sim_set_shaping
425 * or 1 if problems were detected (for example, rate does not fit in 17 bits).
428 sim_set_shaping(unsigned shim,
433 if ((rate & ~((1 << SIM_CONTROL_SHAPING_RATE_BITS) - 1)) != 0)
436 __insn_mtspr(SPR_SIM_CONTROL, SIM_SHAPING_SPR_ARG(shim, type, units, rate));
442 /** Enable a set of mPIPE links. Pass a -1 link_mask to enable all links. */
444 sim_enable_mpipe_links(unsigned mpipe, unsigned long link_mask)
446 __insn_mtspr(SPR_SIM_CONTROL,
447 (SIM_CONTROL_ENABLE_MPIPE_LINK_MAGIC_BYTE |
448 (mpipe << 8) | (1 << 16) | ((uint_reg_t)link_mask << 32)));
451 /** Disable a set of mPIPE links. Pass a -1 link_mask to disable all links. */
453 sim_disable_mpipe_links(unsigned mpipe, unsigned long link_mask)
455 __insn_mtspr(SPR_SIM_CONTROL,
456 (SIM_CONTROL_ENABLE_MPIPE_LINK_MAGIC_BYTE |
457 (mpipe << 8) | (0 << 16) | ((uint_reg_t)link_mask << 32)));
460 #endif /* __tilegx__ */
464 * An API for changing "functional" mode.
469 #define sim_enable_functional() \
470 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_ENABLE_FUNCTIONAL)
472 #define sim_disable_functional() \
473 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_DISABLE_FUNCTIONAL)
475 #endif /* __DOXYGEN__ */
483 * Turn profiling on for the current task.
485 * Note that this has no effect if run in an environment without
486 * profiling support (thus, the proper flags to the simulator must
490 sim_profiler_enable(void)
492 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PROFILER_ENABLE);
496 /** Turn profiling off for the current task. */
498 sim_profiler_disable(void)
500 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PROFILER_DISABLE);
505 * Turn profiling on or off for the current task.
507 * @param enabled If true, turns on profiling. If false, turns it off.
509 * Note that this has no effect if run in an environment without
510 * profiling support (thus, the proper flags to the simulator must
514 sim_profiler_set_enabled(int enabled)
517 enabled ? SIM_CONTROL_PROFILER_ENABLE : SIM_CONTROL_PROFILER_DISABLE;
518 __insn_mtspr(SPR_SIM_CONTROL, val);
523 * Return true if and only if profiling is currently enabled
524 * for the current task.
526 * This returns false even if sim_profiler_enable() was called
527 * if the current execution environment does not support profiling.
530 sim_profiler_is_enabled(void)
532 return ((__insn_mfspr(SPR_SIM_CONTROL) & SIM_PROFILER_ENABLED_MASK) != 0);
537 * Reset profiling counters to zero for the current task.
539 * Resetting can be done while profiling is enabled. It does not affect
540 * the chip-wide profiling counters.
543 sim_profiler_clear(void)
545 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PROFILER_CLEAR);
550 * Enable specified chip-level profiling counters.
552 * Does not affect the per-task profiling counters.
554 * @param mask Either this special value:
556 * SIM_CHIP_ALL (enables all chip-level components).
558 * or the bitwise OR of these values:
560 * SIM_CHIP_MEMCTL (enable all memory controllers)
561 * SIM_CHIP_XAUI (enable all XAUI controllers)
562 * SIM_CHIP_MPIPE (enable all MPIPE controllers)
565 sim_profiler_chip_enable(unsigned int mask)
567 __insn_mtspr(SPR_SIM_CONTROL, SIM_PROFILER_CHIP_ENABLE_SPR_ARG(mask));
572 * Disable specified chip-level profiling counters.
574 * Does not affect the per-task profiling counters.
576 * @param mask Either this special value:
578 * SIM_CHIP_ALL (disables all chip-level components).
580 * or the bitwise OR of these values:
582 * SIM_CHIP_MEMCTL (disable all memory controllers)
583 * SIM_CHIP_XAUI (disable all XAUI controllers)
584 * SIM_CHIP_MPIPE (disable all MPIPE controllers)
587 sim_profiler_chip_disable(unsigned int mask)
589 __insn_mtspr(SPR_SIM_CONTROL, SIM_PROFILER_CHIP_DISABLE_SPR_ARG(mask));
594 * Reset specified chip-level profiling counters to zero.
596 * Does not affect the per-task profiling counters.
598 * @param mask Either this special value:
600 * SIM_CHIP_ALL (clears all chip-level components).
602 * or the bitwise OR of these values:
604 * SIM_CHIP_MEMCTL (clear all memory controllers)
605 * SIM_CHIP_XAUI (clear all XAUI controllers)
606 * SIM_CHIP_MPIPE (clear all MPIPE controllers)
609 sim_profiler_chip_clear(unsigned int mask)
611 __insn_mtspr(SPR_SIM_CONTROL, SIM_PROFILER_CHIP_CLEAR_SPR_ARG(mask));
622 sim_event_begin(unsigned int x)
624 #if defined(__tile__) && !defined(__NO_EVENT_SPR__)
625 __insn_mtspr(SPR_EVENT_BEGIN, x);
630 sim_event_end(unsigned int x)
632 #if defined(__tile__) && !defined(__NO_EVENT_SPR__)
633 __insn_mtspr(SPR_EVENT_END, x);
637 #endif /* !__DOXYGEN__ */
639 #endif /* !__ASSEMBLER__ */
641 #endif /* !__ARCH_SIM_H__ */