2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/errno.h>
17 #include <asm/ptrace.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/unistd.h>
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
27 SP_PTREGS = STACK_FRAME_OVERHEAD
28 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
29 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
30 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
31 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
32 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
34 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
36 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
37 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
38 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
39 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
40 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
41 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
42 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
43 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
44 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
45 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
46 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
48 SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
49 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
51 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
52 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
53 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
55 _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
56 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
58 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
59 STACK_SIZE = 1 << STACK_SHIFT
61 #define BASED(name) name-system_call(%r13)
63 #ifdef CONFIG_TRACE_IRQFLAGS
66 l %r1,BASED(.Ltrace_irq_on_caller)
72 l %r1,BASED(.Ltrace_irq_off_caller)
76 .macro TRACE_IRQS_CHECK_ON
77 tm SP_PSW(%r15),0x03 # irqs enabled?
83 .macro TRACE_IRQS_CHECK_OFF
84 tm SP_PSW(%r15),0x03 # irqs enabled?
91 #define TRACE_IRQS_OFF
92 #define TRACE_IRQS_CHECK_ON
93 #define TRACE_IRQS_CHECK_OFF
97 .macro LOCKDEP_SYS_EXIT
98 tm SP_PSW+1(%r15),0x01 # returning to user ?
100 l %r1,BASED(.Llockdep_sys_exit)
105 #define LOCKDEP_SYS_EXIT
109 * Register usage in interrupt handlers:
110 * R9 - pointer to current task structure
111 * R13 - pointer to literal pool
112 * R14 - return register for function calls
113 * R15 - kernel stack pointer
116 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
117 lm %r10,%r11,\lc_from
126 1: stm %r10,%r11,\lc_sum
129 .macro SAVE_ALL_BASE savearea
130 stm %r12,%r15,\savearea
131 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
134 .macro SAVE_ALL_SVC psworg,savearea
136 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
139 .macro SAVE_ALL_SYNC psworg,savearea
141 tm \psworg+1,0x01 # test problem state bit
142 bz BASED(2f) # skip stack setup save
143 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
144 #ifdef CONFIG_CHECK_STACK
146 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
147 bz BASED(stack_overflow)
153 .macro SAVE_ALL_ASYNC psworg,savearea
155 tm \psworg+1,0x01 # test problem state bit
156 bnz BASED(1f) # from user -> load async stack
157 clc \psworg+4(4),BASED(.Lcritical_end)
159 clc \psworg+4(4),BASED(.Lcritical_start)
161 l %r14,BASED(.Lcleanup_critical)
163 tm 1(%r12),0x01 # retest problem state after cleanup
165 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
169 1: l %r15,__LC_ASYNC_STACK
170 #ifdef CONFIG_CHECK_STACK
172 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
173 bz BASED(stack_overflow)
179 .macro CREATE_STACK_FRAME psworg,savearea
180 s %r15,BASED(.Lc_spsize) # make room for registers & psw
181 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
182 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
183 icm %r12,12,__LC_SVC_ILC
184 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
186 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
188 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
191 .macro RESTORE_ALL psworg,sync
192 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
194 ni \psworg+1,0xfd # clear wait state bit
196 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
198 lpsw \psworg # back to caller
202 * Scheduler resume function, called by switch_to
203 * gpr2 = (task_struct *) prev
204 * gpr3 = (task_struct *) next
212 tm __THREAD_per(%r3),0xe8 # new process is using per ?
213 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
214 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
215 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
216 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
217 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
219 l %r4,__THREAD_info(%r2) # get thread_info of prev
220 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
221 bz __switch_to_no_mcck-__switch_to_base(%r1)
222 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
223 l %r4,__THREAD_info(%r3) # get thread_info of next
224 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
226 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
227 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
228 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
229 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
230 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
231 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
232 l %r3,__THREAD_info(%r3) # load thread_info from task struct
233 st %r3,__LC_THREAD_INFO
235 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
240 * SVC interrupt handler routine. System calls are synchronous events and
241 * are executed with interrupts enabled.
246 stpt __LC_SYNC_ENTER_TIMER
248 SAVE_ALL_BASE __LC_SAVE_AREA
249 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
250 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
251 lh %r7,0x8a # get svc number from lowcore
253 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
255 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
257 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
259 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
260 ltr %r7,%r7 # test for svc 0
261 bnz BASED(sysc_nr_ok) # svc number > 0
262 # svc 0: system call number in %r1
263 cl %r1,BASED(.Lnr_syscalls)
264 bnl BASED(sysc_nr_ok)
265 lr %r7,%r1 # copy svc number to %r7
267 mvc SP_ARGS(4,%r15),SP_R7(%r15)
269 sth %r7,SP_SVCNR(%r15)
270 sll %r7,2 # svc number *4
271 l %r8,BASED(.Lsysc_table)
272 tm __TI_flags+2(%r9),_TIF_SYSCALL
273 l %r8,0(%r7,%r8) # get system call addr.
274 bnz BASED(sysc_tracesys)
275 basr %r14,%r8 # call sys_xxxx
276 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
281 tm __TI_flags+3(%r9),_TIF_WORK_SVC
282 bnz BASED(sysc_work) # there is work to do (signals etc.)
284 RESTORE_ALL __LC_RETURN_PSW,1
288 # There is work to do, but first we need to check if we return to userspace.
291 tm SP_PSW+1(%r15),0x01 # returning to user ?
292 bno BASED(sysc_restore)
295 # One of the work bits is on. Find out which one.
298 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
299 bo BASED(sysc_mcck_pending)
300 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
301 bo BASED(sysc_reschedule)
302 tm __TI_flags+3(%r9),_TIF_SIGPENDING
303 bo BASED(sysc_sigpending)
304 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
305 bo BASED(sysc_notify_resume)
306 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
307 bo BASED(sysc_restart)
308 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
309 bo BASED(sysc_singlestep)
310 b BASED(sysc_return) # beware of critical section cleanup
313 # _TIF_NEED_RESCHED is set, call schedule
316 l %r1,BASED(.Lschedule)
317 la %r14,BASED(sysc_return)
318 br %r1 # call scheduler
321 # _TIF_MCCK_PENDING is set, call handler
324 l %r1,BASED(.Ls390_handle_mcck)
325 la %r14,BASED(sysc_return)
326 br %r1 # TIF bit will be cleared by handler
329 # _TIF_SIGPENDING is set, call do_signal
332 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
333 la %r2,SP_PTREGS(%r15) # load pt_regs
334 l %r1,BASED(.Ldo_signal)
335 basr %r14,%r1 # call do_signal
336 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
337 bo BASED(sysc_restart)
338 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
339 bo BASED(sysc_singlestep)
343 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
346 la %r2,SP_PTREGS(%r15) # load pt_regs
347 l %r1,BASED(.Ldo_notify_resume)
348 la %r14,BASED(sysc_return)
349 br %r1 # call do_notify_resume
353 # _TIF_RESTART_SVC is set, set up registers and restart svc
356 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
357 l %r7,SP_R2(%r15) # load new svc number
358 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
359 lm %r2,%r6,SP_R2(%r15) # load svc arguments
360 b BASED(sysc_do_restart) # restart svc
363 # _TIF_SINGLE_STEP is set, call do_single_step
366 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
367 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
368 mvi SP_SVCNR+1(%r15),0xff
369 la %r2,SP_PTREGS(%r15) # address of register-save area
370 l %r1,BASED(.Lhandle_per) # load adr. of per handler
371 la %r14,BASED(sysc_return) # load adr. of system return
372 br %r1 # branch to do_single_step
375 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
376 # and after the system call
379 l %r1,BASED(.Ltrace_entry)
380 la %r2,SP_PTREGS(%r15) # load pt_regs
385 cl %r2,BASED(.Lnr_syscalls)
386 bnl BASED(sysc_tracenogo)
387 l %r8,BASED(.Lsysc_table)
389 sll %r7,2 # svc number *4
392 lm %r3,%r6,SP_R3(%r15)
393 l %r2,SP_ORIG_R2(%r15)
394 basr %r14,%r8 # call sys_xxx
395 st %r2,SP_R2(%r15) # store return value
397 tm __TI_flags+2(%r9),_TIF_SYSCALL
398 bz BASED(sysc_return)
399 l %r1,BASED(.Ltrace_exit)
400 la %r2,SP_PTREGS(%r15) # load pt_regs
401 la %r14,BASED(sysc_return)
405 # a new process exits the kernel with ret_from_fork
409 l %r13,__LC_SVC_NEW_PSW+4
410 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
411 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
413 st %r15,SP_R15(%r15) # store stack pointer for new kthread
414 0: l %r1,BASED(.Lschedtail)
417 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
418 b BASED(sysc_tracenogo)
421 # kernel_execve function needs to deal with pt_regs that is not
426 stm %r12,%r15,48(%r15)
428 l %r13,__LC_SVC_NEW_PSW+4
429 s %r15,BASED(.Lc_spsize)
430 st %r14,__SF_BACKCHAIN(%r15)
431 la %r12,SP_PTREGS(%r15)
432 xc 0(__PT_SIZE,%r12),0(%r12)
433 l %r1,BASED(.Ldo_execve)
438 a %r15,BASED(.Lc_spsize)
439 lm %r12,%r15,48(%r15)
442 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
444 l %r15,__LC_KERNEL_STACK # load ksp
445 s %r15,BASED(.Lc_spsize) # make room for registers & psw
446 l %r9,__LC_THREAD_INFO
447 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
448 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
450 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
451 l %r1,BASED(.Lexecve_tail)
456 * Program check handler routine
459 .globl pgm_check_handler
462 * First we need to check for a special case:
463 * Single stepping an instruction that disables the PER event mask will
464 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
465 * For a single stepped SVC the program check handler gets control after
466 * the SVC new PSW has been loaded. But we want to execute the SVC first and
467 * then handle the PER event. Therefore we update the SVC old PSW to point
468 * to the pgm_check_handler and branch to the SVC handler after we checked
469 * if we have to load the kernel stack register.
470 * For every other possible cause for PER event without the PER mask set
471 * we just ignore the PER event (FIXME: is there anything we have to do
474 stpt __LC_SYNC_ENTER_TIMER
475 SAVE_ALL_BASE __LC_SAVE_AREA
476 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
477 bnz BASED(pgm_per) # got per exception -> special case
478 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
479 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
480 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
481 bz BASED(pgm_no_vtime)
482 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
483 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
484 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
487 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
488 l %r3,__LC_PGM_ILC # load program interruption code
492 l %r7,BASED(.Ljump_table)
494 l %r7,0(%r8,%r7) # load address of handler routine
495 la %r2,SP_PTREGS(%r15) # address of register-save area
496 basr %r14,%r7 # branch to interrupt-handler
502 # handle per exception
505 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
506 bnz BASED(pgm_per_std) # ok, normal per event from user space
507 # ok its one of the special cases, now we need to find out which one
508 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
510 # no interesting special case, ignore PER event
511 lm %r12,%r15,__LC_SAVE_AREA
515 # Normal per exception
518 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
519 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
520 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
521 bz BASED(pgm_no_vtime2)
522 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
523 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
524 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
527 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
529 tm SP_PSW+1(%r15),0x01 # kernel per event ?
531 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
532 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
533 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
534 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
535 l %r3,__LC_PGM_ILC # load program interruption code
537 nr %r8,%r3 # clear per-event-bit and ilc
538 be BASED(pgm_exit) # only per or per+check ?
542 # it was a single stepped SVC that is causing all the trouble
545 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
546 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
547 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
548 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
549 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
550 lh %r7,0x8a # get svc number from lowcore
551 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
554 mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
555 mvc __THREAD_per+__PER_address(4,%r8),__LC_PER_ADDRESS
556 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
557 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
559 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
560 lm %r2,%r6,SP_R2(%r15) # load svc arguments
564 # per was called from kernel, must be kprobes
567 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
568 mvi SP_SVCNR+1(%r15),0xff
569 la %r2,SP_PTREGS(%r15) # address of register-save area
570 l %r1,BASED(.Lhandle_per) # load adr. of per handler
571 basr %r14,%r1 # branch to do_single_step
575 * IO interrupt handler routine
578 .globl io_int_handler
581 stpt __LC_ASYNC_ENTER_TIMER
582 SAVE_ALL_BASE __LC_SAVE_AREA+16
583 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
584 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
585 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
586 bz BASED(io_no_vtime)
587 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
588 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
589 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
592 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
593 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
594 la %r2,SP_PTREGS(%r15) # address of register-save area
595 basr %r14,%r1 # branch to standard irq handler
600 tm __TI_flags+3(%r9),_TIF_WORK_INT
601 bnz BASED(io_work) # there is work to do (signals etc.)
603 RESTORE_ALL __LC_RETURN_PSW,0
607 # There is work todo, find out in which context we have been interrupted:
608 # 1) if we return to user space we can do all _TIF_WORK_INT work
609 # 2) if we return to kernel code and preemptive scheduling is enabled check
610 # the preemption counter and if it is zero call preempt_schedule_irq
611 # Before any work can be done, a switch to the kernel stack is required.
614 tm SP_PSW+1(%r15),0x01 # returning to user ?
615 bo BASED(io_work_user) # yes -> do resched & signal
616 #ifdef CONFIG_PREEMPT
617 # check for preemptive scheduling
618 icm %r0,15,__TI_precount(%r9)
619 bnz BASED(io_restore) # preemption disabled
620 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
621 bno BASED(io_restore)
622 # switch to kernel stack
624 s %r1,BASED(.Lc_spsize)
625 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
626 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
628 # TRACE_IRQS_ON already done at io_return, call
629 # TRACE_IRQS_OFF to keep things symmetrical
631 l %r1,BASED(.Lpreempt_schedule_irq)
632 basr %r14,%r1 # call preempt_schedule_irq
639 # Need to do work before returning to userspace, switch to kernel stack
642 l %r1,__LC_KERNEL_STACK
643 s %r1,BASED(.Lc_spsize)
644 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
645 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
649 # One of the work bits is on. Find out which one.
650 # Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
651 # and _TIF_MCCK_PENDING
654 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
655 bo BASED(io_mcck_pending)
656 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
657 bo BASED(io_reschedule)
658 tm __TI_flags+3(%r9),_TIF_SIGPENDING
659 bo BASED(io_sigpending)
660 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
661 bo BASED(io_notify_resume)
662 b BASED(io_return) # beware of critical section cleanup
665 # _TIF_MCCK_PENDING is set, call handler
668 # TRACE_IRQS_ON already done at io_return
669 l %r1,BASED(.Ls390_handle_mcck)
670 basr %r14,%r1 # TIF bit will be cleared by handler
675 # _TIF_NEED_RESCHED is set, call schedule
678 # TRACE_IRQS_ON already done at io_return
679 l %r1,BASED(.Lschedule)
680 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
681 basr %r14,%r1 # call scheduler
682 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
687 # _TIF_SIGPENDING is set, call do_signal
690 # TRACE_IRQS_ON already done at io_return
691 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
692 la %r2,SP_PTREGS(%r15) # load pt_regs
693 l %r1,BASED(.Ldo_signal)
694 basr %r14,%r1 # call do_signal
695 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
700 # _TIF_SIGPENDING is set, call do_signal
703 # TRACE_IRQS_ON already done at io_return
704 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
705 la %r2,SP_PTREGS(%r15) # load pt_regs
706 l %r1,BASED(.Ldo_notify_resume)
707 basr %r14,%r1 # call do_signal
708 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
713 * External interrupt handler routine
716 .globl ext_int_handler
719 stpt __LC_ASYNC_ENTER_TIMER
720 SAVE_ALL_BASE __LC_SAVE_AREA+16
721 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
722 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
723 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
724 bz BASED(ext_no_vtime)
725 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
726 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
727 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
729 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
731 la %r2,SP_PTREGS(%r15) # address of register-save area
732 lh %r3,__LC_EXT_INT_CODE # get interruption code
733 l %r1,BASED(.Ldo_extint)
740 * Machine check handler routines
743 .globl mcck_int_handler
746 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
747 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
748 SAVE_ALL_BASE __LC_SAVE_AREA+32
749 la %r12,__LC_MCK_OLD_PSW
750 tm __LC_MCCK_CODE,0x80 # system damage?
751 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
752 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
753 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
755 la %r14,__LC_SYNC_ENTER_TIMER
756 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
758 la %r14,__LC_ASYNC_ENTER_TIMER
759 0: clc 0(8,%r14),__LC_EXIT_TIMER
761 la %r14,__LC_EXIT_TIMER
762 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
764 la %r14,__LC_LAST_UPDATE_TIMER
766 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
767 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
768 bno BASED(mcck_int_main) # no -> skip cleanup critical
769 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
770 bnz BASED(mcck_int_main) # from user -> load async stack
771 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
772 bhe BASED(mcck_int_main)
773 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
774 bl BASED(mcck_int_main)
775 l %r14,BASED(.Lcleanup_critical)
778 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
782 l %r15,__LC_PANIC_STACK # load panic stack
783 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
784 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
785 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
786 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
787 bz BASED(mcck_no_vtime)
788 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
789 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
790 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
792 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
793 la %r2,SP_PTREGS(%r15) # load pt_regs
794 l %r1,BASED(.Ls390_mcck)
795 basr %r14,%r1 # call machine check handler
796 tm SP_PSW+1(%r15),0x01 # returning to user ?
797 bno BASED(mcck_return)
798 l %r1,__LC_KERNEL_STACK # switch to kernel stack
799 s %r1,BASED(.Lc_spsize)
800 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
801 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
803 stosm __SF_EMPTY(%r15),0x04 # turn dat on
804 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
805 bno BASED(mcck_return)
807 l %r1,BASED(.Ls390_handle_mcck)
808 basr %r14,%r1 # call machine check handler
811 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
812 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
813 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
815 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
817 lpsw __LC_RETURN_MCCK_PSW # back to caller
818 0: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
819 lpsw __LC_RETURN_MCCK_PSW # back to caller
821 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
824 * Restart interruption handler, kick starter for additional CPUs
828 .globl restart_int_handler
832 spt restart_vtime-restart_base(%r1)
833 stck __LC_LAST_UPDATE_CLOCK
834 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
835 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
836 l %r15,__LC_SAVE_AREA+60 # load ksp
837 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
838 lam %a0,%a15,__LC_AREGS_SAVE_AREA
839 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
840 l %r1,__LC_THREAD_INFO
841 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
842 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
843 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
844 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
846 l %r14,restart_addr-.(%r14)
847 br %r14 # branch to start_secondary
849 .long start_secondary
852 .long 0x7fffffff,0xffffffff
856 * If we do not run with SMP enabled, let the new CPU crash ...
858 .globl restart_int_handler
862 lpsw restart_crash-restart_base(%r1)
865 .long 0x000a0000,0x00000000
869 #ifdef CONFIG_CHECK_STACK
871 * The synchronous or the asynchronous stack overflowed. We are dead.
872 * No need to properly save the registers, we are going to panic anyway.
873 * Setup a pt_regs so that show_trace can provide a good call trace.
876 l %r15,__LC_PANIC_STACK # change to panic stack
877 sl %r15,BASED(.Lc_spsize)
878 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
879 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
880 la %r1,__LC_SAVE_AREA
881 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
883 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
885 la %r1,__LC_SAVE_AREA+16
886 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
887 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
888 l %r1,BASED(1f) # branch to kernel_stack_overflow
889 la %r2,SP_PTREGS(%r15) # load pt_regs
891 1: .long kernel_stack_overflow
894 cleanup_table_system_call:
895 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
896 cleanup_table_sysc_tif:
897 .long sysc_tif + 0x80000000, sysc_restore + 0x80000000
898 cleanup_table_sysc_restore:
899 .long sysc_restore + 0x80000000, sysc_done + 0x80000000
900 cleanup_table_io_tif:
901 .long io_tif + 0x80000000, io_restore + 0x80000000
902 cleanup_table_io_restore:
903 .long io_restore + 0x80000000, io_done + 0x80000000
906 clc 4(4,%r12),BASED(cleanup_table_system_call)
908 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
909 bl BASED(cleanup_system_call)
911 clc 4(4,%r12),BASED(cleanup_table_sysc_tif)
913 clc 4(4,%r12),BASED(cleanup_table_sysc_tif+4)
914 bl BASED(cleanup_sysc_tif)
916 clc 4(4,%r12),BASED(cleanup_table_sysc_restore)
918 clc 4(4,%r12),BASED(cleanup_table_sysc_restore+4)
919 bl BASED(cleanup_sysc_restore)
921 clc 4(4,%r12),BASED(cleanup_table_io_tif)
923 clc 4(4,%r12),BASED(cleanup_table_io_tif+4)
924 bl BASED(cleanup_io_tif)
926 clc 4(4,%r12),BASED(cleanup_table_io_restore)
928 clc 4(4,%r12),BASED(cleanup_table_io_restore+4)
929 bl BASED(cleanup_io_restore)
934 mvc __LC_RETURN_PSW(8),0(%r12)
935 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
937 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
938 c %r12,BASED(.Lmck_old_psw)
940 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
941 0: c %r12,BASED(.Lmck_old_psw)
942 la %r12,__LC_SAVE_AREA+32
944 la %r12,__LC_SAVE_AREA+16
945 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
946 bhe BASED(cleanup_vtime)
947 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
949 mvc __LC_SAVE_AREA(16),0(%r12)
951 st %r12,__LC_SAVE_AREA+48 # argh
952 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
953 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
954 l %r12,__LC_SAVE_AREA+48 # argh
958 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
959 bhe BASED(cleanup_stime)
960 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
962 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
963 bh BASED(cleanup_update)
964 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
966 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
967 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
968 la %r12,__LC_RETURN_PSW
970 cleanup_system_call_insn:
971 .long sysc_saveall + 0x80000000
972 .long system_call + 0x80000000
973 .long sysc_vtime + 0x80000000
974 .long sysc_stime + 0x80000000
975 .long sysc_update + 0x80000000
978 mvc __LC_RETURN_PSW(4),0(%r12)
979 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_tif)
980 la %r12,__LC_RETURN_PSW
983 cleanup_sysc_restore:
984 clc 4(4,%r12),BASED(cleanup_sysc_restore_insn)
986 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
987 c %r12,BASED(.Lmck_old_psw)
989 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
990 0: clc 4(4,%r12),BASED(cleanup_sysc_restore_insn+4)
992 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
993 c %r12,BASED(.Lmck_old_psw)
994 la %r12,__LC_SAVE_AREA+32
996 la %r12,__LC_SAVE_AREA+16
997 1: mvc 0(16,%r12),SP_R12(%r15)
998 lm %r0,%r11,SP_R0(%r15)
1000 2: la %r12,__LC_RETURN_PSW
1002 cleanup_sysc_restore_insn:
1003 .long sysc_done - 4 + 0x80000000
1004 .long sysc_done - 8 + 0x80000000
1007 mvc __LC_RETURN_PSW(4),0(%r12)
1008 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_tif)
1009 la %r12,__LC_RETURN_PSW
1013 clc 4(4,%r12),BASED(cleanup_io_restore_insn)
1015 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1016 clc 4(4,%r12),BASED(cleanup_io_restore_insn+4)
1018 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1019 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1020 lm %r0,%r11,SP_R0(%r15)
1022 1: la %r12,__LC_RETURN_PSW
1024 cleanup_io_restore_insn:
1025 .long io_done - 4 + 0x80000000
1026 .long io_done - 8 + 0x80000000
1032 .Lc_spsize: .long SP_SIZE
1033 .Lc_overhead: .long STACK_FRAME_OVERHEAD
1034 .Lnr_syscalls: .long NR_syscalls
1035 .L0x018: .short 0x018
1036 .L0x020: .short 0x020
1037 .L0x028: .short 0x028
1038 .L0x030: .short 0x030
1039 .L0x038: .short 0x038
1045 .Ls390_mcck: .long s390_do_machine_check
1047 .long s390_handle_mcck
1048 .Lmck_old_psw: .long __LC_MCK_OLD_PSW
1049 .Ldo_IRQ: .long do_IRQ
1050 .Ldo_extint: .long do_extint
1051 .Ldo_signal: .long do_signal
1053 .long do_notify_resume
1054 .Lhandle_per: .long do_single_step
1055 .Ldo_execve: .long do_execve
1056 .Lexecve_tail: .long execve_tail
1057 .Ljump_table: .long pgm_check_table
1058 .Lschedule: .long schedule
1059 #ifdef CONFIG_PREEMPT
1060 .Lpreempt_schedule_irq:
1061 .long preempt_schedule_irq
1063 .Ltrace_entry: .long do_syscall_trace_enter
1064 .Ltrace_exit: .long do_syscall_trace_exit
1065 .Lschedtail: .long schedule_tail
1066 .Lsysc_table: .long sys_call_table
1067 #ifdef CONFIG_TRACE_IRQFLAGS
1068 .Ltrace_irq_on_caller:
1069 .long trace_hardirqs_on_caller
1070 .Ltrace_irq_off_caller:
1071 .long trace_hardirqs_off_caller
1073 #ifdef CONFIG_LOCKDEP
1075 .long lockdep_sys_exit
1078 .long __critical_start + 0x80000000
1080 .long __critical_end + 0x80000000
1082 .long cleanup_critical
1084 .section .rodata, "a"
1085 #define SYSCALL(esa,esame,emu) .long esa
1086 .globl sys_call_table
1088 #include "syscalls.S"