2 * GPIOs on MPC8349/8572/8610 and compatible
4 * Copyright (C) 2008 Peter Korsgaard <jacmet@sunsite.dk>
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
16 #include <linux/of_gpio.h>
17 #include <linux/gpio.h>
18 #include <linux/slab.h>
20 #define MPC8XXX_GPIO_PINS 32
29 struct mpc8xxx_gpio_chip {
30 struct of_mm_gpio_chip mm_gc;
34 * shadowed data register to be able to clear/set output pins in
35 * open drain mode safely
40 static inline u32 mpc8xxx_gpio2mask(unsigned int gpio)
42 return 1u << (MPC8XXX_GPIO_PINS - 1 - gpio);
45 static inline struct mpc8xxx_gpio_chip *
46 to_mpc8xxx_gpio_chip(struct of_mm_gpio_chip *mm)
48 return container_of(mm, struct mpc8xxx_gpio_chip, mm_gc);
51 static void mpc8xxx_gpio_save_regs(struct of_mm_gpio_chip *mm)
53 struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
55 mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT);
58 /* Workaround GPIO 1 errata on MPC8572/MPC8536. The status of GPIOs
59 * defined as output cannot be determined by reading GPDAT register,
60 * so we use shadow data register instead. The status of input pins
61 * is determined by reading GPDAT register.
63 static int mpc8572_gpio_get(struct gpio_chip *gc, unsigned int gpio)
66 struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
67 struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
69 val = in_be32(mm->regs + GPIO_DAT) & ~in_be32(mm->regs + GPIO_DIR);
71 return (val | mpc8xxx_gc->data) & mpc8xxx_gpio2mask(gpio);
74 static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio)
76 struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
78 return in_be32(mm->regs + GPIO_DAT) & mpc8xxx_gpio2mask(gpio);
81 static void mpc8xxx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
83 struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
84 struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
87 spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
90 mpc8xxx_gc->data |= mpc8xxx_gpio2mask(gpio);
92 mpc8xxx_gc->data &= ~mpc8xxx_gpio2mask(gpio);
94 out_be32(mm->regs + GPIO_DAT, mpc8xxx_gc->data);
96 spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
99 static int mpc8xxx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
101 struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
102 struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
105 spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
107 clrbits32(mm->regs + GPIO_DIR, mpc8xxx_gpio2mask(gpio));
109 spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
114 static int mpc8xxx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
116 struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
117 struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
120 mpc8xxx_gpio_set(gc, gpio, val);
122 spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
124 setbits32(mm->regs + GPIO_DIR, mpc8xxx_gpio2mask(gpio));
126 spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
131 static void __init mpc8xxx_add_controller(struct device_node *np)
133 struct mpc8xxx_gpio_chip *mpc8xxx_gc;
134 struct of_mm_gpio_chip *mm_gc;
135 struct of_gpio_chip *of_gc;
136 struct gpio_chip *gc;
139 mpc8xxx_gc = kzalloc(sizeof(*mpc8xxx_gc), GFP_KERNEL);
145 spin_lock_init(&mpc8xxx_gc->lock);
147 mm_gc = &mpc8xxx_gc->mm_gc;
148 of_gc = &mm_gc->of_gc;
151 mm_gc->save_regs = mpc8xxx_gpio_save_regs;
152 of_gc->gpio_cells = 2;
153 gc->ngpio = MPC8XXX_GPIO_PINS;
154 gc->direction_input = mpc8xxx_gpio_dir_in;
155 gc->direction_output = mpc8xxx_gpio_dir_out;
156 if (of_device_is_compatible(np, "fsl,mpc8572-gpio"))
157 gc->get = mpc8572_gpio_get;
159 gc->get = mpc8xxx_gpio_get;
160 gc->set = mpc8xxx_gpio_set;
162 ret = of_mm_gpiochip_add(np, mm_gc);
169 pr_err("%s: registration failed with status %d\n",
176 static int __init mpc8xxx_add_gpiochips(void)
178 struct device_node *np;
180 for_each_compatible_node(np, NULL, "fsl,mpc8349-gpio")
181 mpc8xxx_add_controller(np);
183 for_each_compatible_node(np, NULL, "fsl,mpc8572-gpio")
184 mpc8xxx_add_controller(np);
186 for_each_compatible_node(np, NULL, "fsl,mpc8610-gpio")
187 mpc8xxx_add_controller(np);
191 arch_initcall(mpc8xxx_add_gpiochips);