2 * GPIO Abstraction Layer
4 * Copyright 2006-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later
9 #include <linux/delay.h>
10 #include <linux/module.h>
11 #include <linux/err.h>
12 #include <linux/proc_fs.h>
13 #include <asm/blackfin.h>
15 #include <asm/portmux.h>
16 #include <linux/irq.h>
18 #if ANOMALY_05000311 || ANOMALY_05000323
21 AWA_data_clear = SYSCR,
24 AWA_maska = BFIN_UART_SCR,
25 AWA_maska_clear = BFIN_UART_SCR,
26 AWA_maska_set = BFIN_UART_SCR,
27 AWA_maska_toggle = BFIN_UART_SCR,
28 AWA_maskb = BFIN_UART_GCTL,
29 AWA_maskb_clear = BFIN_UART_GCTL,
30 AWA_maskb_set = BFIN_UART_GCTL,
31 AWA_maskb_toggle = BFIN_UART_GCTL,
32 AWA_dir = SPORT1_STAT,
33 AWA_polar = SPORT1_STAT,
34 AWA_edge = SPORT1_STAT,
35 AWA_both = SPORT1_STAT,
37 AWA_inen = TIMER_ENABLE,
38 #elif ANOMALY_05000323
39 AWA_inen = DMA1_1_CONFIG,
42 /* Anomaly Workaround */
43 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
45 #define AWA_DUMMY_READ(...) do { } while (0)
48 static struct gpio_port_t * const gpio_array[] = {
49 #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
50 (struct gpio_port_t *) FIO_FLAG_D,
51 #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
52 (struct gpio_port_t *) PORTFIO,
53 (struct gpio_port_t *) PORTGIO,
54 (struct gpio_port_t *) PORTHIO,
55 #elif defined(BF561_FAMILY)
56 (struct gpio_port_t *) FIO0_FLAG_D,
57 (struct gpio_port_t *) FIO1_FLAG_D,
58 (struct gpio_port_t *) FIO2_FLAG_D,
59 #elif defined(CONFIG_BF54x)
60 (struct gpio_port_t *)PORTA_FER,
61 (struct gpio_port_t *)PORTB_FER,
62 (struct gpio_port_t *)PORTC_FER,
63 (struct gpio_port_t *)PORTD_FER,
64 (struct gpio_port_t *)PORTE_FER,
65 (struct gpio_port_t *)PORTF_FER,
66 (struct gpio_port_t *)PORTG_FER,
67 (struct gpio_port_t *)PORTH_FER,
68 (struct gpio_port_t *)PORTI_FER,
69 (struct gpio_port_t *)PORTJ_FER,
71 # error no gpio arrays defined
75 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
76 static unsigned short * const port_fer[] = {
77 (unsigned short *) PORTF_FER,
78 (unsigned short *) PORTG_FER,
79 (unsigned short *) PORTH_FER,
82 # if !defined(BF537_FAMILY)
83 static unsigned short * const port_mux[] = {
84 (unsigned short *) PORTF_MUX,
85 (unsigned short *) PORTG_MUX,
86 (unsigned short *) PORTH_MUX,
90 u8 pmux_offset[][16] = {
91 # if defined(CONFIG_BF52x)
92 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
93 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
94 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
95 # elif defined(CONFIG_BF51x)
96 { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
97 { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
98 { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
103 #elif defined(BF538_FAMILY)
104 static unsigned short * const port_fer[] = {
105 (unsigned short *) PORTCIO_FER,
106 (unsigned short *) PORTDIO_FER,
107 (unsigned short *) PORTEIO_FER,
111 static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
112 static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
113 static unsigned short reserved_gpio_irq_map[GPIO_BANK_NUM];
115 #define RESOURCE_LABEL_SIZE 16
117 static struct str_ident {
118 char name[RESOURCE_LABEL_SIZE];
119 } str_ident[MAX_RESOURCES];
121 #if defined(CONFIG_PM)
122 static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
125 inline int check_gpio(unsigned gpio)
127 #if defined(CONFIG_BF54x)
128 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
129 || gpio == GPIO_PH14 || gpio == GPIO_PH15
130 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
133 if (gpio >= MAX_BLACKFIN_GPIOS)
138 static void gpio_error(unsigned gpio)
140 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
143 static void set_label(unsigned short ident, const char *label)
146 strncpy(str_ident[ident].name, label,
147 RESOURCE_LABEL_SIZE);
148 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
152 static char *get_label(unsigned short ident)
154 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
157 static int cmp_label(unsigned short ident, const char *label)
161 printk(KERN_ERR "Please provide none-null label\n");
165 return strcmp(str_ident[ident].name, label);
170 static void port_setup(unsigned gpio, unsigned short usage)
172 #if defined(BF538_FAMILY)
174 * BF538/9 Port C,D and E are special.
175 * Inverted PORT_FER polarity on CDE and no PORF_FER on F
176 * Regular PORT F GPIOs are handled here, CDE are exclusively
180 if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
183 gpio -= MAX_BLACKFIN_GPIOS;
185 if (usage == GPIO_USAGE)
186 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
188 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
193 if (check_gpio(gpio))
196 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
197 if (usage == GPIO_USAGE)
198 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
200 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
202 #elif defined(CONFIG_BF54x)
203 if (usage == GPIO_USAGE)
204 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
206 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
214 unsigned short offset;
216 {.res = P_PPI0_D13, .offset = 11},
217 {.res = P_PPI0_D14, .offset = 11},
218 {.res = P_PPI0_D15, .offset = 11},
219 {.res = P_SPORT1_TFS, .offset = 11},
220 {.res = P_SPORT1_TSCLK, .offset = 11},
221 {.res = P_SPORT1_DTPRI, .offset = 11},
222 {.res = P_PPI0_D10, .offset = 10},
223 {.res = P_PPI0_D11, .offset = 10},
224 {.res = P_PPI0_D12, .offset = 10},
225 {.res = P_SPORT1_RSCLK, .offset = 10},
226 {.res = P_SPORT1_RFS, .offset = 10},
227 {.res = P_SPORT1_DRPRI, .offset = 10},
228 {.res = P_PPI0_D8, .offset = 9},
229 {.res = P_PPI0_D9, .offset = 9},
230 {.res = P_SPORT1_DRSEC, .offset = 9},
231 {.res = P_SPORT1_DTSEC, .offset = 9},
232 {.res = P_TMR2, .offset = 8},
233 {.res = P_PPI0_FS3, .offset = 8},
234 {.res = P_TMR3, .offset = 7},
235 {.res = P_SPI0_SSEL4, .offset = 7},
236 {.res = P_TMR4, .offset = 6},
237 {.res = P_SPI0_SSEL5, .offset = 6},
238 {.res = P_TMR5, .offset = 5},
239 {.res = P_SPI0_SSEL6, .offset = 5},
240 {.res = P_UART1_RX, .offset = 4},
241 {.res = P_UART1_TX, .offset = 4},
242 {.res = P_TMR6, .offset = 4},
243 {.res = P_TMR7, .offset = 4},
244 {.res = P_UART0_RX, .offset = 3},
245 {.res = P_UART0_TX, .offset = 3},
246 {.res = P_DMAR0, .offset = 3},
247 {.res = P_DMAR1, .offset = 3},
248 {.res = P_SPORT0_DTSEC, .offset = 1},
249 {.res = P_SPORT0_DRSEC, .offset = 1},
250 {.res = P_CAN0_RX, .offset = 1},
251 {.res = P_CAN0_TX, .offset = 1},
252 {.res = P_SPI0_SSEL7, .offset = 1},
253 {.res = P_SPORT0_TFS, .offset = 0},
254 {.res = P_SPORT0_DTPRI, .offset = 0},
255 {.res = P_SPI0_SSEL2, .offset = 0},
256 {.res = P_SPI0_SSEL3, .offset = 0},
259 static void portmux_setup(unsigned short per)
261 u16 y, offset, muxreg;
262 u16 function = P_FUNCT2MUX(per);
264 for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
265 if (port_mux_lut[y].res == per) {
267 /* SET PORTMUX REG */
269 offset = port_mux_lut[y].offset;
270 muxreg = bfin_read_PORT_MUX();
273 muxreg &= ~(1 << offset);
277 muxreg |= (function << offset);
278 bfin_write_PORT_MUX(muxreg);
282 #elif defined(CONFIG_BF54x)
283 inline void portmux_setup(unsigned short per)
286 u16 ident = P_IDENT(per);
287 u16 function = P_FUNCT2MUX(per);
289 pmux = gpio_array[gpio_bank(ident)]->port_mux;
291 pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
292 pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
294 gpio_array[gpio_bank(ident)]->port_mux = pmux;
297 inline u16 get_portmux(unsigned short per)
300 u16 ident = P_IDENT(per);
302 pmux = gpio_array[gpio_bank(ident)]->port_mux;
304 return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
306 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
307 inline void portmux_setup(unsigned short per)
309 u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
310 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
312 pmux = *port_mux[gpio_bank(ident)];
313 pmux &= ~(3 << offset);
314 pmux |= (function & 3) << offset;
315 *port_mux[gpio_bank(ident)] = pmux;
319 # define portmux_setup(...) do { } while (0)
323 /***********************************************************
325 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
328 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
331 * DESCRIPTION: These functions abstract direct register access
332 * to Blackfin processor General Purpose
335 * CAUTION: These functions do not belong to the GPIO Driver API
336 *************************************************************
337 * MODIFICATION HISTORY :
338 **************************************************************/
340 /* Set a specific bit */
342 #define SET_GPIO(name) \
343 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
345 unsigned long flags; \
346 local_irq_save_hw(flags); \
348 gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
350 gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
351 AWA_DUMMY_READ(name); \
352 local_irq_restore_hw(flags); \
354 EXPORT_SYMBOL(set_gpio_ ## name);
356 SET_GPIO(dir) /* set_gpio_dir() */
357 SET_GPIO(inen) /* set_gpio_inen() */
358 SET_GPIO(polar) /* set_gpio_polar() */
359 SET_GPIO(edge) /* set_gpio_edge() */
360 SET_GPIO(both) /* set_gpio_both() */
363 #define SET_GPIO_SC(name) \
364 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
366 unsigned long flags; \
367 if (ANOMALY_05000311 || ANOMALY_05000323) \
368 local_irq_save_hw(flags); \
370 gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
372 gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
373 if (ANOMALY_05000311 || ANOMALY_05000323) { \
374 AWA_DUMMY_READ(name); \
375 local_irq_restore_hw(flags); \
378 EXPORT_SYMBOL(set_gpio_ ## name);
384 void set_gpio_toggle(unsigned gpio)
387 if (ANOMALY_05000311 || ANOMALY_05000323)
388 local_irq_save_hw(flags);
389 gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
390 if (ANOMALY_05000311 || ANOMALY_05000323) {
391 AWA_DUMMY_READ(toggle);
392 local_irq_restore_hw(flags);
395 EXPORT_SYMBOL(set_gpio_toggle);
398 /*Set current PORT date (16-bit word)*/
400 #define SET_GPIO_P(name) \
401 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
403 unsigned long flags; \
404 if (ANOMALY_05000311 || ANOMALY_05000323) \
405 local_irq_save_hw(flags); \
406 gpio_array[gpio_bank(gpio)]->name = arg; \
407 if (ANOMALY_05000311 || ANOMALY_05000323) { \
408 AWA_DUMMY_READ(name); \
409 local_irq_restore_hw(flags); \
412 EXPORT_SYMBOL(set_gpiop_ ## name);
423 /* Get a specific bit */
424 #define GET_GPIO(name) \
425 unsigned short get_gpio_ ## name(unsigned gpio) \
427 unsigned long flags; \
428 unsigned short ret; \
429 if (ANOMALY_05000311 || ANOMALY_05000323) \
430 local_irq_save_hw(flags); \
431 ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
432 if (ANOMALY_05000311 || ANOMALY_05000323) { \
433 AWA_DUMMY_READ(name); \
434 local_irq_restore_hw(flags); \
438 EXPORT_SYMBOL(get_gpio_ ## name);
449 /*Get current PORT date (16-bit word)*/
451 #define GET_GPIO_P(name) \
452 unsigned short get_gpiop_ ## name(unsigned gpio) \
454 unsigned long flags; \
455 unsigned short ret; \
456 if (ANOMALY_05000311 || ANOMALY_05000323) \
457 local_irq_save_hw(flags); \
458 ret = (gpio_array[gpio_bank(gpio)]->name); \
459 if (ANOMALY_05000311 || ANOMALY_05000323) { \
460 AWA_DUMMY_READ(name); \
461 local_irq_restore_hw(flags); \
465 EXPORT_SYMBOL(get_gpiop_ ## name);
479 static unsigned short wakeup_map[GPIO_BANK_NUM];
480 static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
482 static const unsigned int sic_iwr_irqs[] = {
483 #if defined(BF533_FAMILY)
485 #elif defined(BF537_FAMILY)
486 IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
487 #elif defined(BF538_FAMILY)
489 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
490 IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
491 #elif defined(BF561_FAMILY)
492 IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
494 # error no SIC_IWR defined
498 /***********************************************************
500 * FUNCTIONS: Blackfin PM Setup API
503 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
511 * DESCRIPTION: Blackfin PM Driver API
514 *************************************************************
515 * MODIFICATION HISTORY :
516 **************************************************************/
517 int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
521 if ((check_gpio(gpio) < 0) || !type)
524 local_irq_save_hw(flags);
525 wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
526 wakeup_flags_map[gpio] = type;
527 local_irq_restore_hw(flags);
531 EXPORT_SYMBOL(gpio_pm_wakeup_request);
533 void gpio_pm_wakeup_free(unsigned gpio)
537 if (check_gpio(gpio) < 0)
540 local_irq_save_hw(flags);
542 wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
544 local_irq_restore_hw(flags);
546 EXPORT_SYMBOL(gpio_pm_wakeup_free);
548 static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
550 port_setup(gpio, GPIO_USAGE);
551 set_gpio_dir(gpio, 0);
552 set_gpio_inen(gpio, 1);
554 if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
555 set_gpio_edge(gpio, 1);
557 set_gpio_edge(gpio, 0);
559 if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
560 set_gpio_both(gpio, 1);
562 set_gpio_both(gpio, 0);
564 if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
565 set_gpio_polar(gpio, 1);
567 set_gpio_polar(gpio, 0);
574 u32 bfin_pm_standby_setup(void)
576 u16 bank, mask, i, gpio;
578 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
579 mask = wakeup_map[gpio_bank(i)];
582 gpio_bank_saved[bank].maskb = gpio_array[bank]->maskb;
583 gpio_array[bank]->maskb = 0;
586 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
587 gpio_bank_saved[bank].fer = *port_fer[bank];
589 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
590 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
591 gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
592 gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
593 gpio_bank_saved[bank].both = gpio_array[bank]->both;
594 gpio_bank_saved[bank].reserved =
595 reserved_gpio_map[bank];
600 if ((mask & 1) && (wakeup_flags_map[gpio] !=
602 reserved_gpio_map[gpio_bank(gpio)] |=
604 bfin_gpio_wakeup_type(gpio,
605 wakeup_flags_map[gpio]);
606 set_gpio_data(gpio, 0); /*Clear*/
612 bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
613 gpio_array[bank]->maskb_set = wakeup_map[gpio_bank(i)];
617 AWA_DUMMY_READ(maskb_set);
622 void bfin_pm_standby_restore(void)
626 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
627 mask = wakeup_map[gpio_bank(i)];
631 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
632 *port_fer[bank] = gpio_bank_saved[bank].fer;
634 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
635 gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
636 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
637 gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
638 gpio_array[bank]->both = gpio_bank_saved[bank].both;
640 reserved_gpio_map[bank] =
641 gpio_bank_saved[bank].reserved;
642 bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
645 gpio_array[bank]->maskb = gpio_bank_saved[bank].maskb;
647 AWA_DUMMY_READ(maskb);
650 void bfin_gpio_pm_hibernate_suspend(void)
654 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
657 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
658 gpio_bank_saved[bank].fer = *port_fer[bank];
659 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
660 gpio_bank_saved[bank].mux = *port_mux[bank];
663 gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
666 gpio_bank_saved[bank].data = gpio_array[bank]->data;
667 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
668 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
669 gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
670 gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
671 gpio_bank_saved[bank].both = gpio_array[bank]->both;
672 gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
675 AWA_DUMMY_READ(maska);
678 void bfin_gpio_pm_hibernate_restore(void)
682 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
685 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
686 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
687 *port_mux[bank] = gpio_bank_saved[bank].mux;
690 bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
692 *port_fer[bank] = gpio_bank_saved[bank].fer;
694 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
695 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
696 & gpio_bank_saved[bank].dir;
697 gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
698 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
699 gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
700 gpio_array[bank]->both = gpio_bank_saved[bank].both;
701 gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
703 AWA_DUMMY_READ(maska);
708 #else /* CONFIG_BF54x */
711 u32 bfin_pm_standby_setup(void)
716 void bfin_pm_standby_restore(void)
721 void bfin_gpio_pm_hibernate_suspend(void)
725 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
728 gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
729 gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
730 gpio_bank_saved[bank].data = gpio_array[bank]->data;
731 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
732 gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
736 void bfin_gpio_pm_hibernate_restore(void)
740 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
743 gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
744 gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
745 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
746 gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
747 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
748 | gpio_bank_saved[bank].dir;
753 unsigned short get_gpio_dir(unsigned gpio)
755 return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
757 EXPORT_SYMBOL(get_gpio_dir);
759 #endif /* CONFIG_BF54x */
761 /***********************************************************
763 * FUNCTIONS: Blackfin Peripheral Resource Allocation
767 * per Peripheral Identifier
770 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
773 *************************************************************
774 * MODIFICATION HISTORY :
775 **************************************************************/
777 int peripheral_request(unsigned short per, const char *label)
780 unsigned short ident = P_IDENT(per);
783 * Don't cares are pins with only one dedicated function
786 if (per & P_DONTCARE)
789 if (!(per & P_DEFINED))
792 BUG_ON(ident >= MAX_RESOURCES);
794 local_irq_save_hw(flags);
796 /* If a pin can be muxed as either GPIO or peripheral, make
797 * sure it is not already a GPIO pin when we request it.
799 if (unlikely(!check_gpio(ident) &&
800 reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
801 if (system_state == SYSTEM_BOOTING)
804 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
805 __func__, ident, get_label(ident));
806 local_irq_restore_hw(flags);
810 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
813 * Pin functions like AMC address strobes my
814 * be requested and used by several drivers
818 if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
820 if (!(per & P_MAYSHARE)) {
823 * Allow that the identical pin function can
824 * be requested from the same driver twice
827 if (cmp_label(ident, label) == 0)
830 if (system_state == SYSTEM_BOOTING)
833 "%s: Peripheral %d function %d is already reserved by %s !\n",
834 __func__, ident, P_FUNCT2MUX(per), get_label(ident));
835 local_irq_restore_hw(flags);
841 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
844 port_setup(ident, PERIPHERAL_USAGE);
846 local_irq_restore_hw(flags);
847 set_label(ident, label);
851 EXPORT_SYMBOL(peripheral_request);
853 int peripheral_request_list(const unsigned short per[], const char *label)
858 for (cnt = 0; per[cnt] != 0; cnt++) {
860 ret = peripheral_request(per[cnt], label);
863 for ( ; cnt > 0; cnt--)
864 peripheral_free(per[cnt - 1]);
872 EXPORT_SYMBOL(peripheral_request_list);
874 void peripheral_free(unsigned short per)
877 unsigned short ident = P_IDENT(per);
879 if (per & P_DONTCARE)
882 if (!(per & P_DEFINED))
885 local_irq_save_hw(flags);
887 if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
888 local_irq_restore_hw(flags);
892 if (!(per & P_MAYSHARE))
893 port_setup(ident, GPIO_USAGE);
895 reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
897 set_label(ident, "free");
899 local_irq_restore_hw(flags);
901 EXPORT_SYMBOL(peripheral_free);
903 void peripheral_free_list(const unsigned short per[])
906 for (cnt = 0; per[cnt] != 0; cnt++)
907 peripheral_free(per[cnt]);
909 EXPORT_SYMBOL(peripheral_free_list);
911 /***********************************************************
913 * FUNCTIONS: Blackfin GPIO Driver
916 * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
919 * DESCRIPTION: Blackfin GPIO Driver API
922 *************************************************************
923 * MODIFICATION HISTORY :
924 **************************************************************/
926 int bfin_gpio_request(unsigned gpio, const char *label)
930 if (check_gpio(gpio) < 0)
933 local_irq_save_hw(flags);
936 * Allow that the identical GPIO can
937 * be requested from the same driver twice
938 * Do nothing and return -
941 if (cmp_label(gpio, label) == 0) {
942 local_irq_restore_hw(flags);
946 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
947 if (system_state == SYSTEM_BOOTING)
949 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
950 gpio, get_label(gpio));
951 local_irq_restore_hw(flags);
954 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
955 if (system_state == SYSTEM_BOOTING)
958 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
959 gpio, get_label(gpio));
960 local_irq_restore_hw(flags);
963 if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
964 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
965 " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
968 else { /* Reset POLAR setting when acquiring a gpio for the first time */
969 set_gpio_polar(gpio, 0);
973 reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
974 set_label(gpio, label);
976 local_irq_restore_hw(flags);
978 port_setup(gpio, GPIO_USAGE);
982 EXPORT_SYMBOL(bfin_gpio_request);
984 void bfin_gpio_free(unsigned gpio)
988 if (check_gpio(gpio) < 0)
993 local_irq_save_hw(flags);
995 if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
996 if (system_state == SYSTEM_BOOTING)
999 local_irq_restore_hw(flags);
1003 reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1005 set_label(gpio, "free");
1007 local_irq_restore_hw(flags);
1009 EXPORT_SYMBOL(bfin_gpio_free);
1011 #ifdef BFIN_SPECIAL_GPIO_BANKS
1012 static unsigned short reserved_special_gpio_map[gpio_bank(MAX_RESOURCES)];
1014 int bfin_special_gpio_request(unsigned gpio, const char *label)
1016 unsigned long flags;
1018 local_irq_save_hw(flags);
1021 * Allow that the identical GPIO can
1022 * be requested from the same driver twice
1023 * Do nothing and return -
1026 if (cmp_label(gpio, label) == 0) {
1027 local_irq_restore_hw(flags);
1031 if (unlikely(reserved_special_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1032 local_irq_restore_hw(flags);
1033 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
1034 gpio, get_label(gpio));
1038 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1039 local_irq_restore_hw(flags);
1041 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1042 gpio, get_label(gpio));
1047 reserved_special_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1048 reserved_peri_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1050 set_label(gpio, label);
1051 local_irq_restore_hw(flags);
1052 port_setup(gpio, GPIO_USAGE);
1056 EXPORT_SYMBOL(bfin_special_gpio_request);
1058 void bfin_special_gpio_free(unsigned gpio)
1060 unsigned long flags;
1064 local_irq_save_hw(flags);
1066 if (unlikely(!(reserved_special_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1068 local_irq_restore_hw(flags);
1072 reserved_special_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1073 reserved_peri_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1074 set_label(gpio, "free");
1075 local_irq_restore_hw(flags);
1077 EXPORT_SYMBOL(bfin_special_gpio_free);
1081 int bfin_gpio_irq_request(unsigned gpio, const char *label)
1083 unsigned long flags;
1085 if (check_gpio(gpio) < 0)
1088 local_irq_save_hw(flags);
1090 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1091 if (system_state == SYSTEM_BOOTING)
1094 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1095 gpio, get_label(gpio));
1096 local_irq_restore_hw(flags);
1099 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))
1100 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
1101 "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
1102 gpio, get_label(gpio));
1104 reserved_gpio_irq_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1105 set_label(gpio, label);
1107 local_irq_restore_hw(flags);
1109 port_setup(gpio, GPIO_USAGE);
1114 void bfin_gpio_irq_free(unsigned gpio)
1116 unsigned long flags;
1118 if (check_gpio(gpio) < 0)
1121 local_irq_save_hw(flags);
1123 if (unlikely(!(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1124 if (system_state == SYSTEM_BOOTING)
1127 local_irq_restore_hw(flags);
1131 reserved_gpio_irq_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1133 set_label(gpio, "free");
1135 local_irq_restore_hw(flags);
1138 static inline void __bfin_gpio_direction_input(unsigned gpio)
1141 gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
1143 gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1145 gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1148 int bfin_gpio_direction_input(unsigned gpio)
1150 unsigned long flags;
1152 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1157 local_irq_save_hw(flags);
1158 __bfin_gpio_direction_input(gpio);
1159 AWA_DUMMY_READ(inen);
1160 local_irq_restore_hw(flags);
1164 EXPORT_SYMBOL(bfin_gpio_direction_input);
1166 void bfin_gpio_irq_prepare(unsigned gpio)
1169 unsigned long flags;
1172 port_setup(gpio, GPIO_USAGE);
1175 local_irq_save_hw(flags);
1176 __bfin_gpio_direction_input(gpio);
1177 local_irq_restore_hw(flags);
1181 void bfin_gpio_set_value(unsigned gpio, int arg)
1184 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1186 gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
1188 EXPORT_SYMBOL(bfin_gpio_set_value);
1190 int bfin_gpio_direction_output(unsigned gpio, int value)
1192 unsigned long flags;
1194 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1199 local_irq_save_hw(flags);
1201 gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1202 gpio_set_value(gpio, value);
1204 gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
1206 gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1209 AWA_DUMMY_READ(dir);
1210 local_irq_restore_hw(flags);
1214 EXPORT_SYMBOL(bfin_gpio_direction_output);
1216 int bfin_gpio_get_value(unsigned gpio)
1219 return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
1221 unsigned long flags;
1223 if (unlikely(get_gpio_edge(gpio))) {
1225 local_irq_save_hw(flags);
1226 set_gpio_edge(gpio, 0);
1227 ret = get_gpio_data(gpio);
1228 set_gpio_edge(gpio, 1);
1229 local_irq_restore_hw(flags);
1232 return get_gpio_data(gpio);
1235 EXPORT_SYMBOL(bfin_gpio_get_value);
1237 /* If we are booting from SPI and our board lacks a strong enough pull up,
1238 * the core can reset and execute the bootrom faster than the resistor can
1239 * pull the signal logically high. To work around this (common) error in
1240 * board design, we explicitly set the pin back to GPIO mode, force /CS
1241 * high, and wait for the electrons to do their thing.
1243 * This function only makes sense to be called from reset code, but it
1244 * lives here as we need to force all the GPIO states w/out going through
1245 * BUG() checks and such.
1247 void bfin_reset_boot_spi_cs(unsigned short pin)
1249 unsigned short gpio = P_IDENT(pin);
1250 port_setup(gpio, GPIO_USAGE);
1251 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1252 AWA_DUMMY_READ(data_set);
1256 #if defined(CONFIG_PROC_FS)
1257 static int gpio_proc_read(char *buf, char **start, off_t offset,
1258 int len, int *unused_i, void *unused_v)
1260 int c, irq, gpio, outlen = 0;
1262 for (c = 0; c < MAX_RESOURCES; c++) {
1263 irq = reserved_gpio_irq_map[gpio_bank(c)] & gpio_bit(c);
1264 gpio = reserved_gpio_map[gpio_bank(c)] & gpio_bit(c);
1265 if (!check_gpio(c) && (gpio || irq))
1266 len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
1267 get_label(c), (gpio && irq) ? " *" : "",
1268 get_gpio_dir(c) ? "OUTPUT" : "INPUT");
1269 else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
1270 len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
1279 static __init int gpio_register_proc(void)
1281 struct proc_dir_entry *proc_gpio;
1283 proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
1285 proc_gpio->read_proc = gpio_proc_read;
1286 return proc_gpio != NULL;
1288 __initcall(gpio_register_proc);
1291 #ifdef CONFIG_GPIOLIB
1292 static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
1294 return bfin_gpio_direction_input(gpio);
1297 static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
1299 return bfin_gpio_direction_output(gpio, level);
1302 static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
1304 return bfin_gpio_get_value(gpio);
1307 static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
1309 return bfin_gpio_set_value(gpio, value);
1312 static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
1314 return bfin_gpio_request(gpio, chip->label);
1317 static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
1319 return bfin_gpio_free(gpio);
1322 static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
1324 return gpio + GPIO_IRQ_BASE;
1327 static struct gpio_chip bfin_chip = {
1328 .label = "BFIN-GPIO",
1329 .direction_input = bfin_gpiolib_direction_input,
1330 .get = bfin_gpiolib_get_value,
1331 .direction_output = bfin_gpiolib_direction_output,
1332 .set = bfin_gpiolib_set_value,
1333 .request = bfin_gpiolib_gpio_request,
1334 .free = bfin_gpiolib_gpio_free,
1335 .to_irq = bfin_gpiolib_gpio_to_irq,
1337 .ngpio = MAX_BLACKFIN_GPIOS,
1340 static int __init bfin_gpiolib_setup(void)
1342 return gpiochip_add(&bfin_chip);
1344 arch_initcall(bfin_gpiolib_setup);