2 * arch/arm/mach-at91/at91sam9263.c
4 * Copyright (C) 2007 Atmel Corporation.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/module.h>
17 #include <asm/mach/arch.h>
18 #include <asm/mach/map.h>
19 #include <mach/at91sam9263.h>
20 #include <mach/at91_pmc.h>
21 #include <mach/at91_rstc.h>
22 #include <mach/at91_shdwc.h>
27 static struct map_desc at91sam9263_io_desc[] __initdata = {
29 .virtual = AT91_VA_BASE_SYS,
30 .pfn = __phys_to_pfn(AT91_BASE_SYS),
34 .virtual = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE,
35 .pfn = __phys_to_pfn(AT91SAM9263_SRAM0_BASE),
36 .length = AT91SAM9263_SRAM0_SIZE,
39 .virtual = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE - AT91SAM9263_SRAM1_SIZE,
40 .pfn = __phys_to_pfn(AT91SAM9263_SRAM1_BASE),
41 .length = AT91SAM9263_SRAM1_SIZE,
46 /* --------------------------------------------------------------------
48 * -------------------------------------------------------------------- */
51 * The peripheral clocks.
53 static struct clk pioA_clk = {
55 .pmc_mask = 1 << AT91SAM9263_ID_PIOA,
56 .type = CLK_TYPE_PERIPHERAL,
58 static struct clk pioB_clk = {
60 .pmc_mask = 1 << AT91SAM9263_ID_PIOB,
61 .type = CLK_TYPE_PERIPHERAL,
63 static struct clk pioCDE_clk = {
65 .pmc_mask = 1 << AT91SAM9263_ID_PIOCDE,
66 .type = CLK_TYPE_PERIPHERAL,
68 static struct clk usart0_clk = {
70 .pmc_mask = 1 << AT91SAM9263_ID_US0,
71 .type = CLK_TYPE_PERIPHERAL,
73 static struct clk usart1_clk = {
75 .pmc_mask = 1 << AT91SAM9263_ID_US1,
76 .type = CLK_TYPE_PERIPHERAL,
78 static struct clk usart2_clk = {
80 .pmc_mask = 1 << AT91SAM9263_ID_US2,
81 .type = CLK_TYPE_PERIPHERAL,
83 static struct clk mmc0_clk = {
85 .pmc_mask = 1 << AT91SAM9263_ID_MCI0,
86 .type = CLK_TYPE_PERIPHERAL,
88 static struct clk mmc1_clk = {
90 .pmc_mask = 1 << AT91SAM9263_ID_MCI1,
91 .type = CLK_TYPE_PERIPHERAL,
93 static struct clk can_clk = {
95 .pmc_mask = 1 << AT91SAM9263_ID_CAN,
96 .type = CLK_TYPE_PERIPHERAL,
98 static struct clk twi_clk = {
100 .pmc_mask = 1 << AT91SAM9263_ID_TWI,
101 .type = CLK_TYPE_PERIPHERAL,
103 static struct clk spi0_clk = {
105 .pmc_mask = 1 << AT91SAM9263_ID_SPI0,
106 .type = CLK_TYPE_PERIPHERAL,
108 static struct clk spi1_clk = {
110 .pmc_mask = 1 << AT91SAM9263_ID_SPI1,
111 .type = CLK_TYPE_PERIPHERAL,
113 static struct clk ssc0_clk = {
115 .pmc_mask = 1 << AT91SAM9263_ID_SSC0,
116 .type = CLK_TYPE_PERIPHERAL,
118 static struct clk ssc1_clk = {
120 .pmc_mask = 1 << AT91SAM9263_ID_SSC1,
121 .type = CLK_TYPE_PERIPHERAL,
123 static struct clk ac97_clk = {
125 .pmc_mask = 1 << AT91SAM9263_ID_AC97C,
126 .type = CLK_TYPE_PERIPHERAL,
128 static struct clk tcb_clk = {
130 .pmc_mask = 1 << AT91SAM9263_ID_TCB,
131 .type = CLK_TYPE_PERIPHERAL,
133 static struct clk pwm_clk = {
135 .pmc_mask = 1 << AT91SAM9263_ID_PWMC,
136 .type = CLK_TYPE_PERIPHERAL,
138 static struct clk macb_clk = {
140 .pmc_mask = 1 << AT91SAM9263_ID_EMAC,
141 .type = CLK_TYPE_PERIPHERAL,
143 static struct clk dma_clk = {
145 .pmc_mask = 1 << AT91SAM9263_ID_DMA,
146 .type = CLK_TYPE_PERIPHERAL,
148 static struct clk twodge_clk = {
150 .pmc_mask = 1 << AT91SAM9263_ID_2DGE,
151 .type = CLK_TYPE_PERIPHERAL,
153 static struct clk udc_clk = {
155 .pmc_mask = 1 << AT91SAM9263_ID_UDP,
156 .type = CLK_TYPE_PERIPHERAL,
158 static struct clk isi_clk = {
160 .pmc_mask = 1 << AT91SAM9263_ID_ISI,
161 .type = CLK_TYPE_PERIPHERAL,
163 static struct clk lcdc_clk = {
165 .pmc_mask = 1 << AT91SAM9263_ID_LCDC,
166 .type = CLK_TYPE_PERIPHERAL,
168 static struct clk ohci_clk = {
170 .pmc_mask = 1 << AT91SAM9263_ID_UHP,
171 .type = CLK_TYPE_PERIPHERAL,
174 static struct clk *periph_clocks[] __initdata = {
203 * The four programmable clocks.
204 * You must configure pin multiplexing to bring these signals out.
206 static struct clk pck0 = {
208 .pmc_mask = AT91_PMC_PCK0,
209 .type = CLK_TYPE_PROGRAMMABLE,
212 static struct clk pck1 = {
214 .pmc_mask = AT91_PMC_PCK1,
215 .type = CLK_TYPE_PROGRAMMABLE,
218 static struct clk pck2 = {
220 .pmc_mask = AT91_PMC_PCK2,
221 .type = CLK_TYPE_PROGRAMMABLE,
224 static struct clk pck3 = {
226 .pmc_mask = AT91_PMC_PCK3,
227 .type = CLK_TYPE_PROGRAMMABLE,
231 static void __init at91sam9263_register_clocks(void)
235 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
236 clk_register(periph_clocks[i]);
244 /* --------------------------------------------------------------------
246 * -------------------------------------------------------------------- */
248 static struct at91_gpio_bank at91sam9263_gpio[] = {
250 .id = AT91SAM9263_ID_PIOA,
254 .id = AT91SAM9263_ID_PIOB,
258 .id = AT91SAM9263_ID_PIOCDE,
260 .clock = &pioCDE_clk,
262 .id = AT91SAM9263_ID_PIOCDE,
264 .clock = &pioCDE_clk,
266 .id = AT91SAM9263_ID_PIOCDE,
268 .clock = &pioCDE_clk,
272 static void at91sam9263_poweroff(void)
274 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
278 /* --------------------------------------------------------------------
279 * AT91SAM9263 processor initialization
280 * -------------------------------------------------------------------- */
282 void __init at91sam9263_initialize(unsigned long main_clock)
284 /* Map peripherals */
285 iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
287 at91_arch_reset = at91sam9_alt_reset;
288 pm_power_off = at91sam9263_poweroff;
289 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
291 /* Init clock subsystem */
292 at91_clock_init(main_clock);
294 /* Register the processor-specific clocks */
295 at91sam9263_register_clocks();
297 /* Register GPIO subsystem */
298 at91_gpio_init(at91sam9263_gpio, 5);
301 /* --------------------------------------------------------------------
302 * Interrupt initialization
303 * -------------------------------------------------------------------- */
306 * The default interrupt priority levels (0 = lowest, 7 = highest).
308 static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
309 7, /* Advanced Interrupt Controller (FIQ) */
310 7, /* System Peripherals */
311 1, /* Parallel IO Controller A */
312 1, /* Parallel IO Controller B */
313 1, /* Parallel IO Controller C, D and E */
319 0, /* Multimedia Card Interface 0 */
320 0, /* Multimedia Card Interface 1 */
322 6, /* Two-Wire Interface */
323 5, /* Serial Peripheral Interface 0 */
324 5, /* Serial Peripheral Interface 1 */
325 4, /* Serial Synchronous Controller 0 */
326 4, /* Serial Synchronous Controller 1 */
327 5, /* AC97 Controller */
328 0, /* Timer Counter 0, 1 and 2 */
329 0, /* Pulse Width Modulation Controller */
332 0, /* 2D Graphic Engine */
333 2, /* USB Device Port */
334 0, /* Image Sensor Interface */
335 3, /* LDC Controller */
336 0, /* DMA Controller */
338 2, /* USB Host port */
339 0, /* Advanced Interrupt Controller (IRQ0) */
340 0, /* Advanced Interrupt Controller (IRQ1) */
343 void __init at91sam9263_init_interrupts(unsigned int priority[NR_AIC_IRQS])
346 priority = at91sam9263_default_irq_priority;
348 /* Initialize the AIC interrupt controller */
349 at91_aic_init(priority);
351 /* Enable GPIO interrupts */
352 at91_gpio_irq_setup();