5 * National Semiconductor LM90
7 Addresses scanned: I2C 0x4c
8 Datasheet: Publicly available at the National Semiconductor website
9 http://www.national.com/pf/LM/LM90.html
10 * National Semiconductor LM89
11 Prefix: 'lm89' (no auto-detection)
12 Addresses scanned: I2C 0x4c and 0x4d
13 Datasheet: Publicly available at the National Semiconductor website
14 http://www.national.com/mpf/LM/LM89.html
15 * National Semiconductor LM99
17 Addresses scanned: I2C 0x4c and 0x4d
18 Datasheet: Publicly available at the National Semiconductor website
19 http://www.national.com/pf/LM/LM99.html
20 * National Semiconductor LM86
22 Addresses scanned: I2C 0x4c
23 Datasheet: Publicly available at the National Semiconductor website
24 http://www.national.com/mpf/LM/LM86.html
25 * Analog Devices ADM1032
27 Addresses scanned: I2C 0x4c and 0x4d
28 Datasheet: Publicly available at the ON Semiconductor website
29 http://www.onsemi.com/PowerSolutions/product.do?id=ADM1032
30 * Analog Devices ADT7461
32 Addresses scanned: I2C 0x4c and 0x4d
33 Datasheet: Publicly available at the ON Semiconductor website
34 http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461
37 Addresses scanned: I2C 0x4d
38 Datasheet: Publicly available at the Maxim website
39 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
42 Addresses scanned: I2C 0x4e
43 Datasheet: Publicly available at the Maxim website
44 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
47 Addresses scanned: I2C 0x4c
48 Datasheet: Publicly available at the Maxim website
49 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3500
52 Addresses scanned: I2C 0x4c
53 Datasheet: Publicly available at the Maxim website
54 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
57 Addresses scanned: I2C 0x4c
58 Datasheet: Publicly available at the Maxim website
59 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
62 Addresses scanned: I2C 0x4c
63 Datasheet: Publicly available at the Maxim website
64 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
67 Addresses scanned: I2C 0x4c, 0x4d, 0x4e
68 Datasheet: Publicly available at the Maxim website
69 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
72 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
74 Datasheet: Publicly available at the Maxim website
75 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
78 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
80 Datasheet: Publicly available at the Maxim website
81 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
84 Addresses scanned: I2C 0x4c
85 Datasheet: Publicly available at the Maxim website
86 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3500
87 * Winbond/Nuvoton W83L771AWG/ASG
89 Addresses scanned: I2C 0x4c
90 Datasheet: Not publicly available, can be requested from Nuvoton
93 Author: Jean Delvare <khali@linux-fr.org>
99 The LM90 is a digital temperature sensor. It senses its own temperature as
100 well as the temperature of up to one external diode. It is compatible
101 with many other devices, many of which are supported by this driver.
103 Note that there is no easy way to differentiate between the MAX6657,
104 MAX6658 and MAX6659 variants. The extra features of the MAX6659 are only
105 supported by this driver if the chip is located at address 0x4d or 0x4e,
106 or if the chip type is explicitly selected as max6659.
107 The MAX6680 and MAX6681 only differ in their pinout, therefore they obviously
108 can't (and don't need to) be distinguished.
110 The specificity of this family of chipsets over the ADM1021/LM84
111 family is that it features critical limits with hysteresis, and an
112 increased resolution of the remote temperature measurement.
114 The different chipsets of the family are not strictly identical, although
115 very similar. For reference, here comes a non-exhaustive list of specific
119 * Filter and alert configuration register at 0xBF.
120 * ALERT is triggered by temperatures over critical limits.
124 * Better external channel accuracy
128 * External temperature shifted by 16 degrees down
131 * Consecutive alert register at 0x22.
132 * Conversion averaging.
133 * Up to 64 conversions/s.
134 * ALERT is triggered by open remote sensor.
135 * SMBus PEC support for Write Byte and Receive Byte transactions.
138 * Extended temperature range (breaks compatibility)
139 * Lower resolution for remote temperature
142 * Better local resolution
143 * Remote sensor type selection
146 * Better local resolution
148 * Second critical temperature limit
149 * Remote sensor type selection
153 * Remote sensor type selection
156 * The AWG and ASG variants only differ in package format.
157 * Filter and alert configuration register at 0xBF
158 * Diode ideality factor configuration (remote sensor) at 0xE3
159 * Moving average (depending on conversion rate)
161 All temperature values are given in degrees Celsius. Resolution
162 is 1.0 degree for the local temperature, 0.125 degree for the remote
163 temperature, except for the MAX6657, MAX6658 and MAX6659 which have a
164 resolution of 0.125 degree for both temperatures.
166 Each sensor has its own high and low limits, plus a critical limit.
167 Additionally, there is a relative hysteresis value common to both critical
168 values. To make life easier to user-space applications, two absolute values
169 are exported, one for each channel, but these values are of course linked.
170 Only the local hysteresis can be set from user-space, and the same delta
171 applies to the remote hysteresis.
173 The lm90 driver will not update its values more frequently than every
174 other second; reading them more often will do no harm, but will return
180 This driver has basic support for SMBus alert. When an alert is received,
181 the status register is read and the faulty temperature channel is logged.
183 The Analog Devices chips (ADM1032 and ADT7461) do not implement the SMBus
184 alert protocol properly so additional care is needed: the ALERT output is
185 disabled when an alert is received, and is re-enabled only when the alarm
186 is gone. Otherwise the chip would block alerts from other chips in the bus
187 as long as the alarm is active.
192 The ADM1032 is the only chip of the family which supports PEC. It does
193 not support PEC on all transactions though, so some care must be taken.
195 When reading a register value, the PEC byte is computed and sent by the
196 ADM1032 chip. However, in the case of a combined transaction (SMBus Read
197 Byte), the ADM1032 computes the CRC value over only the second half of
198 the message rather than its entirety, because it thinks the first half
199 of the message belongs to a different transaction. As a result, the CRC
200 value differs from what the SMBus master expects, and all reads fail.
202 For this reason, the lm90 driver will enable PEC for the ADM1032 only if
203 the bus supports the SMBus Send Byte and Receive Byte transaction types.
204 These transactions will be used to read register values, instead of
205 SMBus Read Byte, and PEC will work properly.
207 Additionally, the ADM1032 doesn't support SMBus Send Byte with PEC.
208 Instead, it will try to write the PEC value to the register (because the
209 SMBus Send Byte transaction with PEC is similar to a Write Byte transaction
210 without PEC), which is not what we want. Thus, PEC is explicitly disabled
211 on SMBus Send Byte transactions in the lm90 driver.
213 PEC on byte data transactions represents a significant increase in bandwidth
214 usage (+33% for writes, +25% for reads) in normal conditions. With the need
215 to use two SMBus transaction for reads, this overhead jumps to +50%. Worse,
216 two transactions will typically mean twice as much delay waiting for
217 transaction completion, effectively doubling the register cache refresh time.
218 I guess reliability comes at a price, but it's quite expensive this time.
220 So, as not everyone might enjoy the slowdown, PEC can be disabled through
221 sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1
222 to that file to enable PEC again.