pandora-u-boot.git
5 years agoPrepare v2019.04-rc4 v2019.04-rc4
Tom Rini [Tue, 19 Mar 2019 01:14:02 +0000 (21:14 -0400)]
Prepare v2019.04-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Fri, 15 Mar 2019 15:58:17 +0000 (11:58 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq

- DPAA2 fixes and DDR errata workaround for LS1021A

5 years agoMerge tag 'efi-2019-04-rc4-3' of https://github.com/xypron2/u-boot
Tom Rini [Fri, 15 Mar 2019 15:58:08 +0000 (11:58 -0400)]
Merge tag 'efi-2019-04-rc4-3' of https://github.com/xypron2/u-boot

Pull request for UEFI system for v2019.04-rc4

Fix an error with the serial communication on boards with a very small
UART buffer which leads to a stalled system.

Provide an X86 reset driver for the UEFI runtime.

Fix a problem with parallel builds.

5 years agoarmv7: ls102xa: Add workaround for DDR erratum A-008850
Alison Wang [Wed, 6 Mar 2019 06:49:14 +0000 (14:49 +0800)]
armv7: ls102xa: Add workaround for DDR erratum A-008850

Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
5 years agodrivers: net: ls1088ardb: Fix EC1 and EC2 RCW offset
Pramod Kumar [Thu, 28 Feb 2019 09:06:40 +0000 (09:06 +0000)]
drivers: net: ls1088ardb: Fix EC1 and EC2 RCW offset

Fix EC1 and EC2 read from correct offset 26, instead of 25

Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
5 years agoboard: fsl: lx2160aqds: modify the phy fixup code
Pankaj Bansal [Thu, 28 Feb 2019 08:12:55 +0000 (08:12 +0000)]
board: fsl: lx2160aqds: modify the phy fixup code

Now that we are representing the MDIO mux in LX2160AQDS board in
producer/consumer terms, the consumer nodes' has been changed.

Therefore, modify the device tree fixups according to change in device
tree.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
5 years agomc : Reduce MC memory size to 128M
Meenakshi Aggarwal [Wed, 27 Feb 2019 09:11:02 +0000 (14:41 +0530)]
mc : Reduce MC memory size to 128M

ls2088, ls1088 : minimum MC Memory size is 128 MB
lx2 : minimum MC memory size is 256 MB

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
5 years agodriver: net: fsl-mc: Fix DPC MAC address fixup
Ioana Ciocoi Radulescu [Tue, 26 Feb 2019 15:50:07 +0000 (15:50 +0000)]
driver: net: fsl-mc: Fix DPC MAC address fixup

If node /board_info/ports does not exist in the DPC file,
function mc_fixup_dpc() will skip not only MAC address fixup,
but also the cache flush at the end. This may cause the other
fixup changes (e.g. ICID related ones) to be ignored by MC.

Fixes: 1161dbcc0a36 ("drivers: net: fsl-mc: Include MAC addr fixup to DPL")

Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
5 years agodrivers: net: ldpaa_eth: check if the dpmac is enabled
Pankaj Bansal [Fri, 8 Feb 2019 08:59:24 +0000 (08:59 +0000)]
drivers: net: ldpaa_eth: check if the dpmac is enabled

some dpmacs in armv8a based freescale layerscape SOCs can be
configured via both serdes(sgmii, xfi, xlaui etc) bits and via
EC*_PMUX(rgmii) bits in RCW.
e.g. dpmac 17 and 18 in LX2160A can be configured as SGMII from
serdes bits and as RGMII via EC1_PMUX/EC2_PMUX bits
Now if a dpmac is enabled by serdes bits then it takes precedence
over EC*_PMUX bits. i.e. in LX2160A if we select serdes protocol
that configures dpmac17 as SGMII and set the EC1_PMUX as RGMII,
then the dpmac is SGMII and not RGMII.

Therefore, in fsl_rgmii_init function of SOC, we will check if the
dpmac is enabled or not? if it is (fsl_serdes_init has already enabled
the dpmac), then don't enable it.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
5 years agoefi_loader: fix build error for freestanding.o
Heinrich Schuchardt [Mon, 11 Mar 2019 21:04:51 +0000 (22:04 +0100)]
efi_loader: fix build error for freestanding.o

Since commit f51a226436a87 ("efi_loader: provide freestanding library") in
parallel builds errors

    lib/efi_selftest/../efi_loader/efi_freestanding.o:
    file not recognized: File truncated

occur. Obviously make cannot correctly sequence parallel builds with a
dependency like ../efi_loader/efi_freestanding.o.

Fixes: f51a226436a87 ("efi_loader: provide freestanding library")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
5 years agoMerge branch 'master' of git://git.denx.de/u-boot-samsung
Tom Rini [Thu, 14 Mar 2019 15:37:11 +0000 (11:37 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-samsung

5 years agoMAINTAINERS: Remove unsupported statuses - Odd Fixes and Obsolete
Krzysztof Kozlowski [Thu, 14 Mar 2019 09:53:10 +0000 (10:53 +0100)]
MAINTAINERS: Remove unsupported statuses - Odd Fixes and Obsolete

The MAINTAINERS file was copied from Linux Kernel along with all its
statuses of maintainership.  However tools/genboardscfg.py accepts only
Maintained, Supported and Orphan.  Remove then the Odd Fixes and
Obsolete from MAINTAINERS file to avoid confusion.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
5 years agoarndale: fix unknown status
Minkyu Kang [Thu, 14 Mar 2019 00:38:41 +0000 (09:38 +0900)]
arndale: fix unknown status

set status to Maintained

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
5 years agoRevert "env: add spi_flash_read_env function"
Heiko Schocher [Wed, 13 Mar 2019 11:15:45 +0000 (12:15 +0100)]
Revert "env: add spi_flash_read_env function"

This reverts commit 9a9d66f5eff0f443de4c2c6ca3e27771ed14b1b4.

because it breaks fw_setenv and U-Boot interworking, if
U-Boot environment is stored in a SPI-NOR.

Reproduce it with:
boot linux with empty Environment and store a variable
with fw_setenv into it, the Environment is now filled
with 0xff:

root@ckey5e:10:8e:~# hexdump -C /dev/mtd4
00000000  e9 e8 07 fa 01 62 6f 6f  74 63 6d 64 3d 72 75 6e  |.....bootcmd=run|
[...]
00000f30  7d 00 75 62 69 62 6f 6f  74 76 6f 6c 3d 32 00 00  |}.ubibootvol=2..|
00000f40  00 ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|

Boot now U-Boot prints:

Loading Environment from SPI Flash... SF: Detected s25fl128l with page size 256 Bytes, erase size 4 KiB, total 16 MiB
*** Warning - bad CRC, using default environment

Reason is the above commit, as it only reads until \0\0
is found, and assumes the rest of the Environment
space is filled with 0x00, which is not the case when
saving an Environment under linux with fw_setenv.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
5 years agoMerge tag 'u-boot-imx-20190313' of git://git.denx.de/u-boot-imx
Tom Rini [Wed, 13 Mar 2019 20:07:41 +0000 (16:07 -0400)]
Merge tag 'u-boot-imx-20190313' of git://git.denx.de/u-boot-imx

Small fixes in several i.MX boards
----------------------------------

- imx8: add pinctrl driveri (mx8m), fix documentation and
  fix reported CPU frequency. Fabio is co-maintainer
- pico-imx6ul: switch to DM
- local fixes for ventana, mx6ul_14x14_evk, engicam,
  imx6(q)_logic, liteboard

5 years agodrivers/net/fec: phy_init: remove redundant logic
Hannes Schmelzer [Fri, 15 Feb 2019 09:30:18 +0000 (10:30 +0100)]
drivers/net/fec: phy_init: remove redundant logic

The phy_connect_dev(...) function from phy.c does all the handling
(inclusive catching fixed-link).

So we drop here the single steps and call just phy_connect_dev(...).

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoMTD: mxs_nand_spl: Redo the way nand_init initializes
Adam Ford [Mon, 18 Feb 2019 23:58:17 +0000 (17:58 -0600)]
MTD: mxs_nand_spl: Redo the way nand_init initializes

Currently the spl system calls nand_init which does nothing.
It isn't until an attempt to load from NAND that it gets initialized.
Subsequent attempts to load just skip the initialization  because
NAND is already initialized.

This moves the contents of mxs_nand_init to nand_init.  In the event
of an error, it clears the number of nand chips found.  Any
attempts to use nand will check if there are nand chips available
instead of actually doing the initialization at that time. If there
are none, it will return an error to the higher level calls.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoarm: dts: imx6qdl-u-boot: Enable spba-bus@2000000 simple bus
Adam Ford [Wed, 20 Feb 2019 14:53:56 +0000 (08:53 -0600)]
arm: dts: imx6qdl-u-boot: Enable spba-bus@2000000 simple bus

spba-bus has a few nodes under it including the UART1 and
some ESPI buses.  In order to use them in SPL, the
u-boot,dm-spl flag needs to be added to the spba-bus@2000000
container.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoimx: serial_mxc: use CONFIG_IS_ENABLED instead of ifdef
Adam Ford [Wed, 20 Feb 2019 04:07:22 +0000 (22:07 -0600)]
imx: serial_mxc: use CONFIG_IS_ENABLED instead of ifdef

Kconfig allows boards to configured with DM_SERIAL and still
have SPL_DM_SERIAL disabled.  This patch changes the ifdef's
to CONFIG_IS_ENABLED to allow the modes to differ between
SPL and U-Boot.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoARM: imx6q_logic: Enable MTD and NAND_MXS_DT
Adam Ford [Sun, 17 Feb 2019 14:56:00 +0000 (08:56 -0600)]
ARM: imx6q_logic: Enable MTD and NAND_MXS_DT

This patch supports enabling MTD, and the corresponding CMD_MTD
along with enabling the MXS NAND Controller with device tree
support.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: imx6_logic: Fix typo in FDT address
Adam Ford [Sat, 16 Feb 2019 20:09:45 +0000 (14:09 -0600)]
ARM: imx6_logic: Fix typo in FDT address

A few scripts reference 'fdt_addr' when they should reference
'fdt_addr_r' so this patch fixes those broken references.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoinclude: configs: imx6-engicam: Add recovery boot option
Shyam Saini [Wed, 6 Feb 2019 07:53:37 +0000 (13:23 +0530)]
include: configs: imx6-engicam: Add recovery boot option

Combined with watchdog board reset mechanism, this can be used as recovery
boot option after bootlimit exceeds the configured value.

Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
5 years agoconfigs: imx6qdl_icore_mmc: Enable watchdog and bootcounter
Shyam Saini [Wed, 6 Feb 2019 07:53:36 +0000 (13:23 +0530)]
configs: imx6qdl_icore_mmc: Enable watchdog and bootcounter

Enable watchdog and bootcounter support on imx6qdl board

Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
5 years agoboard: engicam: Add watchdog support on Engicam
Shyam Saini [Wed, 6 Feb 2019 07:53:35 +0000 (13:23 +0530)]
board: engicam: Add watchdog support on Engicam

This patch adds watchdog support for engicam imx6 family
of boards.

Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
5 years agoimx8qxp: Fix the reported CPU frequency
Fabio Estevam [Tue, 5 Feb 2019 12:43:26 +0000 (10:43 -0200)]
imx8qxp: Fix the reported CPU frequency

Currently the CPU frequency is incorrectly reported:

CPU:   NXP i.MX8QXP RevB A35 at 147228 MHz

Fix this problem by using a direct call to the SCU firmware to
retrieve the Cortex A35 CPU frequency.

With this change applied the CPU frequency is displayed correctly:

CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz

Tested-by: Marcelo Macedo <marcelo.macedo@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Andrejs Cainikovs <andrejs.cainikovs@netmodule.com>
5 years agoimx8mq_evk: Add myself as a co-maintainer
Fabio Estevam [Thu, 28 Feb 2019 11:46:15 +0000 (08:46 -0300)]
imx8mq_evk: Add myself as a co-maintainer

I would like to help maintaining this board.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
5 years agoimx8mq_evk: Move CONFIG_ENV_IS_IN_MMC to Kconfig
Fabio Estevam [Thu, 28 Feb 2019 11:46:14 +0000 (08:46 -0300)]
imx8mq_evk: Move CONFIG_ENV_IS_IN_MMC to Kconfig

Currently the command "saveenv" is not available.

The CONFIG_ENV_IS_IN_MMC symbol has been converted to Kconfig,
so fix the problem by moving it to the defconfig.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
5 years agomx6sabreauto: README: Adjust the binary name after DM conversion
Fabio Estevam [Tue, 26 Feb 2019 12:36:07 +0000 (09:36 -0300)]
mx6sabreauto: README: Adjust the binary name after DM conversion

After the conversion to DM the U-Boot binary is called u-boot-dtb.imx,
so fix the README file accordingly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
5 years agomx6sabresd: README: Adjust the binary name after DM conversion
Fabio Estevam [Tue, 26 Feb 2019 12:36:06 +0000 (09:36 -0300)]
mx6sabresd: README: Adjust the binary name after DM conversion

After the conversion to DM the U-Boot binary is called u-boot-dtb.imx,
so fix the README file accordingly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
5 years agoimx: mx6qsabrelite: Update the SabreLite README
Martyn Welch [Fri, 22 Feb 2019 19:05:48 +0000 (19:05 +0000)]
imx: mx6qsabrelite: Update the SabreLite README

The information in the SabreLite README is inaccurate and sparse. The
upstream U-Boot can boot the SabreLite from SPI-NOR. Additionally, the
freely available imx_loader tool can be easily used to boot a board with a
corrupted SPI, the official Freescale/NXP manufacturing tools are not
required.

Reformat the document, adding a description of how to boot from SPI-NOR
and adding a brief description of how to recover the board should the
SPI-NOR be corrupted using imx_loader.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
5 years agoimx8mq_evk/README: fix DDR training firmware path
Baruch Siach [Thu, 28 Feb 2019 11:51:05 +0000 (13:51 +0200)]
imx8mq_evk/README: fix DDR training firmware path

Remove a redundant directory level.

Reported-by: Ofer Heifetz <ofer.heifetz@valens.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
5 years agoimx8mq_evk/README: add missing firmware extract step
Baruch Siach [Thu, 28 Feb 2019 11:51:04 +0000 (13:51 +0200)]
imx8mq_evk/README: add missing firmware extract step

Tested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
5 years agowarp7: Fix the write to the LDOGCTL PMIC register
Fabio Estevam [Thu, 14 Feb 2019 13:37:51 +0000 (11:37 -0200)]
warp7: Fix the write to the LDOGCTL PMIC register

The third parameter of the pmic_clrsetbits() function is the mask
to the register and the correct mask is 1 not 0.

Since the LDOGCTL only contains a single valid bit (bit 0),
we can use pmic_reg_write() and write 1 directly, which fixes
the problem in a simpler way and use the original pmic function
that was used prior to the DM PMIC conversion.

Fixes: 8ba377321c86 ("arm: imx7s-warp: Convert to DM PMIC")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
5 years agomx6ul_14x14_evk: Simplify the PMIC register writes
Fabio Estevam [Thu, 14 Feb 2019 13:35:46 +0000 (11:35 -0200)]
mx6ul_14x14_evk: Simplify the PMIC register writes

There is no need to store the values written to the PMIC inside the
'reg' variable. Make it simpler by writing the values directly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
5 years agowarp7: Remove unneeded headers after DM conversion
Fabio Estevam [Thu, 14 Feb 2019 12:36:27 +0000 (10:36 -0200)]
warp7: Remove unneeded headers after DM conversion

After DM conversion the I2C and MMC related board codes have been
removed, so remove the corresponding header files as well.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
5 years agowarp7: README: Adjust the binary name after DM conversion
Fabio Estevam [Sat, 9 Feb 2019 14:01:59 +0000 (12:01 -0200)]
warp7: README: Adjust the binary name after DM conversion

After the conversion to DM the U-Boot binary is called u-boot-dtb.imx,
so fix the README file accordingly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
5 years agoimx: ventana: added support for 16bit 8Gb density (1GiB) DRAM
Tim Harvey [Thu, 21 Feb 2019 16:51:16 +0000 (08:51 -0800)]
imx: ventana: added support for 16bit 8Gb density (1GiB) DRAM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
5 years agoimx: ventana: hexdump invalid EEPROM data
Tim Harvey [Thu, 21 Feb 2019 16:48:48 +0000 (08:48 -0800)]
imx: ventana: hexdump invalid EEPROM data

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
5 years agoARM: liteboard: use random ethaddr
Marcin Niestroj [Sat, 19 Jan 2019 16:06:47 +0000 (17:06 +0100)]
ARM: liteboard: use random ethaddr

There is no ethaddr assigned to each board, so we need to use random
value in order to use network.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
5 years agoARM: liteboard: move towards driver model and device-tree boot
Marcin Niestroj [Sat, 19 Jan 2019 16:06:46 +0000 (17:06 +0100)]
ARM: liteboard: move towards driver model and device-tree boot

This patch mostly enables DM drivers in board defconfig and all their
dependencies. Additionally we remove USB code that is on longer
executed after enabling CONFIG_DM_USB. Enable CONFIG_PINCTRL, so we
can get rid of ethernet pin configuration.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
5 years agopico-imx6ul: README: Adjust the binary name after DM conversion
Fabio Estevam [Thu, 14 Feb 2019 12:01:51 +0000 (10:01 -0200)]
pico-imx6ul: README: Adjust the binary name after DM conversion

After the conversion to DM the U-Boot binary is called u-boot-dtb.imx,
so fix the README file accordingly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
5 years agopico-imx6ul: Convert to DM_PMIC
Fabio Estevam [Thu, 14 Feb 2019 12:01:50 +0000 (10:01 -0200)]
pico-imx6ul: Convert to DM_PMIC

Convert to use DM_PMIC for the PFUZE3000. Since this PMIC is
under an I2C bus, conver to DM_I2C as well.

Also, since I2C is not used in SPL, remove CONFIG_SPL_I2C_SUPPORT
to avoid build warnings.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
5 years agopico-imx6ul: Convert to CONFIG_DM_GPIO
Fabio Estevam [Thu, 14 Feb 2019 12:01:49 +0000 (10:01 -0200)]
pico-imx6ul: Convert to CONFIG_DM_GPIO

Convert to CONFIG_DM_GPIO.

Also, DM GPIO requires gpio_request() to be called explicitly before
doing any gpio operation, so do as requested.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
5 years agopico-imx6ul: Convert to DM MMC
Fabio Estevam [Thu, 14 Feb 2019 12:01:48 +0000 (10:01 -0200)]
pico-imx6ul: Convert to DM MMC

Select CONFIG_DM_MMC=y in order to support MMC driver model.

This allows the MMC board related code to be removed.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
5 years agopico-imx6ul: Select CONFIG_OF_CONTROL
Fabio Estevam [Thu, 14 Feb 2019 12:01:47 +0000 (10:01 -0200)]
pico-imx6ul: Select CONFIG_OF_CONTROL

Select CONFIG_OF_CONTROL and the appropriate device tree files
in preparation for converting to driver model.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
5 years agopico-imx6ul: Import dts files from kernel
Fabio Estevam [Thu, 14 Feb 2019 12:01:46 +0000 (10:01 -0200)]
pico-imx6ul: Import dts files from kernel

Import the device tree files from kernel 5.0-rc6 in preparation
for driver model conversion.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
5 years agoimx8mq_evk_defconfig: Enable pinctrl driver
Chris Spencer [Mon, 4 Feb 2019 10:05:34 +0000 (10:05 +0000)]
imx8mq_evk_defconfig: Enable pinctrl driver

The Ethernet controller is not able to initialise correctly without the
pinctrl driver.

This config setting was enabled in the initial version of this file,
but was removed by a savedefconfig resync because the parameter did not
actually exist at that point.

Fixes: 1bac199e8c87 ("configs: Resync with savedefconfig")
Signed-off-by: Chris Spencer <christopher.spencer@sea.co.uk>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
5 years agopinctrl: add imx8m driver
Peng Fan [Mon, 28 Jan 2019 09:43:42 +0000 (09:43 +0000)]
pinctrl: add imx8m driver

Add i.mx8m pinctrl driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 years agoMerge tag 'efi-2019-04-rc4-2' of https://github.com/xypron2/u-boot
Tom Rini [Tue, 12 Mar 2019 14:56:02 +0000 (10:56 -0400)]
Merge tag 'efi-2019-04-rc4-2' of https://github.com/xypron2/u-boot

Pull request for UEFI system for v2019.04-rc4

Fix an error with the serial communication on boards with a very small
UART buffer which leads to a stalled system.

Provide an X86 reset driver for the UEFI runtime.

5 years agoARM: Odroid XU3: Enable driver I2C support for OdroidXU3
Anand Moon [Sun, 24 Feb 2019 12:41:34 +0000 (18:11 +0530)]
ARM: Odroid XU3: Enable driver I2C support for OdroidXU3

This commit enables support for I2C S3C424X0 driver.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Mon, 11 Mar 2019 19:48:57 +0000 (15:48 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

- axp818 fix
- fix warnings for ethernet clock code

5 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Mon, 11 Mar 2019 15:24:20 +0000 (11:24 -0400)]
Merge git://git.denx.de/u-boot-x86

- ACPI changes and fixes to Intel Tangier/Edison
- i8254 beeper fixes

5 years agox86: crownbay: Enable the beeper sound driver
Bin Meng [Tue, 26 Feb 2019 09:52:22 +0000 (01:52 -0800)]
x86: crownbay: Enable the beeper sound driver

Use the i8254 sound driver to support creating simple beeps.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agox86: coreboot: Add the missing pc speaker node in the device tree
Bin Meng [Tue, 26 Feb 2019 09:52:21 +0000 (01:52 -0800)]
x86: coreboot: Add the missing pc speaker node in the device tree

This is currently missing and without it the i8254 beeper driver
won't work.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agox86: Add a dtsi file for the pc speaker
Bin Meng [Tue, 26 Feb 2019 09:52:20 +0000 (01:52 -0800)]
x86: Add a dtsi file for the pc speaker

The pc speaker driven by the i8254 is generic enough to deserve
a single dtsi file to be included by boards that use it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agox86: Make sure i8254 is setup correctly before generating beeps
Bin Meng [Tue, 26 Feb 2019 09:52:19 +0000 (01:52 -0800)]
x86: Make sure i8254 is setup correctly before generating beeps

The i8254 timer control IO port (0x43) should be setup correctly
by using PIT counter 2 to generate beeps, however in U-Boot other
codes like TSC driver utilizes PIT for TSC frequency calibration
and configures the counter 2 to a different mode that does not
beep. Fix this by always ensuring the PIT counter 2 is correctly
initialized so that the i8254 beeper driver works as expected.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoespresso7420: remove duplicated config
Minkyu Kang [Thu, 7 Mar 2019 08:03:03 +0000 (17:03 +0900)]
espresso7420: remove duplicated config

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoarm: exynos: odroid: Fix build if BOARD_TYPES are not set
Krzysztof Kozlowski [Wed, 6 Mar 2019 09:23:09 +0000 (10:23 +0100)]
arm: exynos: odroid: Fix build if BOARD_TYPES are not set

CONFIG_BOARD_TYPES is necessary for Odroid X/X2/U3 boards to detect
proper revision.  However building should succeed even without it.
While moving code around, document also the reference clock selection.

This fixes the build error without CONFIG_BOARD_TYPES:

    board/samsung/odroid/odroid.c: In function 'board_usb_init':
    board/samsung/odroid/odroid.c:473:8: error: 'gd_t' {aka 'volatile struct global_data'} has no member named 'board_type'
      if (gd->board_type == ODROID_TYPE_U3)
            ^~

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoarm: dts: exynos: Adjust whitespace around status property
Krzysztof Kozlowski [Thu, 21 Feb 2019 16:32:00 +0000 (17:32 +0100)]
arm: dts: exynos: Adjust whitespace around status property

Just add spaces around '=' sign for clarity.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoarm: exynos: Remove duplicated "boardname" env setting
Krzysztof Kozlowski [Fri, 22 Feb 2019 18:36:43 +0000 (19:36 +0100)]
arm: exynos: Remove duplicated "boardname" env setting

Various places in the code set "boardname" env property.  It was used
for booting from ITB images and choosing proper DTB file name.  Instead
of duplicating it, use existing U-Boot wide - "board_name".

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoconfigs: odroid_xu3: Unify indentation
Krzysztof Kozlowski [Fri, 22 Feb 2019 18:36:42 +0000 (19:36 +0100)]
configs: odroid_xu3: Unify indentation

File mixed space and tab indentation.  Unify it.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoconfigs: odroid_xu3: Use consistent syntax for #include
Krzysztof Kozlowski [Fri, 22 Feb 2019 18:36:41 +0000 (19:36 +0100)]
configs: odroid_xu3: Use consistent syntax for #include

When including other header from configs, use consistent <> syntax.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoarm: exynos: arndale: Replace Chander Kashyap inactive maintainer
Krzysztof Kozlowski [Fri, 22 Feb 2019 18:36:40 +0000 (19:36 +0100)]
arm: exynos: arndale: Replace Chander Kashyap inactive maintainer

Last activity from Arndale (Exynos5250) board maintainer Chander Kashyap
was in January 2014 (Signed-off).  Recently his samsung.com email
bounces with 550 (5.1.1 Recipient address rejected: User unknown).

Add Krzysztof Kozlowski as odd fixer for this board.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoarm: dts: exynos: Add ramp delay property to LDO regulators to Odroid XU3 family
Krzysztof Kozlowski [Wed, 6 Mar 2019 18:37:57 +0000 (19:37 +0100)]
arm: dts: exynos: Add ramp delay property to LDO regulators to Odroid XU3 family

Add startup time to LDO regulators of S2MPS11 PMIC on Odroid XU3/XU4/HC1
family of boards to be sure the voltage is proper before relying on the
regulator.

The datasheet for all the S2MPS1x family is inconsistent here and does
not specify unambiguously the value of ramp delay for LDO.  It mentions
30 mV/us in one timing diagram but then omits it completely in LDO
regulator characteristics table (it is specified for bucks).

However the vendor kernels for Galaxy S5 and Odroid XU3 use values of 12
mV/us or 24 mV/us.

Without the ramp delay value the consumers do not wait for voltage
settle after changing it.  Although the proper value of ramp delay for
LDOs is unknown, it seems safer to use at least some value from
reference kernel than to leave it unset.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoarm: dts: exynos: Add supply for ADC block to Odroid XU3 family
Krzysztof Kozlowski [Wed, 6 Mar 2019 18:37:56 +0000 (19:37 +0100)]
arm: dts: exynos: Add supply for ADC block to Odroid XU3 family

The ADC block requires VDD supply to be on so provide one.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agopower: regulator: s2mps11: Add enable delay
Krzysztof Kozlowski [Wed, 6 Mar 2019 18:37:55 +0000 (19:37 +0100)]
power: regulator: s2mps11: Add enable delay

According to datasheet, the output on LDO regulators will start
appearing after 10-15 us.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoregulator: Add support for ramp delay
Krzysztof Kozlowski [Wed, 6 Mar 2019 18:37:54 +0000 (19:37 +0100)]
regulator: Add support for ramp delay

Changing voltage and enabling regulator might require delays so the
regulator stabilizes at expected level.

Add support for "regulator-ramp-delay" binding which can introduce
required time to both enabling the regulator and to changing the
voltage.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoarm: exynos: Wait till ADC stabilizes before checking Odroid HC1 revision
Krzysztof Kozlowski [Wed, 6 Mar 2019 18:37:53 +0000 (19:37 +0100)]
arm: exynos: Wait till ADC stabilizes before checking Odroid HC1 revision

Fix detection of Odroid HC1 (Exynos5422) after reboot if kernel disabled
the LDO4/VDD_ADC regulator.

The LDO4 supplies both ADC block and the ADC input AIN9.  Voltage on
AIN9 will rise slowly, so use delay of 5 milliseconds instead of
timers-based loop to wait for voltage stabilization.

First reads on Odroid HC1 return 305, 1207, 1297 and finally 1308
(reference value is 1309).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoarm: exynos: odroid-xu3: Display info late to have proper type
Krzysztof Kozlowski [Wed, 6 Mar 2019 18:37:52 +0000 (19:37 +0100)]
arm: exynos: odroid-xu3: Display info late to have proper type

Printing the "Type" of board requires proper detection of revision which
can happen only late because regulators are needed.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoarm: exynos: Detect revision later, when all resources are ready
Krzysztof Kozlowski [Wed, 6 Mar 2019 18:37:51 +0000 (19:37 +0100)]
arm: exynos: Detect revision later, when all resources are ready

Detection of board revision is done early - before power setup.  In case of
Odroid XU3/XU4/HC1 family, the detection is done using ADC which
is supplied by LDO4/VDD_ADC regulator.  This regulator could be turned
off (e.g. by kernel before reboot).  If ADC is used early, the
regulators are not yet available and the detection won't work.

Split the revision detection out of set_board_type() into separate
function called later - either when displaying board info (in late mode)
or during misc_init_r.  The idea is that set_board_type() will be called
early so its method of detection are limited to flattened device tree
(exynos5-dt-types.c for Exynos5) or GPIO (odroid.c for Exynos4412).  The
newly added set_board_revision() can be called only later, when
resources like regulator are available.

This is necessary to fix the detection of Odroid HC1 after reboot, if
kernel turned off the LDO4 regulator.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agopower: regulator: s2mps11: Fix step for LDO27 and LDO35
Krzysztof Kozlowski [Wed, 6 Mar 2019 18:37:50 +0000 (19:37 +0100)]
power: regulator: s2mps11: Fix step for LDO27 and LDO35

LDO27 and LDO35 have 25 mV step, not 50 mV.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agoadc: exynos-adc: Fix wrong bit operation used to stop the ADC
Krzysztof Kozlowski [Wed, 6 Mar 2019 18:37:49 +0000 (19:37 +0100)]
adc: exynos-adc: Fix wrong bit operation used to stop the ADC

When stopping the ADC_V2_CON1_STC_EN should be cleared.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agox86: Add efi runtime reset
Alexander Graf [Wed, 30 Jan 2019 10:46:34 +0000 (11:46 +0100)]
x86: Add efi runtime reset

Our selftest will soon test the actual runtime reset function rather than
the boot time one. For this, we need to ensure that the runtime version
actually succeeds on x86 to keep our travis tests work.

So this patch implements an x86 runtime reset function. It is missing
shutdown functionality today, but OSs usually implement that via ACPI
and this function does more than the stub from before, so it's at least
an improvement.

Eventually we will want to have full DM functionality in runtime services.
But this fixes a travis failure and doesn't clutter the code too heavily, so
we should pull it in without the amazing new RTS DM framework.

Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: Fix serial console size detection
Matthias Brugger [Tue, 5 Mar 2019 11:50:18 +0000 (12:50 +0100)]
efi_loader: Fix serial console size detection

Function term_read_reply tries to read from the serial console until
the end_char was read. This can hang forever if we are, for some reason,
not able to read the full response (e.g. serial buffer too small,
frame error). This patch moves the timeout detection into
term_read_reply() to assure we will make progress.

Fixes: 6bb591f704 ("efi_loader: query serial console size reliably")
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Throw missing error when an incomplete reply for the cursor position is
received.

Change type of argument of term_get_char() *s32. This renders the function
reusable in efi_cin_read_key().

Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
5 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Sun, 10 Mar 2019 14:16:07 +0000 (10:16 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

- Arria10 DRAM fixes and Gen5 cache fixes

5 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Sun, 10 Mar 2019 14:15:50 +0000 (10:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

- More gen2/gen3 fixes

5 years agox86: edison: Add the rest of UARTs present on board
Andy Shevchenko [Thu, 28 Feb 2019 08:10:07 +0000 (10:10 +0200)]
x86: edison: Add the rest of UARTs present on board

Intel Edison has three UART ports, i.e.
 port 0 - Bluetooth
 port 1 - auxiliary, available for general purpose use
 port 2 - debugging, usually console output is here

Enable all of them for future use.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agox86: edison: Use proper number of serial interface
Andy Shevchenko [Thu, 28 Feb 2019 08:10:06 +0000 (10:10 +0200)]
x86: edison: Use proper number of serial interface

The console is actually serial #2. When we would like to enable other ports,
this would be not okay to mess up with the ordering.

Thus, fix the number of default console interface to be 2.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agox86: acpi: Not every platform has serial console a first device
Andy Shevchenko [Thu, 28 Feb 2019 15:19:54 +0000 (17:19 +0200)]
x86: acpi: Not every platform has serial console a first device

We may not do an assumption that current console device is always a first
of UCLASS_SERIAL one.

For example, on properly described Intel Edison board the console UART
is a third one.

Use current serial device as described in global data.

Fixes: a61cbad78e67 ("dm: serial: Adjust serial_getinfo() to use proper API")
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agox86: acpi: Add DMA descriptors for I2C1 on Intel Tangier
Andy Shevchenko [Tue, 26 Feb 2019 11:43:15 +0000 (13:43 +0200)]
x86: acpi: Add DMA descriptors for I2C1 on Intel Tangier

Intel Tangier SoC has a general purpose DMA which can serve to speed up
communications on SPI and I2C serial buses.

Provide DMA descriptors to utilize this capability in the future.

Note, I2C6, which is available to user, has no DMA request lines connected.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agox86: acpi: Add DMA descriptors for SPI5 on Intel Tangier
Andy Shevchenko [Tue, 26 Feb 2019 11:43:14 +0000 (13:43 +0200)]
x86: acpi: Add DMA descriptors for SPI5 on Intel Tangier

Intel Tangier SoC has a general purpose DMA which can serve to speed up
communications on SPI and I2C serial buses.

Provide DMA descriptors to utilize this capability in the future.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoddr: socfpga: Clean up ddr_setup()
Marek Vasut [Sat, 9 Mar 2019 20:58:09 +0000 (21:58 +0100)]
ddr: socfpga: Clean up ddr_setup()

Replace the current rather convoluted code using ad-hoc polling
mechanism with a more straightforward code. Use wait_for_bit_le32()
to poll the DDRCALSTAT register instead of local reimplementation.
It makes no sense to pull for 5 seconds before giving up and trying
to restart the EMIF, so instead wait 500 mSec for the calibration to
complete and if this fails, restart the EMIF and try again. Perform
this 32 times instead of 3 times as the original code did.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
5 years agoddr: socfpga: Clean up EMIF reset
Marek Vasut [Sat, 9 Mar 2019 20:57:58 +0000 (21:57 +0100)]
ddr: socfpga: Clean up EMIF reset

The EMIF reset code can well use wait_for_bit_le32() instead of all that
convoluted polling code. Reduce the timeout from 100 seconds to 1 second,
since if the EMIF fails to reset itself in 1 second, it's unlikely longer
wait would help. Make sure to clear the EMIF reset request even if the
SEQ2CORE_INT_RESP_BIT isn't asserted.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
5 years agoddr: socfpga: Fix EMIF clear timeout
Marek Vasut [Fri, 8 Mar 2019 18:11:55 +0000 (19:11 +0100)]
ddr: socfpga: Fix EMIF clear timeout

The current EMIF clear timeout handling code was applying bitwise
operations to signed data types and as it was, was extremely hard
to read. Replace it with simple wait_for_bit(). Expand the error
handling to make it more readable too.

This patch also changes the timeout for emif_clear() from 14 hours
to 1 second.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
5 years agoARM: socfpga: Fix A10 SoCDK Kconfig
Marek Vasut [Wed, 6 Mar 2019 19:07:55 +0000 (20:07 +0100)]
ARM: socfpga: Fix A10 SoCDK Kconfig

The Kconfig checked for SoCFPGA Arria10 as a platform, instead of
checking for specific board configuration, which works with one
single platform in tree, but not with multiple. Fix it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
5 years agoARM: socfpga: Fix Arria10 SPI and NAND U-Boot offset
Marek Vasut [Tue, 8 May 2018 16:44:43 +0000 (18:44 +0200)]
ARM: socfpga: Fix Arria10 SPI and NAND U-Boot offset

The SPL size on Gen5 is 4*64kiB, but on A10 it is 4*256kiB.
Handle the difference.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
5 years agoARM: socfpga: Drop CONFIG_SYS_NAND_BAD_BLOCK_POS
Marek Vasut [Tue, 8 May 2018 16:44:00 +0000 (18:44 +0200)]
ARM: socfpga: Drop CONFIG_SYS_NAND_BAD_BLOCK_POS

This is not used anywhere, so drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
5 years agoARM: socfpga: Disable D cache in SPL
Marek Vasut [Tue, 8 May 2018 18:32:01 +0000 (20:32 +0200)]
ARM: socfpga: Disable D cache in SPL

The bootrom seems to leave the D-cache in messed up state, make sure
the SPL disables it so it can not interfere with operation.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
5 years agoddr: socfpga: Fix newline in debug print on A10
Marek Vasut [Wed, 6 Mar 2019 16:18:22 +0000 (17:18 +0100)]
ddr: socfpga: Fix newline in debug print on A10

The debug print is missing a newline, add it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
5 years agoddr: socfpga: Fix IO in Arria10 DDR driver
Marek Vasut [Tue, 5 Mar 2019 17:37:02 +0000 (18:37 +0100)]
ddr: socfpga: Fix IO in Arria10 DDR driver

The Altera Arria10 DDR driver was using constants in a few places
instead of reading registers associated with those constants, fix
this.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
5 years agoARM: socfpga: fix data and tag latency values for pl310 cache controller
Dinh Nguyen [Sun, 3 Mar 2019 17:02:10 +0000 (11:02 -0600)]
ARM: socfpga: fix data and tag latency values for pl310 cache controller

The values for the data and tag latency settings on the PL310 caches
controller is an (n-1). For example, the "arm,tag-latency" is specified
as <1 1 1>, so the values that should be written to register should be
0x000. And for the "arm,data-latency" specified as <2 1 1>, the register
value should be 0x010.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
5 years agoARM: dts: rmobile: Zap redundant USB/SDHI nodes on M3N
Eugeniu Rosca [Sat, 9 Mar 2019 13:04:57 +0000 (14:04 +0100)]
ARM: dts: rmobile: Zap redundant USB/SDHI nodes on M3N

v2019.01 commit cbff9f80cedd ("ARM: dts: rmobile: Sync Gen3 DTs with
Linux 4.19.6") made the sdhi/usb nodes available in r8a77965.dtsi.

Hence, remove the SDHI/USB nodes from r8a77965-u-boot.dtsi. This is
equivalent to partially reverting below v2019.01 commits:
 - f529bc551b6d ("ARM: dts: rmobile: Extract USB nodes on M3N")
 - 830b94f76867 ("ARM: dts: rmobile: Extract SDHI nodes on M3N")

Duplicating the nodes from <soc>.dtsi to <soc>-u-boot.dtsi is obviously:
 - not needed if no U-boot-specific changes are needed in those nodes.
 - potentially dangerous/error-prone, since the duplicated properties
   override the properties originally defined in <soc>.dtsi. One
   possible consequence is that <soc>.dtsi is getting an update from
   Linux, while <soc>-u-boot.dtsi stays unchanged. In this situation,
   the obsolete property values from <soc>-u-boot.dtsi will take
   precedence masking some of the <soc>.dtsi updates, potentially
   leading to all kind of obscure issues.

Below is the dtdiff of r8a77965-salvator-x-u-boot.dtb (the only "user"
of r8a77965-u-boot.dtsi) before and after the patch (slightly
reformatted to avoid 'git am/apply' issues and to reduce the width).

What below output means is there is already a mismatch in some of
SDHI/USB nodes between r8a77965.dtsi and r8a77965-u-boot.dtsi. Since no
U-Boot customization is needed in SDHI/USB DT nodes, get rid of them in
r8a77965-u-boot.dtsi.

$> dtdiff before-r8a77965-salvator-x-u-boot.dtb \
           after-r8a77965-salvator-x-u-boot.dtb
 --- /dev/fd/63  2019-03-09 12:57:40.877963983 +0100
 +++ /dev/fd/62  2019-03-09 12:57:40.877963983 +0100
 @@ -1471,7 +1471,7 @@
        bus-width = <0x4>;
        cd-gpios = <0x51 0xc 0x1>;
        clocks = <0x6 0x1 0x13a>;
 -      compatible = "renesas,sdhi-r8a77965";
 +      compatible = "renesas,sdhi-r8a77965", "renesas,rcar-gen3-sdhi";
        interrupts = <0x0 0xa5 0x4>;
        max-frequency = <0xc65d400>;
        pinctrl-0 = <0x4d>;
 @@ -1492,7 +1492,7 @@

      sd@ee120000 {
        clocks = <0x6 0x1 0x139>;
 -      compatible = "renesas,sdhi-r8a77965";
 +      compatible = "renesas,sdhi-r8a77965", "renesas,rcar-gen3-sdhi";
        interrupts = <0x0 0xa6 0x4>;
        max-frequency = <0xbebc200>;
        power-domains = <0x1 0x20>;
 @@ -1504,7 +1504,7 @@
      sd@ee140000 {
        bus-width = <0x8>;
        clocks = <0x6 0x1 0x138>;
 -      compatible = "renesas,sdhi-r8a77965";
 +      compatible = "renesas,sdhi-r8a77965", "renesas,rcar-gen3-sdhi";
        fixed-emmc-driver-type = <0x1>;
        interrupts = <0x0 0xa7 0x4>;
        max-frequency = <0xbebc200>;
 @@ -1526,7 +1526,7 @@
        bus-width = <0x4>;
        cd-gpios = <0x5a 0xf 0x1>;
        clocks = <0x6 0x1 0x137>;
 -      compatible = "renesas,sdhi-r8a77965";
 +      compatible = "renesas,sdhi-r8a77965", "renesas,rcar-gen3-sdhi";
        interrupts = <0x0 0xa8 0x4>;
        max-frequency = <0xc65d400>;
        pinctrl-0 = <0x56>;
 @@ -1868,14 +1868,14 @@

      usb-phy@ee0a0200 {
        #phy-cells = <0x0>;
 -      clocks = <0x6 0x1 0x2be>;
 +      clocks = <0x6 0x1 0x2bf>;
        compatible = "renesas,usb2-phy-r8a77965", "renesas,rcar-gen3-usb2-phy";
        phandle = <0x47>;
        pinctrl-0 = <0x4c>;
        pinctrl-names = "default";
        power-domains = <0x1 0x20>;
        reg = <0x0 0xee0a0200 0x0 0x700>;
 -      resets = <0x6 0x2be>;
 +      resets = <0x6 0x2bf>;
        status = "okay";
      };

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
5 years agoARM: rmobile: rcar-gen3: Activate bootm_size
Eugeniu Rosca [Tue, 5 Mar 2019 22:13:37 +0000 (23:13 +0100)]
ARM: rmobile: rcar-gen3: Activate bootm_size

v2019.01 commit 07a8060a1277 ("ARM: rmobile: Convert to bootm_size")
attempted converting to bootm_size of 256 MiB below targets:
 - include/configs/alt.h
 - include/configs/gose.h
 - include/configs/koelsch.h
 - include/configs/lager.h
 - include/configs/porter.h
 - include/configs/rcar-gen3-common.h
 - include/configs/silk.h
 - include/configs/stout.h

The update didn't fully work on R-Car3 due to the
CONFIG_SYS_BOOTMAPSZ=8MiB definition left by v2016.09 commit
e525d34b476e ("ARM: rmobile: Add support salvator-x board"),
which is explained in below README excerpt:

----8<----
CONFIG_SYS_BOOTMAPSZ:
                [..] If CONFIG_SYS_BOOTMAPSZ is undefined,
                then the value in "bootm_size" will be used instead.
----8<----

Allow the original commit to accomplish its purpose on R-Car3 targets
by removing the CONFIG_SYS_BOOTMAPSZ definition.

Fixes: 07a8060a1277 ("ARM: rmobile: Convert to bootm_size")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
5 years agoARM: rmobile: Convert Gen2 Stout, Porter, Silk to DM_SPI{,_FLASH}
Marek Vasut [Tue, 19 Feb 2019 04:07:13 +0000 (05:07 +0100)]
ARM: rmobile: Convert Gen2 Stout, Porter, Silk to DM_SPI{,_FLASH}

Enable DM_SPI and DM_SPI_FLASH in U-Boot on H2 Stout, M2W Porter and E3 Silk.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agoARM: dts: rmobile: Force 1-bit bus width on Gen2 QSPI
Marek Vasut [Tue, 19 Feb 2019 04:58:24 +0000 (05:58 +0100)]
ARM: dts: rmobile: Force 1-bit bus width on Gen2 QSPI

U-Boot currently uses Gen2 QSPI in 1-bit mode, enforce it until
we can do better using the new SPI NOR framework.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agoclk: sunxi: h3: Implement EPHY CLK and RESET
Jagan Teki [Wed, 27 Feb 2019 18:56:59 +0000 (00:26 +0530)]
clk: sunxi: h3: Implement EPHY CLK and RESET

EPHY CLK and RESET is available in Allwinner H3 EMAC
via mdio-mux node of internal PHY. Add the respective
clock and reset reg and bits.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoclk: sunxi: Implement EMAC, GMAC clocks, resets
Jagan Teki [Wed, 27 Feb 2019 18:56:57 +0000 (00:26 +0530)]
clk: sunxi: Implement EMAC, GMAC clocks, resets

- Implement EMAC, GMAC clocks via ccu_clk_gate for
  all supported Allwinner SoCs.
- Implement EMAC, GMAC resets via ccu_reset for all
  supported Allwinner SoCs.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoclk: sunxi: Implement A10 EMAC clocks
Jagan Teki [Wed, 27 Feb 2019 18:56:49 +0000 (00:26 +0530)]
clk: sunxi: Implement A10 EMAC clocks

Implement EMAC clocks via ccu_clk_gate for Allwinner A10 SoC.

Which would eventually used in sunxi_emac.c driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agoMerge branch '2019-03-08-master-imports'
Tom Rini [Fri, 8 Mar 2019 23:04:13 +0000 (18:04 -0500)]
Merge branch '2019-03-08-master-imports'

- Assorted minor fixes:
  - ARM: qemu-arm: enable USB boot in distro boot with UEFI
  - image: fdt: handle coalesced reserve region
  - cmd: thordown: Fix spelling of download.
  - fdt: Fix FIT header verification in mkimage and conduct same checks
    as bootm
  - test: Update test-imagetools.sh to match new syntax

5 years agoARM: qemu-arm: enable USB boot in distro boot with UEFI
AKASHI Takahiro [Fri, 14 Dec 2018 09:53:22 +0000 (18:53 +0900)]
ARM: qemu-arm: enable USB boot in distro boot with UEFI

With this patch which adds a removable USB mass storage to a list
of bootable devices, USB boot is supported in distro boot if UEFI is
configured.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>