From f0ac9bebf19001f38afbb93e2dc719a15dfb75e5 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 29 Oct 2013 19:42:22 -0200 Subject: [PATCH] imx-drm: ipuv3-crtc: Invert IPU DI0 clock polarity sig_cfg.clk_pol controls the 'di0_polarity_disp_clk' bit of register IPUx_DI0_GENERAL through the following code in imx-drm/ipu-v3/ipu-di.c: if (!sig->clk_pol) di_gen |= DI_GEN_POLARITY_DISP_CLK; With 'di0_polarity_disp_clk' bit set we do not have stable HDMI output on mx6solo: contours of pictures look jittery and the white colour does not appear really white. Russell King initially reported this problem at: http://www.spinics.net/lists/arm-kernel/msg279805.html Inverting 'di0_polarity_disp_clk' leads to stable HDMI output image. Tested on the following boards: - mx6solowandboard (HDMI output) - mx6qwandboard (HDMI output) - mx6qsabrelite (LVDS) - mx6qsabresd (HDMI output and LVDS) - mx6dlsabresd (HDMI output) - mx53qsb (parallel WVGA display) Reported-by: Russell King Suggested-by: Sascha Hauer Signed-off-by: Fabio Estevam Signed-off-by: Greg Kroah-Hartman --- Reading git-format-patch failed