From e4ecf6ea84d68aea5a9785e89f52672e1e126998 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Philippe=20R=C3=A9tornaz?= Date: Tue, 29 May 2012 11:06:29 +0200 Subject: [PATCH] mfd: mc13xxx workaround SPI hardware bug on i.Mx MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The MC13xxx PMIC is mainly used on i.Mx SoC. On those SoC the SPI hardware will deassert CS line as soon as the SPI FIFO is empty. The MC13xxx hardware is very sensitive to CS line change as it corrupts the transfer if CS is deasserted in the middle of a register read or write. It is not possible to use the CS line as a GPIO on some SoC, so we need to workaround this by implementing a single SPI transfer to access the PMIC. Reviewed-by: Mark Brown Acked-by: Marc Reilly Signed-off-by: Philippe Rétornaz Signed-off-by: Samuel Ortiz --- Reading git-format-patch failed