From e1bc88f1d94f1b34ef0ae27d3c6801a6fdac1f60 Mon Sep 17 00:00:00 2001 From: Aya Mahfouz Date: Wed, 4 Mar 2015 07:34:07 +0200 Subject: [PATCH] staging: rtl8723au: remove extra parentheses around right bit shift operations Removes extra parentheses around bitwise right shift operations. The cases handled here are when resultant values are assigned to variables. The issue was detected and resolved using the following coccinelle script: @@ expression e, e1; constant c; @@ e = -(e1 +e1 >> -c); +c; @@ identifier i; constant c; type t; expression e; @@ t i = -(e +e >> -c); +c; @@ expression e, e1; identifier f; constant c; @@ e1 = f(..., -(e +e >> -c) +c ,...); Signed-off-by: Aya Mahfouz Signed-off-by: Greg Kroah-Hartman --- Reading git-format-patch failed