From bf276d6692f5cd84014491b6da29719773f14659 Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Wed, 17 Mar 2010 21:22:36 -0700 Subject: [PATCH] OMAP3: cpu.h: add SDRC register definitions for second RAM bank --- include/asm/arch-omap3/cpu.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/include/asm/arch-omap3/cpu.h b/include/asm/arch-omap3/cpu.h index bc0ef4b..811ff7d 100644 --- a/include/asm/arch-omap3/cpu.h +++ b/include/asm/arch-omap3/cpu.h @@ -120,14 +120,17 @@ #define WAKEUPPROC BIT26 #define SDRC_MCFG_0 (OMAP34XX_SDRC_BASE+0x80) +#define SDRC_MCFG_1 (OMAP34XX_SDRC_BASE+0xB0) #define SDRC_MR_0 (OMAP34XX_SDRC_BASE+0x84) +#define SDRC_MR_1 (OMAP34XX_SDRC_BASE+0xB4) #define SDRC_ACTIM_CTRLA_0 (OMAP34XX_SDRC_BASE+0x9C) #define SDRC_ACTIM_CTRLB_0 (OMAP34XX_SDRC_BASE+0xA0) #define SDRC_ACTIM_CTRLA_1 (OMAP34XX_SDRC_BASE+0xC4) #define SDRC_ACTIM_CTRLB_1 (OMAP34XX_SDRC_BASE+0xC8) -#define SDRC_RFR_CTRL (OMAP34XX_SDRC_BASE+0xA4) -#define SDRC_RFR_CTRL (OMAP34XX_SDRC_BASE+0xA4) +#define SDRC_RFR_CTRL_0 (OMAP34XX_SDRC_BASE+0xA4) +#define SDRC_RFR_CTRL_1 (OMAP34XX_SDRC_BASE+0xD4) #define SDRC_MANUAL_0 (OMAP34XX_SDRC_BASE+0xA8) +#define SDRC_MANUAL_1 (OMAP34XX_SDRC_BASE+0xD8) #define OMAP34XX_SDRC_CS0 0x80000000 #define OMAP34XX_SDRC_CS1 0xA0000000 #define CMD_NOP 0x0 -- 2.47.2