From b7bdb7f45e7b848dc2eb50c2d5c5106af68562c4 Mon Sep 17 00:00:00 2001 From: Julien CHAUVEAU Date: Fri, 21 Nov 2014 10:27:41 +0100 Subject: [PATCH] clk: rockchip: fix clock gate for rk3188 spdif_pre In rk3188 clock branches, spdif_pre gate was set to RK2928_CLKGATE_CON(13) bit 13. This appears to be a copy-paste error because such a register does not exist. We correct it to RK2928_CLKGATE_CON(0) and find out that the rk3188 spdif clock is the same as the rk3066 spdif clock, so we move it to the common clock branches. Signed-off-by: Julien CHAUVEAU Signed-off-by: Heiko Stuebner --- Reading git-format-patch failed