From a5948fa092a04dfd6b9ee31c99eb6896c158eb08 Mon Sep 17 00:00:00 2001
From: Alexander Graf <agraf@suse.de>
Date: Fri, 25 Apr 2014 16:07:21 +0200
Subject: [PATCH] KVM: PPC: Book3S PR: Emulate TIR register

In parallel to the Processor ID Register (PIR) threaded POWER8 also adds a
Thread ID Register (TIR). Since PR KVM doesn't emulate more than one thread
per core, we can just always expose 0 here.

Signed-off-by: Alexander Graf <agraf@suse.de>
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