From 9d115bb40134284a4e8f6bfc5d8aae219a4e55c3 Mon Sep 17 00:00:00 2001
From: Will Deacon <will.deacon@arm.com>
Date: Wed, 16 Jan 2013 12:01:59 +0000
Subject: [PATCH] ARM: perf: don't pretend to support counting of L1I writes

ARM has a harvard cache architecture and cannot write directly to the
I-side.

This patch removes the L1I write events from the cache map (which
previously returned *read* events in many cases).

Reported-by: Mike Williams <michael.williams@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

Conflicts:

	arch/arm/kernel/perf_event_v7.c
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