From 8d4be7d8bf04f93cfb1512a078bd276efc270793 Mon Sep 17 00:00:00 2001
From: Keerthy <j-keerthy@ti.com>
Date: Wed, 8 Jul 2015 11:12:26 +0530
Subject: [PATCH] ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and
 IRQSTATUS_MPU_2 register offsets

The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded.
This makes it difficult to reuse the code for SoCs like AM437x that have
a single instance of IRQENABLE_MPU and IRQSTATUS_MPU registers.
Hence handling the case using offset of 4 to accommodate single set of IRQ*
registers generically.

Signed-off-by: Keerthy <j-keerthy@ti.com>
[paul@pwsan.com: fixed whitespace alignment problems reported by checkpatch.pl]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
Reading git-format-patch failed