From 7ed36e96fd05470e98e7daf648f9cf7f38609670 Mon Sep 17 00:00:00 2001
From: Jyri Sarha <jsarha@ti.com>
Date: Wed, 3 Sep 2014 15:52:34 +0300
Subject: [PATCH] ASoC: tlv320aic31xx: Choose PLL p divider automatically

This simplifies aic31xx_divs table. There is no more need for p_val or
separate lines for 12 and 24 MHz mclks.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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