From 7e304117a159285ea848ee62bba562c1d0df8cf4 Mon Sep 17 00:00:00 2001 From: Grazvydas Ignotas Date: Wed, 22 Oct 2008 23:05:11 +0300 Subject: [PATCH] Revert "OMAP3 clock: put DPLL into bypass if bypass rate = clk->rate, not hardware rate" This reverts commit 8b1f0bd44fe490ec631230c8c040753a2bda8caa and fixes compile. This revert is to fix EHCI, which dies because of this patch. --- arch/arm/mach-omap2/clock34xx.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index cc43f4f2a547..eeec5f174401 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -272,6 +272,7 @@ static int omap3_noncore_dpll_enable(struct clk *clk) { int r; struct dpll_data *dd; + u32 rate; if (clk == &dpll3_ck) return -EINVAL; @@ -280,7 +281,9 @@ static int omap3_noncore_dpll_enable(struct clk *clk) if (!dd) return -EINVAL; - if (clk->rate == dd->bypass_clk->rate) + rate = omap2_get_dpll_rate(clk); + + if (dd->bypass_clk->rate == rate) r = _omap3_noncore_dpll_bypass(clk); else r = _omap3_noncore_dpll_lock(clk); -- 2.39.5