From 796d1f4cd62500ee55a645f2649b546710b11bd1 Mon Sep 17 00:00:00 2001
From: Tomasz Figa <t.figa@samsung.com>
Date: Tue, 15 Oct 2013 19:41:17 +0200
Subject: [PATCH] clk: samsung: exynos5250: Fix parents of gate clocks from
 GSCL domain

This patch adds mout_aclk266_gscl_sub mux clock and adjusts definitions
of GSCL domain gate clocks to use it as their parent, as specified in
SoC documentation.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Tomasz Figa <t.figa@samsung.com>
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