From 75efba81513133fdd2f9c1ac9213bf86cc622f62 Mon Sep 17 00:00:00 2001
From: =?utf8?q?Krzysztof=20Ha=C5=82asa?= <khalasa@piap.pl>
Date: Tue, 4 Mar 2014 11:50:35 +0100
Subject: [PATCH] CNS3xxx: Fix a WARN() related to IRQ allocation.
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WARNING: at drivers/irqchip/irq-gic.c:952 gic_init_bases+0xe4/0x2b8()
Cannot allocate irq_descs @ IRQ16, assuming pre-allocated
Backtrace:
gic_init_bases    from cns3xxx_init_irq+0x24/0x34
cns3xxx_init_irq  from init_IRQ+0x24/0x2c
init_IRQ          from start_kernel+0x1a8/0x338
start_kernel      from 0x2000806c

The problem is that 64 CNS3xxx CPU interrupts, starting at 32, are
allocated by the ARM platform-independent code (as requested by
machine_desc->nr_irqs = 96), and then the GIC code tries to allocate
them again.

Tested on Gateworks Laguna board, masqueraded as CNS3420VB.

Signed-off-by: Krzysztof Hałasa <khalasa@piap.pl>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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