From 5b83a081a7621e1be033518d771ea9a2ae0de962 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Mon, 8 Sep 2025 13:31:25 +0200 Subject: [PATCH] serial: msm: Re-enable after resetting The documentation for the UART controller in the APQ8016E specifies that both RESET and ENABLE commands must be issued to set up the receiver and transmitter, but at the moment we only issue RESET. This doesn't seem to cause issues in practice (looks like the reset already re-enables the receiver/transmitter), but let's add the two writes to RX_ENABLE/TX_ENABLE to better match the recommendations in the documentation. Reviewed-by: Neil Armstrong Signed-off-by: Stephan Gerhold Tested-by: Alexey Minnekhanov Acked-by: Sumit Garg Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-5-316ed98e0143@linaro.org Signed-off-by: Casey Connolly --- drivers/serial/serial_msm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c index 5523ec4afe1..2c08a84b027 100644 --- a/drivers/serial/serial_msm.c +++ b/drivers/serial/serial_msm.c @@ -50,6 +50,8 @@ #define UARTDM_SR_UART_OVERRUN (1 << 4) /* Receive overrun */ #define UARTDM_CR 0xA8 /* Command register */ +#define UARTDM_CR_RX_ENABLE (1 << 0) /* Enable receiver */ +#define UARTDM_CR_TX_ENABLE (1 << 2) /* Enable transmitter */ #define UARTDM_CR_CMD_RESET_RX (1 << 4) /* Reset receiver */ #define UARTDM_CR_CMD_RESET_TX (2 << 4) /* Reset transmitter */ #define UARTDM_CR_CMD_RESET_ERR (3 << 4) /* Clear overrun error */ @@ -225,6 +227,8 @@ static void uart_dm_init(struct msm_serial_data *priv) writel(UARTDM_CR_CMD_RESET_RX, priv->base + UARTDM_CR); writel(UARTDM_CR_CMD_RESET_TX, priv->base + UARTDM_CR); + writel(UARTDM_CR_RX_ENABLE, priv->base + UARTDM_CR); + writel(UARTDM_CR_TX_ENABLE, priv->base + UARTDM_CR); } static int msm_serial_probe(struct udevice *dev) { -- 2.47.3