From 55af8a91640d362b20f2491336fce128c48f4079 Mon Sep 17 00:00:00 2001 From: Mike Looijmans Date: Wed, 3 Jun 2015 11:25:31 +0100 Subject: [PATCH] ARM: 8387/1: arm/mm/dma-mapping.c: Add arm_coherent_dma_mmap When dma-coherent transfers are enabled, the mmap call must not change the pg_prot flags in the vma struct. Split the arm_dma_mmap into a common and specific parts, and add a "arm_coherent_dma_mmap" implementation that does not alter the page protection flags. Tested on a topic-miami board (Zynq) using the ACP port to transfer data between FPGA and CPU using the Dyplo framework. Without this patch, byte-wise access to mmapped coherent DMA memory was about 20x slower because of the memory being marked as non-cacheable, and transfer speeds would not exceed 240MB/s. After this patch, the mapped memory is cacheable and the transfer speed is again 600MB/s (limited by the FPGA) when the data is in the L2 cache, while data integrity is being maintained. The patch has no effect on non-coherent DMA. Signed-off-by: Mike Looijmans Acked-by: Arnd Bergmann Signed-off-by: Russell King --- Reading git-format-patch failed