From 496a39d9ec238569fac6daceac8f5420c5edc2f1 Mon Sep 17 00:00:00 2001
From: Xiubo Li <Li.Xiubo@freescale.com>
Date: Tue, 31 Dec 2013 15:33:21 +0800
Subject: [PATCH] ASoC: fsl_sai: Fix one bug for hardware limitation.

This is maybe one bug or a limitation of the hardware that the {T,R}CR2's
Synchronous Mode bits must be set as late as possible, or the SAI device
maybe hanged up, and there has not any explaination about this limitation
in the SAI Data Sheet.

And the {T,R}CR2's Synchronous Mode bits must be set at the same time whether
for Tx or Rx stream.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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