From 3ea4807de7b2c5c903380ba2c2e7150bee942f42 Mon Sep 17 00:00:00 2001 From: Marcelo Tosatti Date: Mon, 23 Jan 2006 13:57:06 -0200 Subject: [PATCH] [PATCH] powerpc/8xx: last two 8MB D-TLB entries are incorrectly set The last two 8MB TLB entries are being incorrectly set by initial_mmu on 8xx. The first entry is written with the same virtual/physical address, which renders it invalid: BDI>rms 792 0x00001e00 BDI>rms 824 1 BDI>rds 824 SPR 824 : 0xc08000c0 -1065353024 BDI>rds 825 SPR 825 : 0xc0800de0 -1065349664 BDI>rds 826 SPR 826 : 0x00000000 0 And the second entry, in addition, does not have its TLB index set correctly. Signed-off-by: Marcelo Tosatti Signed-off-by: Paul Mackerras --- Reading git-format-patch failed