From 35faa55cff56441477973e454f62408714f35cd3 Mon Sep 17 00:00:00 2001
From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Thu, 15 Mar 2012 18:42:31 +0100
Subject: [PATCH] spi/fsl-espi: make the clock computation easier to read

The -1 +1 thingy should probably do what DIV_ROUND_UP does. The 4 is 2
the  "platform_clock => sysclock" and 2 from the computation part. The 64
is the same 4 times 16.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Reading git-format-patch failed