From 352ee868dda03ca72e60d4853356881ff161ec23 Mon Sep 17 00:00:00 2001
From: Pavan Kunapuli <pkunapuli@nvidia.com>
Date: Wed, 28 Jan 2015 11:45:16 -0500
Subject: [PATCH] mmc: tegra: Write xfer_mode, CMD regs in together

If there is a gap between xfer mode and command register writes,
tegra SDMMC controller can sometimes issue a spurious command before
the CMD register is written. To avoid this, these two registers need
to be written together in a single write operation.

This is implemented as an NVQUIRK as it applies to T114, T124 and
T132.

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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