From 21fc0ef9652f0c809dc0d3e0a67f1e1bf6ff8255 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Wed, 19 Aug 2015 20:30:15 +0200 Subject: [PATCH] mtd: nand: pxa3xx-nand: fix random command timeouts When 2 commands are submitted in a row, and the second is very quick, the completion of the second command might never come. This happens especially if the second command is quick, such as a status read after an erase. The issue is that in the interrupt handler, the status bits are cleared after the new command is issued. There is a small temporal window where this happens : - the previous command has set the command done bit - the ready for a command bit is set - the handler submits the next command - just then, the command completes, and the command done bit is still set - the handler clears the "previous" command done bit - the handler exits In this flow, the "command done" of the next command will never trigger a new interrupt to finish the status command, as it was cleared for both commands. Fix this by clearing the status bit before submitting a new command. Signed-off-by: Robert Jarzmik Acked-by: Ezequiel Garcia Tested-by: Ezequiel Garcia Signed-off-by: Brian Norris --- Reading git-format-patch failed