From 136ff2a272ad4bee33bf85f8c490ff8a2dd08f96 Mon Sep 17 00:00:00 2001
From: Mark Brown <broonie@opensource.wolfsonmicro.com>
Date: Tue, 20 Apr 2010 12:56:18 +0900
Subject: [PATCH] ASoC: Support FLL input clock selection on WM8994

The WM8994 FLL can be clocked from one of four inputs, the two MCLKs and
the LRCLK and BCLK of the AIF associated with the FLL. Allow all four
inputs to be used rather than defaulting to MCLK1.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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