From 0e9ead048dae55fc8904620944ff9c3ccc7580a1 Mon Sep 17 00:00:00 2001 From: Marcin Juszkiewicz Date: Sat, 14 Oct 2006 17:10:21 +0000 Subject: [PATCH] libaio: add 0.3.106 which build for ARM --- packages/libaio/libaio-0.3.106/.mtn2git_empty | 0 .../libaio/libaio-0.3.106/00_arches.patch | 770 ++++++++++++++++++ packages/libaio/libaio-0.3.106/destdir.patch | 13 + .../libaio-0.3.106/libaio_0.3.106-2.diff.gz | Bin 0 -> 7337 bytes packages/libaio/libaio_0.3.106.bb | 16 + 5 files changed, 799 insertions(+) create mode 100644 packages/libaio/libaio-0.3.106/.mtn2git_empty create mode 100644 packages/libaio/libaio-0.3.106/00_arches.patch create mode 100644 packages/libaio/libaio-0.3.106/destdir.patch create mode 100644 packages/libaio/libaio-0.3.106/libaio_0.3.106-2.diff.gz create mode 100644 packages/libaio/libaio_0.3.106.bb diff --git a/packages/libaio/libaio-0.3.106/.mtn2git_empty b/packages/libaio/libaio-0.3.106/.mtn2git_empty new file mode 100644 index 0000000000..e69de29bb2 diff --git a/packages/libaio/libaio-0.3.106/00_arches.patch b/packages/libaio/libaio-0.3.106/00_arches.patch new file mode 100644 index 0000000000..7e8b569294 --- /dev/null +++ b/packages/libaio/libaio-0.3.106/00_arches.patch @@ -0,0 +1,770 @@ +--- libaio-0.3.106.orig/src/syscall-m68k.h ++++ libaio-0.3.106/src/syscall-m68k.h +@@ -0,0 +1,78 @@ ++#define __NR_io_setup 241 ++#define __NR_io_destroy 242 ++#define __NR_io_getevents 243 ++#define __NR_io_submit 244 ++#define __NR_io_cancel 245 ++ ++#define io_syscall1(type,fname,sname,atype,a) \ ++type fname(atype a) \ ++{ \ ++register long __res __asm__ ("%d0") = __NR_##sname; \ ++register long __a __asm__ ("%d1") = (long)(a); \ ++__asm__ __volatile__ ("trap #0" \ ++ : "+d" (__res) \ ++ : "d" (__a) ); \ ++return (type) __res; \ ++} ++ ++#define io_syscall2(type,fname,sname,atype,a,btype,b) \ ++type fname(atype a,btype b) \ ++{ \ ++register long __res __asm__ ("%d0") = __NR_##sname; \ ++register long __a __asm__ ("%d1") = (long)(a); \ ++register long __b __asm__ ("%d2") = (long)(b); \ ++__asm__ __volatile__ ("trap #0" \ ++ : "+d" (__res) \ ++ : "d" (__a), "d" (__b) \ ++ ); \ ++return (type) __res; \ ++} ++ ++#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \ ++type fname(atype a,btype b,ctype c) \ ++{ \ ++register long __res __asm__ ("%d0") = __NR_##sname; \ ++register long __a __asm__ ("%d1") = (long)(a); \ ++register long __b __asm__ ("%d2") = (long)(b); \ ++register long __c __asm__ ("%d3") = (long)(c); \ ++__asm__ __volatile__ ("trap #0" \ ++ : "+d" (__res) \ ++ : "d" (__a), "d" (__b), \ ++ "d" (__c) \ ++ ); \ ++return (type) __res; \ ++} ++ ++#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \ ++type fname (atype a, btype b, ctype c, dtype d) \ ++{ \ ++register long __res __asm__ ("%d0") = __NR_##sname; \ ++register long __a __asm__ ("%d1") = (long)(a); \ ++register long __b __asm__ ("%d2") = (long)(b); \ ++register long __c __asm__ ("%d3") = (long)(c); \ ++register long __d __asm__ ("%d4") = (long)(d); \ ++__asm__ __volatile__ ("trap #0" \ ++ : "+d" (__res) \ ++ : "d" (__a), "d" (__b), \ ++ "d" (__c), "d" (__d) \ ++ ); \ ++return (type) __res; \ ++} ++ ++#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ ++type fname (atype a,btype b,ctype c,dtype d,etype e) \ ++{ \ ++register long __res __asm__ ("%d0") = __NR_##sname; \ ++register long __a __asm__ ("%d1") = (long)(a); \ ++register long __b __asm__ ("%d2") = (long)(b); \ ++register long __c __asm__ ("%d3") = (long)(c); \ ++register long __d __asm__ ("%d4") = (long)(d); \ ++register long __e __asm__ ("%d5") = (long)(e); \ ++__asm__ __volatile__ ("trap #0" \ ++ : "+d" (__res) \ ++ : "d" (__a), "d" (__b), \ ++ "d" (__c), "d" (__d), "d" (__e) \ ++ ); \ ++return (type) __res; \ ++} ++ +--- libaio-0.3.106.orig/src/syscall-sparc.h ++++ libaio-0.3.106/src/syscall-sparc.h +@@ -0,0 +1,130 @@ ++/* $Id: unistd.h,v 1.74 2002/02/08 03:57:18 davem Exp $ */ ++ ++/* ++ * System calls under the Sparc. ++ * ++ * Don't be scared by the ugly clobbers, it is the only way I can ++ * think of right now to force the arguments into fixed registers ++ * before the trap into the system call with gcc 'asm' statements. ++ * ++ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) ++ * ++ * SunOS compatibility based upon preliminary work which is: ++ * ++ * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu) ++ */ ++ ++ ++#define __NR_io_setup 268 ++#define __NR_io_destroy 269 ++#define __NR_io_submit 270 ++#define __NR_io_cancel 271 ++#define __NR_io_getevents 272 ++ ++ ++#define io_syscall1(type,fname,sname,type1,arg1) \ ++type fname(type1 arg1) \ ++{ \ ++long __res; \ ++register long __g1 __asm__ ("g1") = __NR_##sname; \ ++register long __o0 __asm__ ("o0") = (long)(arg1); \ ++__asm__ __volatile__ ("t 0x10\n\t" \ ++ "bcc 1f\n\t" \ ++ "mov %%o0, %0\n\t" \ ++ "sub %%g0, %%o0, %0\n\t" \ ++ "1:\n\t" \ ++ : "=r" (__res), "=&r" (__o0) \ ++ : "1" (__o0), "r" (__g1) \ ++ : "cc"); \ ++if (__res < -255 || __res >= 0) \ ++ return (type) __res; \ ++return -1; \ ++} ++ ++#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \ ++type fname(type1 arg1,type2 arg2) \ ++{ \ ++long __res; \ ++register long __g1 __asm__ ("g1") = __NR_##sname; \ ++register long __o0 __asm__ ("o0") = (long)(arg1); \ ++register long __o1 __asm__ ("o1") = (long)(arg2); \ ++__asm__ __volatile__ ("t 0x10\n\t" \ ++ "bcc 1f\n\t" \ ++ "mov %%o0, %0\n\t" \ ++ "sub %%g0, %%o0, %0\n\t" \ ++ "1:\n\t" \ ++ : "=r" (__res), "=&r" (__o0) \ ++ : "1" (__o0), "r" (__o1), "r" (__g1) \ ++ : "cc"); \ ++if (__res < -255 || __res >= 0) \ ++ return (type) __res; \ ++return -1; \ ++} ++ ++#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \ ++type fname(type1 arg1,type2 arg2,type3 arg3) \ ++{ \ ++long __res; \ ++register long __g1 __asm__ ("g1") = __NR_##sname; \ ++register long __o0 __asm__ ("o0") = (long)(arg1); \ ++register long __o1 __asm__ ("o1") = (long)(arg2); \ ++register long __o2 __asm__ ("o2") = (long)(arg3); \ ++__asm__ __volatile__ ("t 0x10\n\t" \ ++ "bcc 1f\n\t" \ ++ "mov %%o0, %0\n\t" \ ++ "sub %%g0, %%o0, %0\n\t" \ ++ "1:\n\t" \ ++ : "=r" (__res), "=&r" (__o0) \ ++ : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__g1) \ ++ : "cc"); \ ++if (__res < -255 || __res>=0) \ ++ return (type) __res; \ ++return -1; \ ++} ++ ++#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ ++type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ ++{ \ ++long __res; \ ++register long __g1 __asm__ ("g1") = __NR_##sname; \ ++register long __o0 __asm__ ("o0") = (long)(arg1); \ ++register long __o1 __asm__ ("o1") = (long)(arg2); \ ++register long __o2 __asm__ ("o2") = (long)(arg3); \ ++register long __o3 __asm__ ("o3") = (long)(arg4); \ ++__asm__ __volatile__ ("t 0x10\n\t" \ ++ "bcc 1f\n\t" \ ++ "mov %%o0, %0\n\t" \ ++ "sub %%g0, %%o0, %0\n\t" \ ++ "1:\n\t" \ ++ : "=r" (__res), "=&r" (__o0) \ ++ : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__g1) \ ++ : "cc"); \ ++if (__res < -255 || __res>=0) \ ++ return (type) __res; \ ++return -1; \ ++} ++ ++#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ ++ type5,arg5) \ ++type fname(type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \ ++{ \ ++long __res; \ ++register long __g1 __asm__ ("g1") = __NR_##sname; \ ++register long __o0 __asm__ ("o0") = (long)(arg1); \ ++register long __o1 __asm__ ("o1") = (long)(arg2); \ ++register long __o2 __asm__ ("o2") = (long)(arg3); \ ++register long __o3 __asm__ ("o3") = (long)(arg4); \ ++register long __o4 __asm__ ("o4") = (long)(arg5); \ ++__asm__ __volatile__ ("t 0x10\n\t" \ ++ "bcc 1f\n\t" \ ++ "mov %%o0, %0\n\t" \ ++ "sub %%g0, %%o0, %0\n\t" \ ++ "1:\n\t" \ ++ : "=r" (__res), "=&r" (__o0) \ ++ : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__o4), "r" (__g1) \ ++ : "cc"); \ ++if (__res < -255 || __res>=0) \ ++ return (type) __res; \ ++return -1; \ ++} ++ +--- libaio-0.3.106.orig/src/syscall.h ++++ libaio-0.3.106/src/syscall.h +@@ -22,6 +22,16 @@ + #include "syscall-s390.h" + #elif defined(__alpha__) + #include "syscall-alpha.h" ++#elif defined(__arm__) ++#include "syscall-arm.h" ++#elif defined(__m68k__) ++#include "syscall-m68k.h" ++#elif defined(__sparc__) ++#include "syscall-sparc.h" ++#elif defined(__hppa__) ++#include "syscall-parisc.h" ++#elif defined(__mips__) ++#include "syscall-mips.h" + #else + #error "add syscall-arch.h" + #endif +--- libaio-0.3.106.orig/src/syscall-mips.h ++++ libaio-0.3.106/src/syscall-mips.h +@@ -0,0 +1,223 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle ++ * Copyright (C) 1999, 2000 Silicon Graphics, Inc. ++ * ++ * Changed system calls macros _syscall5 - _syscall7 to push args 5 to 7 onto ++ * the stack. Robin Farine for ACN S.A, Copyright (C) 1996 by ACN S.A ++ */ ++ ++#ifndef _MIPS_SIM_ABI32 ++#define _MIPS_SIM_ABI32 1 ++#define _MIPS_SIM_NABI32 2 ++#define _MIPS_SIM_ABI64 3 ++#endif ++ ++#if _MIPS_SIM == _MIPS_SIM_ABI32 ++ ++/* ++ * Linux o32 style syscalls are in the range from 4000 to 4999. ++ */ ++#define __NR_Linux 4000 ++#define __NR_io_setup (__NR_Linux + 241) ++#define __NR_io_destroy (__NR_Linux + 242) ++#define __NR_io_getevents (__NR_Linux + 243) ++#define __NR_io_submit (__NR_Linux + 244) ++#define __NR_io_cancel (__NR_Linux + 245) ++ ++#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ ++ ++#if _MIPS_SIM == _MIPS_SIM_ABI64 ++ ++/* ++ * Linux 64-bit syscalls are in the range from 5000 to 5999. ++ */ ++#define __NR_Linux 5000 ++#define __NR_io_setup (__NR_Linux + 200) ++#define __NR_io_destroy (__NR_Linux + 201) ++#define __NR_io_getevents (__NR_Linux + 202) ++#define __NR_io_submit (__NR_Linux + 203) ++#define __NR_io_cancel (__NR_Linux + 204) ++#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ ++ ++#if _MIPS_SIM == _MIPS_SIM_NABI32 ++ ++/* ++ * Linux N32 syscalls are in the range from 6000 to 6999. ++ */ ++#define __NR_Linux 6000 ++#define __NR_io_setup (__NR_Linux + 200) ++#define __NR_io_destroy (__NR_Linux + 201) ++#define __NR_io_getevents (__NR_Linux + 202) ++#define __NR_io_submit (__NR_Linux + 203) ++#define __NR_io_cancel (__NR_Linux + 204) ++#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ ++ ++#define io_syscall1(type,fname,sname,atype,a) \ ++type fname(atype a) \ ++{ \ ++ register unsigned long __a0 asm("$4") = (unsigned long) a; \ ++ register unsigned long __a3 asm("$7"); \ ++ unsigned long __v0; \ ++ \ ++ __asm__ volatile ( \ ++ ".set\tnoreorder\n\t" \ ++ "li\t$2, %3\t\t\t# " #fname "\n\t" \ ++ "syscall\n\t" \ ++ "move\t%0, $2\n\t" \ ++ ".set\treorder" \ ++ : "=&r" (__v0), "=r" (__a3) \ ++ : "r" (__a0), "i" (__NR_##sname) \ ++ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ ++ "memory"); \ ++ \ ++ if (__a3 == 0) \ ++ return (type) __v0; \ ++ return (type) -1; \ ++} ++ ++#define io_syscall2(type,fname,sname,atype,a,btype,b) \ ++type fname(atype a, btype b) \ ++{ \ ++ register unsigned long __a0 asm("$4") = (unsigned long) a; \ ++ register unsigned long __a1 asm("$5") = (unsigned long) b; \ ++ register unsigned long __a3 asm("$7"); \ ++ unsigned long __v0; \ ++ \ ++ __asm__ volatile ( \ ++ ".set\tnoreorder\n\t" \ ++ "li\t$2, %4\t\t\t# " #fname "\n\t" \ ++ "syscall\n\t" \ ++ "move\t%0, $2\n\t" \ ++ ".set\treorder" \ ++ : "=&r" (__v0), "=r" (__a3) \ ++ : "r" (__a0), "r" (__a1), "i" (__NR_##sname) \ ++ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ ++ "memory"); \ ++ \ ++ if (__a3 == 0) \ ++ return (type) __v0; \ ++ return (type) -1; \ ++} ++ ++#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \ ++type fname(atype a, btype b, ctype c) \ ++{ \ ++ register unsigned long __a0 asm("$4") = (unsigned long) a; \ ++ register unsigned long __a1 asm("$5") = (unsigned long) b; \ ++ register unsigned long __a2 asm("$6") = (unsigned long) c; \ ++ register unsigned long __a3 asm("$7"); \ ++ unsigned long __v0; \ ++ \ ++ __asm__ volatile ( \ ++ ".set\tnoreorder\n\t" \ ++ "li\t$2, %5\t\t\t# " #fname "\n\t" \ ++ "syscall\n\t" \ ++ "move\t%0, $2\n\t" \ ++ ".set\treorder" \ ++ : "=&r" (__v0), "=r" (__a3) \ ++ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \ ++ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ ++ "memory"); \ ++ \ ++ if (__a3 == 0) \ ++ return (type) __v0; \ ++ return (type) -1; \ ++} ++ ++#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \ ++type fname(atype a, btype b, ctype c, dtype d) \ ++{ \ ++ register unsigned long __a0 asm("$4") = (unsigned long) a; \ ++ register unsigned long __a1 asm("$5") = (unsigned long) b; \ ++ register unsigned long __a2 asm("$6") = (unsigned long) c; \ ++ register unsigned long __a3 asm("$7") = (unsigned long) d; \ ++ unsigned long __v0; \ ++ \ ++ __asm__ volatile ( \ ++ ".set\tnoreorder\n\t" \ ++ "li\t$2, %5\t\t\t# " #fname "\n\t" \ ++ "syscall\n\t" \ ++ "move\t%0, $2\n\t" \ ++ ".set\treorder" \ ++ : "=&r" (__v0), "+r" (__a3) \ ++ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \ ++ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ ++ "memory"); \ ++ \ ++ if (__a3 == 0) \ ++ return (type) __v0; \ ++ return (type) -1; \ ++} ++ ++#if (_MIPS_SIM == _MIPS_SIM_ABI32) ++ ++/* ++ * Using those means your brain needs more than an oil change ;-) ++ */ ++ ++#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ ++type fname(atype a, btype b, ctype c, dtype d, etype e) \ ++{ \ ++ register unsigned long __a0 asm("$4") = (unsigned long) a; \ ++ register unsigned long __a1 asm("$5") = (unsigned long) b; \ ++ register unsigned long __a2 asm("$6") = (unsigned long) c; \ ++ register unsigned long __a3 asm("$7") = (unsigned long) d; \ ++ unsigned long __v0; \ ++ \ ++ __asm__ volatile ( \ ++ ".set\tnoreorder\n\t" \ ++ "lw\t$2, %6\n\t" \ ++ "subu\t$29, 32\n\t" \ ++ "sw\t$2, 16($29)\n\t" \ ++ "li\t$2, %5\t\t\t# " #fname "\n\t" \ ++ "syscall\n\t" \ ++ "move\t%0, $2\n\t" \ ++ "addiu\t$29, 32\n\t" \ ++ ".set\treorder" \ ++ : "=&r" (__v0), "+r" (__a3) \ ++ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname), \ ++ "m" ((unsigned long)e) \ ++ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ ++ "memory"); \ ++ \ ++ if (__a3 == 0) \ ++ return (type) __v0; \ ++ return (type) -1; \ ++} ++ ++#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */ ++ ++#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) ++ ++#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ ++type fname (atype a,btype b,ctype c,dtype d,etype e) \ ++{ \ ++ register unsigned long __a0 asm("$4") = (unsigned long) a; \ ++ register unsigned long __a1 asm("$5") = (unsigned long) b; \ ++ register unsigned long __a2 asm("$6") = (unsigned long) c; \ ++ register unsigned long __a3 asm("$7") = (unsigned long) d; \ ++ register unsigned long __a4 asm("$8") = (unsigned long) e; \ ++ unsigned long __v0; \ ++ \ ++ __asm__ volatile ( \ ++ ".set\tnoreorder\n\t" \ ++ "li\t$2, %6\t\t\t# " #fname "\n\t" \ ++ "syscall\n\t" \ ++ "move\t%0, $2\n\t" \ ++ ".set\treorder" \ ++ : "=&r" (__v0), "+r" (__a3) \ ++ : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##sname) \ ++ : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ ++ "memory"); \ ++ \ ++ if (__a3 == 0) \ ++ return (type) __v0; \ ++ return (type) -1; \ ++} ++ ++#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */ ++ +--- libaio-0.3.106.orig/src/libaio.h ++++ libaio-0.3.106/src/libaio.h +@@ -72,6 +72,40 @@ + #define PADDED(x, y) unsigned y; x + #define PADDEDptr(x, y) unsigned y; x + #define PADDEDul(x, y) unsigned y; unsigned long x ++#elif defined(__arm__) ++# if defined (__ARMEB__) /* big endian, 32 bits */ ++#define PADDED(x, y) unsigned y; x ++#define PADDEDptr(x, y) unsigned y; x ++#define PADDEDul(x, y) unsigned y; unsigned long x ++# else /* little endian, 32 bits */ ++#define PADDED(x, y) x; unsigned y ++#define PADDEDptr(x, y) x; unsigned y ++#define PADDEDul(x, y) unsigned long x; unsigned y ++# endif ++#elif defined(__m68k__) /* big endian, 32 bits */ ++#define PADDED(x, y) unsigned y; x ++#define PADDEDptr(x, y) unsigned y; x ++#define PADDEDul(x, y) unsigned y; unsigned long x ++#elif defined(__sparc__) /* big endian, 32 bits */ ++#define PADDED(x, y) unsigned y; x ++#define PADDEDptr(x, y) unsigned y; x ++#define PADDEDul(x, y) unsigned y; unsigned long x ++#elif defined(__hppa__) /* big endian, 32 bits */ ++#define PADDED(x, y) unsigned y; x ++#define PADDEDptr(x, y) unsigned y; x ++#define PADDEDul(x, y) unsigned y; unsigned long x ++#elif defined(__mips__) ++# if defined (__MIPSEB__) /* big endian, 32 bits */ ++#define PADDED(x, y) unsigned y; x ++#define PADDEDptr(x, y) unsigned y; x ++#define PADDEDul(x, y) unsigned y; unsigned long x ++# elif defined(__MIPSEL__) /* little endian, 32 bits */ ++#define PADDED(x, y) x; unsigned y ++#define PADDEDptr(x, y) x; unsigned y ++#define PADDEDul(x, y) unsigned long x; unsigned y ++# else ++# error "neither mipseb nor mipsel?" ++# endif + #else + #error endian? + #endif +--- libaio-0.3.106.orig/src/syscall-parisc.h ++++ libaio-0.3.106/src/syscall-parisc.h +@@ -0,0 +1,146 @@ ++/* ++ * Linux system call numbers. ++ * ++ * Cary Coutant says that we should just use another syscall gateway ++ * page to avoid clashing with the HPUX space, and I think he's right: ++ * it will would keep a branch out of our syscall entry path, at the ++ * very least. If we decide to change it later, we can ``just'' tweak ++ * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be ++ * 1024 or something. Oh, and recompile libc. =) ++ * ++ * 64-bit HPUX binaries get the syscall gateway address passed in a register ++ * from the kernel at startup, which seems a sane strategy. ++ */ ++ ++#define __NR_Linux 0 ++#define __NR_io_setup (__NR_Linux + 215) ++#define __NR_io_destroy (__NR_Linux + 216) ++#define __NR_io_getevents (__NR_Linux + 217) ++#define __NR_io_submit (__NR_Linux + 218) ++#define __NR_io_cancel (__NR_Linux + 219) ++ ++#define SYS_ify(syscall_name) __NR_##syscall_name ++ ++/* Assume all syscalls are done from PIC code just to be ++ * safe. The worst case scenario is that you lose a register ++ * and save/restore r19 across the syscall. */ ++#define PIC ++ ++/* Definition taken from glibc 2.3.3 ++ * sysdeps/unix/sysv/linux/hppa/sysdep.h ++ */ ++ ++#ifdef PIC ++/* WARNING: CANNOT BE USED IN A NOP! */ ++# define K_STW_ASM_PIC " copy %%r19, %%r4\n" ++# define K_LDW_ASM_PIC " copy %%r4, %%r19\n" ++# define K_USING_GR4 "%r4", ++#else ++# define K_STW_ASM_PIC " \n" ++# define K_LDW_ASM_PIC " \n" ++# define K_USING_GR4 ++#endif ++ ++/* GCC has to be warned that a syscall may clobber all the ABI ++ registers listed as "caller-saves", see page 8, Table 2 ++ in section 2.2.6 of the PA-RISC RUN-TIME architecture ++ document. However! r28 is the result and will conflict with ++ the clobber list so it is left out. Also the input arguments ++ registers r20 -> r26 will conflict with the list so they ++ are treated specially. Although r19 is clobbered by the syscall ++ we cannot say this because it would violate ABI, thus we say ++ r4 is clobbered and use that register to save/restore r19 ++ across the syscall. */ ++ ++#define K_CALL_CLOB_REGS "%r1", "%r2", K_USING_GR4 \ ++ "%r20", "%r29", "%r31" ++ ++#undef K_INLINE_SYSCALL ++#define K_INLINE_SYSCALL(name, nr, args...) ({ \ ++ long __sys_res; \ ++ { \ ++ register unsigned long __res __asm__("r28"); \ ++ K_LOAD_ARGS_##nr(args) \ ++ /* FIXME: HACK stw/ldw r19 around syscall */ \ ++ __asm__ volatile( \ ++ K_STW_ASM_PIC \ ++ " ble 0x100(%%sr2, %%r0)\n" \ ++ " ldi %1, %%r20\n" \ ++ K_LDW_ASM_PIC \ ++ : "=r" (__res) \ ++ : "i" (SYS_ify(name)) K_ASM_ARGS_##nr \ ++ : "memory", K_CALL_CLOB_REGS K_CLOB_ARGS_##nr \ ++ ); \ ++ __sys_res = (long)__res; \ ++ } \ ++ __sys_res; \ ++}) ++ ++#define K_LOAD_ARGS_0() ++#define K_LOAD_ARGS_1(r26) \ ++ register unsigned long __r26 __asm__("r26") = (unsigned long)(r26); \ ++ K_LOAD_ARGS_0() ++#define K_LOAD_ARGS_2(r26,r25) \ ++ register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \ ++ K_LOAD_ARGS_1(r26) ++#define K_LOAD_ARGS_3(r26,r25,r24) \ ++ register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \ ++ K_LOAD_ARGS_2(r26,r25) ++#define K_LOAD_ARGS_4(r26,r25,r24,r23) \ ++ register unsigned long __r23 __asm__("r23") = (unsigned long)(r23); \ ++ K_LOAD_ARGS_3(r26,r25,r24) ++#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \ ++ register unsigned long __r22 __asm__("r22") = (unsigned long)(r22); \ ++ K_LOAD_ARGS_4(r26,r25,r24,r23) ++#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \ ++ register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \ ++ K_LOAD_ARGS_5(r26,r25,r24,r23,r22) ++ ++/* Even with zero args we use r20 for the syscall number */ ++#define K_ASM_ARGS_0 ++#define K_ASM_ARGS_1 K_ASM_ARGS_0, "r" (__r26) ++#define K_ASM_ARGS_2 K_ASM_ARGS_1, "r" (__r25) ++#define K_ASM_ARGS_3 K_ASM_ARGS_2, "r" (__r24) ++#define K_ASM_ARGS_4 K_ASM_ARGS_3, "r" (__r23) ++#define K_ASM_ARGS_5 K_ASM_ARGS_4, "r" (__r22) ++#define K_ASM_ARGS_6 K_ASM_ARGS_5, "r" (__r21) ++ ++/* The registers not listed as inputs but clobbered */ ++#define K_CLOB_ARGS_6 ++#define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21" ++#define K_CLOB_ARGS_4 K_CLOB_ARGS_5, "%r22" ++#define K_CLOB_ARGS_3 K_CLOB_ARGS_4, "%r23" ++#define K_CLOB_ARGS_2 K_CLOB_ARGS_3, "%r24" ++#define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25" ++#define K_CLOB_ARGS_0 K_CLOB_ARGS_1, "%r26" ++ ++#define io_syscall1(type,fname,sname,type1,arg1) \ ++type fname(type1 arg1) \ ++{ \ ++ return K_INLINE_SYSCALL(sname, 1, arg1); \ ++} ++ ++#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \ ++type fname(type1 arg1, type2 arg2) \ ++{ \ ++ return K_INLINE_SYSCALL(sname, 2, arg1, arg2); \ ++} ++ ++#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \ ++type fname(type1 arg1, type2 arg2, type3 arg3) \ ++{ \ ++ return K_INLINE_SYSCALL(sname, 3, arg1, arg2, arg3); \ ++} ++ ++#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ ++type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ ++{ \ ++ return K_INLINE_SYSCALL(sname, 4, arg1, arg2, arg3, arg4); \ ++} ++ ++#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ ++type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ ++{ \ ++ return K_INLINE_SYSCALL(sname, 5, arg1, arg2, arg3, arg4, arg5); \ ++} ++ +--- libaio-0.3.106.orig/src/syscall-arm.h ++++ libaio-0.3.106/src/syscall-arm.h +@@ -0,0 +1,116 @@ ++/* ++ * linux/include/asm-arm/unistd.h ++ * ++ * Copyright (C) 2001-2005 Russell King ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Please forward _all_ changes to this file to rmk@arm.linux.org.uk, ++ * no matter what the change is. Thanks! ++ */ ++ ++#define __NR_OABI_SYSCALL_BASE 0x900000 ++ ++#if defined(__thumb__) || defined(__ARM_EABI__) ++#define __NR_SYSCALL_BASE 0 ++#else ++#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE ++#endif ++ ++#define __NR_io_setup (__NR_SYSCALL_BASE+243) ++#define __NR_io_destroy (__NR_SYSCALL_BASE+244) ++#define __NR_io_getevents (__NR_SYSCALL_BASE+245) ++#define __NR_io_submit (__NR_SYSCALL_BASE+246) ++#define __NR_io_cancel (__NR_SYSCALL_BASE+247) ++ ++#define __sys2(x) #x ++#define __sys1(x) __sys2(x) ++ ++#if defined(__thumb__) || defined(__ARM_EABI__) ++#define __SYS_REG(name) register long __sysreg __asm__("r7") = __NR_##name; ++#define __SYS_REG_LIST(regs...) "r" (__sysreg) , ##regs ++#define __syscall(name) "swi\t0" ++#else ++#define __SYS_REG(name) ++#define __SYS_REG_LIST(regs...) regs ++#define __syscall(name) "swi\t" __sys1(__NR_##name) "" ++#endif ++ ++#define io_syscall1(type,fname,sname,type1,arg1) \ ++type fname(type1 arg1) { \ ++ __SYS_REG(sname) \ ++ register long __r0 __asm__("r0") = (long)arg1; \ ++ register long __res_r0 __asm__("r0"); \ ++ __asm__ __volatile__ ( \ ++ __syscall(sname) \ ++ : "=r" (__res_r0) \ ++ : __SYS_REG_LIST( "0" (__r0) ) \ ++ : "memory" ); \ ++ return (type) __res_r0; \ ++} ++ ++#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \ ++type fname(type1 arg1,type2 arg2) { \ ++ __SYS_REG(sname) \ ++ register long __r0 __asm__("r0") = (long)arg1; \ ++ register long __r1 __asm__("r1") = (long)arg2; \ ++ register long __res_r0 __asm__("r0"); \ ++ __asm__ __volatile__ ( \ ++ __syscall(sname) \ ++ : "=r" (__res_r0) \ ++ : __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) \ ++ : "memory" ); \ ++ return (type) __res_r0; \ ++} ++ ++#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \ ++type fname(type1 arg1,type2 arg2,type3 arg3) { \ ++ __SYS_REG(sname) \ ++ register long __r0 __asm__("r0") = (long)arg1; \ ++ register long __r1 __asm__("r1") = (long)arg2; \ ++ register long __r2 __asm__("r2") = (long)arg3; \ ++ register long __res_r0 __asm__("r0"); \ ++ __asm__ __volatile__ ( \ ++ __syscall(sname) \ ++ : "=r" (__res_r0) \ ++ : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) \ ++ : "memory" ); \ ++ return (type) __res_r0; \ ++} ++ ++#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\ ++type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \ ++ __SYS_REG(sname) \ ++ register long __r0 __asm__("r0") = (long)arg1; \ ++ register long __r1 __asm__("r1") = (long)arg2; \ ++ register long __r2 __asm__("r2") = (long)arg3; \ ++ register long __r3 __asm__("r3") = (long)arg4; \ ++ register long __res_r0 __asm__("r0"); \ ++ __asm__ __volatile__ ( \ ++ __syscall(sname) \ ++ : "=r" (__res_r0) \ ++ : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) \ ++ : "memory" ); \ ++ return (type) __res_r0; \ ++} ++ ++#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ ++type ffname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) {\ ++ __SYS_REG(sname) \ ++ register long __r0 __asm__("r0") = (long)arg1; \ ++ register long __r1 __asm__("r1") = (long)arg2; \ ++ register long __r2 __asm__("r2") = (long)arg3; \ ++ register long __r3 __asm__("r3") = (long)arg4; \ ++ register long __r4 __asm__("r4") = (long)arg5; \ ++ register long __res_r0 __asm__("r0"); \ ++ __asm__ __volatile__ ( \ ++ __syscall(sname) \ ++ : "=r" (__res_r0) \ ++ : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \ ++ "r" (__r3), "r" (__r4) ) \ ++ : "memory" ); \ ++ return (type) __res_r0; \ ++} ++ diff --git a/packages/libaio/libaio-0.3.106/destdir.patch b/packages/libaio/libaio-0.3.106/destdir.patch new file mode 100644 index 0000000000..3246f095c8 --- /dev/null +++ b/packages/libaio/libaio-0.3.106/destdir.patch @@ -0,0 +1,13 @@ +Index: libaio-0.3.106/Makefile +=================================================================== +--- libaio-0.3.106.orig/Makefile 2004-02-26 07:25:10.000000000 -0800 ++++ libaio-0.3.106/Makefile 2006-10-14 09:19:07.000000000 -0700 +@@ -15,7 +15,7 @@ + @$(MAKE) -C src + + install: +- @$(MAKE) -C src install prefix=$(prefix) includedir=$(includedir) libdir=$(libdir) ++ @$(MAKE) -C src install prefix=$(DESTDIR)$(prefix) includedir=$(DESTDIR)$(includedir) libdir=$(DESTDIR)$(libdir) + + + clean: diff --git a/packages/libaio/libaio-0.3.106/libaio_0.3.106-2.diff.gz b/packages/libaio/libaio-0.3.106/libaio_0.3.106-2.diff.gz new file mode 100644 index 0000000000000000000000000000000000000000..37a82afe9a879862442aa40145639df6a6a9d92f GIT binary patch literal 7337 zcmV;a99H8WiwFR(6c0rL1MEEcd)i2{KihvrElD;e2!X_5n~Z0Jk2vi5`i%Xu`JUg$ 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a/packages/libaio/libaio_0.3.106.bb b/packages/libaio/libaio_0.3.106.bb new file mode 100644 index 0000000000..edbc125180 --- /dev/null +++ b/packages/libaio/libaio_0.3.106.bb @@ -0,0 +1,16 @@ +DESCRIPTION="Asynchronous input/output library that uses the kernels native interface" +LICENSE = "LGPL" + +SRC_URI = "${DEBIAN_MIRROR}/main/liba/libaio/libaio_${PV}.orig.tar.gz \ + file://00_arches.patch;patch=1 \ + file://destdir.patch;patch=1" + +do_stage() { + install -d ${STAGING_INCDIR} ${STAGING_LIBDIR} + install -m 0644 src/libaio.h ${STAGING_INCDIR} + oe_libinstall -so -C src libaio ${STAGING_LIBDIR} +} + +do_install () { + oe_runmake install DESTDIR=${D} +} -- 2.39.5