usb: host: ehci-msm: Drop redundant EHCI register writes

ehci_unregister() already clears the CMD_RUN bit with more careful checks.
It also ensures that we only do this in case we were actually in USB host
(rather than USB device) mode. It's not clear what the extra register
writes in the Qualcomm-specific ehci-msm driver are supposed to do, so just
drop them.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Tested-by: Sam Day <me@samcday.com>
Link: https://patch.msgid.link/20250407-ehci-msm-fixes-v1-5-f8b30eb05d07@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>

usb: host: ehci-msm: Use clk bulk helpers

The enable order for the clocks does not matter much, we just need to
enable all the USB clocks. Use the clk bulk helpers to simplify the code.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Tested-by: Sam Day <me@samcday.com>
Link: https://patch.msgid.link/20250407-ehci-msm-fixes-v1-4-f8b30eb05d07@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>

usb: host: ehci-msm: Disable clocks after all register accesses

We need the USB clocks to do accesses like
  wait_for_bit_le32(&ehci->usbcmd, CMD_RESET, ...)
so we should disable them only after all of them are done.

At the moment this works only because the clock driver doesn't actually
disabling these clocks in U-Boot.

Fixes: 9b3a9f896e66 ("ehci: msm: bring up iface + core clocks")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Tested-by: Sam Day <me@samcday.com>
Link: https://patch.msgid.link/20250407-ehci-msm-fixes-v1-3-f8b30eb05d07@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>

usb: host: echi-msm: Drop ulpi definitions

These are unused.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Tested-by: Sam Day <me@samcday.com>
Link: https://patch.msgid.link/20250407-ehci-msm-fixes-v1-2-f8b30eb05d07@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>

usb: host: ehci-msm: Fix pointer check

dev_read_addr_ptr() returns a null pointer on error, not FDT_ADDR_T_NONE.

Fixes: 2be1130a9305 ("usb: ehci-msm: Use dev interface to get device address")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Tested-by: Sam Day <me@samcday.com>
Link: https://patch.msgid.link/20250407-ehci-msm-fixes-v1-1-f8b30eb05d07@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>

configs: qcom_*: enable QCOM_GENI where needed

Enable the GENI MISC driver which is required for many Qualcomm
platforms.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-8-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

serial: msm-geni: implement firmware loading

Teach the GENI UART driver to load firmware, similar to i2c.

This is primarily intended for non-debug UARTs, but since we don't
support using these as the console we abort probe for now.

Remove duplicated register macros that are in the common geni-se header.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-7-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

serial: msm-geni: Enable SE clk in probe

Enable the serial engine clk in probe so that this driver can work on
platforms that don't already initialize the clk for this device before
this driver runs. This fixes a problem I see on Coreboot platforms like
Trogdor where the UART hardware isn't enabled by coreboot unless the
serial console build is used.

Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-6-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

clk/qcom: sc7280: add uart5 and uart7 clocks

Allow us to power up UART7 so we can load the QUP firmware, this is used
for bluetooth on RB3 Gen 2 and possibly other boards.

Additionally add the UART5 clocks so we can adjust baud rate for UART

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-5-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

i2c: geni: load firmware if required

Load firmware for the peripheral if necessary.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-4-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

misc: introduce Qcom GENI wrapper

Qualcomm peripherals like UART, SPI, I2C, etc are all exposed under a
common GENI Serial Engine wrapper device. Replace the stub driver we use
for this currently with a full-on misc device and implement support for
loading peripheral firmware.

Each of the peripherals has it's own protocol-specific firmware, this is
stored on the internal storage of the device with a well-known partition
type GUID.

To support this, GENI will bind peripherals in two stages. First the
ones that already have firmware loaded (such as the serial port) are
bound in the typical way. But devices that require firmware loading are
deferred until EVT_LAST_STAGE_INIT. At this point we can be sure that
the storage device is available, so we load the firmware and then bind
and probe the remaining children.

Child devices are expected to determine if firmware loading is necessary
and call qcom_geni_load_firmware().

Since Linux currently doesn't support loading firmware (and firmware may
not be available), we probe all GENI peripherals to ensure that they
always load firmware if necessary.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-3-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

i2c: geni: fix error message wording in clk_disable

Correct the error messages so they accurately describe that we failed to
disable the clocks, not to enable them.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-2-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

configs: qualcomm: use fragments for debug UART

The QCM6490 and QCS9100 targets always enable debug UART, but this is
not really optimal for typical users.

Move these debug UART options to config fragments so that they aren't
enabled by default.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20250722-b4-qcom-tooling-improvements-v5-6-df143f1247fc@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

clk/stub: add sc7180-rpmh clock

Stub the RPMh clock controller on SC7180.

Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250826231752.60633-1-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

configs: qcom_defconfig: Enable SM7150 GCC and Pinctrl

Enable the necessary drivers so that SM7150 devices can boot with
qcom_defconfig.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250831004602.699953-5-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

phy: qcom-qmp-ufs: Import SM7150 tables from Linux

Import the init sequence for the UFS on SM7150.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250831004602.699953-4-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

pinctrl: qcom: add SM7150 pinctrl driver

This SoC features a pinctrl block with north, south, and west tiles
accessible to the AP.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Co-developed-by: Jens Reidel <adrian@mainlining.org>
Signed-off-by: Jens Reidel <adrian@mainlining.org>
Link: https://lore.kernel.org/r/20250831004602.699953-3-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

clk/qcom: add driver for SM7150 GCC

Add a clock driver for the SM7150 SoC. This driver can enable necessary
clocks for UART, UFS, USB, and MMC.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Co-developed-by: Jens Reidel <adrian@mainlining.org>
Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250831004602.699953-2-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

serial: msm: Use single character mode

The UART DM controller supports different channel data packing modes,
either the 4-character packing mode (where 32-bit are read/written at once)
or the single-character mode (where only a single character is read/written
at a time). The 4-character mode can be more efficient, but the
single-character mode is much easier to implement.

At the moment, serial_msm uses the 4-character mode. Since the
dm_serial_ops operate on one character at the time, the code goes through
quite some hoops in order to break this down to single characters. This
code is prone to race conditions (e.g. priv->chars_cnt is read from the
registers, then a command is issued, what if another char came in
inbetween?). It also seems to cause another subtle issue with autoboot:

Unlike the previous autoboot failures that happened when UART was
disconnected, this problem occurs when UART is connected and open in a
terminal: For EFI boot, the console size is queried in efi_console.c
query_console_serial() by sending an ANSI escape code via UART. For some
reason, with the current driver we get yet another 0x00 byte (UART break
event?) when reading the reply from serial input. Because of that, reading
the console size fails in efi_console.c, the actual reply remains in the
UART buffer, and later the boot flow aborts because it detects input after
printing a prompt.

Rather than trying to fix the issue in the current complicated approach,
switch the driver to use the single-character mode. This is simple and
straightforward to implement without race conditions:

 - We write one character at a time to UARTDM_TF, as long as the TX FIFO
   has space available (TX_READY). To flush the console before starting
   Linux, we wait for TX_EMPTY.

 - We read one character at a time from UARTDM_RF and strip off the
   additional error information (assuming there is something in the
   RX FIFO, as indicated by RX_READY).

In this mode, querying the serial console size works and autoboot is no
longer interrupted. The overall code is also much shorter.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-6-316ed98e0143@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

serial: msm: Re-enable after resetting

The documentation for the UART controller in the APQ8016E specifies that
both RESET and ENABLE commands must be issued to set up the receiver and
transmitter, but at the moment we only issue RESET. This doesn't seem to
cause issues in practice (looks like the reset already re-enables the
receiver/transmitter), but let's add the two writes to RX_ENABLE/TX_ENABLE
to better match the recommendations in the documentation.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-5-316ed98e0143@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

serial: msm: Reset after writing to DMEN

According to the documentation of the UART controller in the APQ8016E TRM,
clearing bits inside UARTDM_DMEN requires resetting the transmitter and/or
receiver. We do reset inside uart_dm_init(), but before writing to
UARTDM_DMEN. This doesn't seem to cause problems in practice, but let's
move the reset to the end of uart_dm_init() to better match the
recommendations in the documentation.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-4-316ed98e0143@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

serial: msm: Cleanup register naming

Some of the register definitions are inconsistently named (likely copied
as-is from Qualcomm's Little Kernel/LK bootloader, which uses the
MSM_BOOT_UART naming scheme). Rename them to be in line with the other
register definitions and move them up to be next to the related register.

No functional change.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-3-316ed98e0143@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

Revert "serial: serial_msm: Delay initialization to let pins stabilize"

There have been issues with autoboot on DB410c for years, where autoboot
gets interrupted by spurious input on the UART console. Back in 2021, I've
tried to fix this by inserting a delay before UART initialization, but it
has turned out this is not working reliably either.

It looks like the root cause has always been the lack of bias-pull-up,
which was causing the RX line to be floating when UART is disconnected.
The delay does not seem to be needed anymore when applying bias-pull-up,
so drop it again in favor of the proper fix.

This reverts commit ad7e967738a9c639e07cf50b83ffccdf9a8537b0.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-2-316ed98e0143@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

board: dragonboard410c: Drop now unneeded bootph-all for console

This is applied for all devices upstream in Linux now (when using the
console-specific pinctrl templates).

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-1-316ed98e0143@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

qcom_defconfig: Enable pinctrl driver for SDM630/660

Pin controller driver for SDM630/636/660 SoCs was added in
b4420a0c9ed ("drivers: pinctrl: Add Qualcomm SDM630/660 TLMM driver"),
but not enabled in qcom_defconfig. Correct that omission.

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250914145620.1962735-1-alexeymin@minlexx.ru
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

gpio: qcom: Support GPIOs on PM7325 PMIC

The GPIOs on PM7325 work fine using the qcom_spmi_gpio driver and
enables the use of the Volume Up button Fairphone 5 smartphone.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250917-spmi-gpio-pm7325-v1-1-6b75c2c62d8b@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

board/qualcomm: add debug config fragment for SM6350

Add a fragment similar to others to enable earlycon.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>

qcom_defconfig: Enable SM6350 clock and pinctrl drivers

Enable the drivers so that SM6350 devices can boot with qcom_defconfig.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>

gpio: qcom: Support GPIOs on PM6350 PMIC

The GPIOs on PM6350 work fine using the qcom_spmi_gpio driver and
enables the use of the Volume Up button Fairphone 4 smartphone.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>

regulator: qcom-rpmh-regulator: add support for pm6150l regulators

Add the pm6150l regulator data found on the Qualcomm SM6350 platform.
The tables are imported from the Linux driver. The SMPS regulators were
not added now.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>

phy: qcom: Add SM6350 to QMP UFS PHY driver

The UFS on SM6350 can reuse the SDM845 configuration, just like in
Linux.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>

iommu: qcom-smmu: Add qcom,sm6350-smmu-500 compatible

This SoC doesn't have the generic compatible.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>

drivers: pinctrl: Add Qualcomm SM6350 TLMM driver

Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on SM6350 SoC, with support for special pins.

Correct pin configuration is required for working debug UART and eMMC/SD
cards.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>

clk/stub: add sm6350-rpmh clock

Stub the RPMh clock controller on SM6350.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>

clk/qcom: Add SM6350 clock driver

Add Clock driver for the GCC block found in the SM6350 SoC.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>

qcom_defconfig: enable watchdog command

CONFIG_WDT and CONFIG_WDT_QCOM were previously added in
https://source.denx.de/u-boot/u-boot/-/commit/530764de9fc8539cd2354501e9c42804bc4c4dac

U-Boot and Linux pet the watchdog by default,
but it's helpful to also have the command to control the watchdog,
(CONFIG_CMD_WDT)
so it can be manually disabled by the user, for example, if the kernel
is expected to stall during debugging with kgdb.

Signed-off-by: Paul Sajna <sajattack@postmarketos.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250923-qcom_config_enable_cmd_wdt-v1-1-70cccf9f01e3@postmarketos.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

board/qualcomm: add debug config fragment for MSM8953

Add a fragment similar to others to enable earlycon.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-5-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

doc: board/qualcomm: Clean up debug options for QUP UART

CONFIG_BAUDRATE is not relevant for the QUP driver, and neither is
CONFIG_DEBUG_UART_SKIP_INIT so remove them from the doc.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-4-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

serial: msm-geni: Update kconfig name for DEBUG_UART_MSM_GENI

The previous description "Qualcomm snapdragon" barely tells the user
anything, update the name so that it's clear which configs the user can
choose between, namely the older QUP driver, or the newer GENI driver.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-3-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

clk/qcom: sm8250: Remove unused defines

Clean up some defines which are not used in the driver.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-2-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

pinctrl: qcom: sc7280: Fix offset of UFS_RESET

There's no WEST, SOUTH or NORTH in sc7280 pinctrl. Fix the offset of the
ufs_reset pin.

Fixes: 51ec7fdb64b ("pinctrl: qcom: add sc7280 pinctrl driver")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-1-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

gpio: qcom_spmi: add pm660l

This is used for the volume keys on some SDM670 devices.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-5-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

qcom_defconfig: enable pinctrl for sdm670

Enable the SDM670 pinctrl driver.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-4-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

pinctrl: qcom: add sdm670 pinctrl driver

Add a pinctrl driver for the TLMM block found in the SDM670 SoC.

Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-3-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

clk/qcom: sdm845: add support for sdm670

The global clock controller on SDM670 is similar to SDM845, so let's add
support here.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-2-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

clk/stub: add sdm670 rpmh clock

Necessary for MMC to successfully probe all clocks.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-1-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

phy: qcom: Rework Kconfig logic around MSM8916_USB_PHY

This PHY driver is required by USB_EHCI_MSM and not useful on its own.
Rather than have it be a prompted option, it should (and currently is)
select'd by USB_EHCI_MSM. Remove the prompt for this option and then
correct the dependency chain (it must select PHY).

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20251003203927.1030052-1-trini@konsulko.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

gpio: qcom: qcom_spmi_gpio: add compatible for pm6150l

Add support for the GPIOs in the PM6150L to the new driver.

Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20251005154443.71477-1-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

qcom_defconfig: Enable meminfo command with mapping

Enable meminfo command to be able to see where things are mapped.

Signed-off-by: Abbarapu Venkatesh Yadav <venkyada@qti.qualcomm.com>
Link: https://lore.kernel.org/r/20251010051200.2313081-1-venkyada@qti.qualcomm.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>

MAINTAINERS: update my email address

Update my email address in the maintainers list.

Signed-off-by: Raymond Mao <raymondmaoca@gmail.com>

Revert "clk: Return value calculated by ERR_PTR"

This reverts commit 644b4650ee57c429bede77f44752cc867dac0e00.

While the intention of the above commit is correct, it leads to test
failures in CI that need to be addressed at the same time.

Signed-off-by: Tom Rini <trini@konsulko.com>

spi: altera_spi: Add missing <time.h> to altera_spi.c

This driver references the get_timer macro while relying on an
indirection inclusion of <time.h>. Add the missing include directly.

Signed-off-by: Tom Rini <trini@konsulko.com>

spi: Tighten some spi driver dependencies

A few spi drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>

clk: Tighten some clock driver dependencies

A few clock drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>

x86: Rename arch/x86/include/asm/pnp_def.h to include/pnp_def.h

There is nothing x86-centric in this include file, and moving it will
allow for some drivers to be compile-tested on sandbox.

Signed-off-by: Tom Rini <trini@konsulko.com>

mtd: nvmxip: Make use of LBAF for printing lbaint_t

When printing the contents of an lbaint_t variable we need to use LBAF
to print it in order to get the correct format type depending on 32 or
64bit-ness.

Signed-off-by: Tom Rini <trini@konsulko.com>

mtd: spi: sf_dataflash.c: Make use of 'z' for printing size_t

When printing the contents of an size_t variable we need to use z prefix
to the format character in order to get the correct format type
depending on 32 or 64bit-ness.

Signed-off-by: Tom Rini <trini@konsulko.com>

mtd: Correct dependency on SYS_FLASH_CHECKSUM

This feature requires that CFG_SYS_FLASH_BASE is defined and this in
turn is only done in the case of FLASH_CFI_DRIVER && !CFI_FLASH or in
other words, when DM_MTD is not enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

mtd: Add function prototype for mtd_read_oob_bf(...)

The function mtd_read_oob_bf is called by cmd/nand.c but does not have a
prototype in any header. Add this to include/linux/mtd/mtd.h as that is
the most logical place currently.

Fixes: 1fac57720719 ("nand: Add a watch command")
Signed-off-by: Tom Rini <trini@konsulko.com>

clk: Add missing <dm/device.h> to include/clk.h

In this header we make direct references to some dm/device.h functions
while not including the header directly. Add the missing include.

Signed-off-by: Tom Rini <trini@konsulko.com>

mtd: nand: Prevent dereference of NULL pointer

In nand_wait_ready there is a loop that includes a NULL check for
chip->dev_ready before it is dereferenced. Use a NULL check once the
loop is exited as well to cover the case where it exits due to a timeout
and it is therefore not known if chip->dev_ready is NULL or not.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>

cmd: mtd: Prevent use of uninitialised variable

ret maybe used uninitialised in some cases so instead
initialise it first to prevent this.

This issue was found by Smatch.

Fixes: 9671243e8d10 (cmd: mtd: Use the subcmd infrastructure to declare mtd sub-commands)
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>

spi: spi-uclass: Use unwind goto

In _spi_get_bus_and_cs the check for stacked parallel support needing
multiple chip select support does a direct return on error. Instead it
should set the error code in ret and then use the unwind goto.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>

spi: fspi: Logical or used instead of logical and

In erratum_err050568 the test for apllicability uses logical or to check
multiple chip IDs but this means the test will always evaluate to true
as at least 1 term will always be true. Logical and should have been
used so that the expression evaluates to true if all terms are true
which would mean that no chip ID of interest was in use.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>

spi: npcm-fiu: Remove repeated test

In npcm_fiu_uma_operation to enter a code block nbytes must be non-zero.
So testing for nbytes inside the code block is redundant and can be
removed.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>

spi: ich: Do not use uninitialised value

In ich_spi_exec_op_swseq the variable with_address is only assigned a
value in the case of op->addr.nbytes being non-zero.
Initialise with_address to zero. so that it is always valid.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>

Merge patch series "spi: cadence_qspi: Fix Smatch reported issues"

Andrew Goodbody <andrew.goodbody@linaro.org> says:

Smatch reported issues with an off by 1 error in a test for a timeout
and also an error exit that did not set an error code.

Link: https://lore.kernel.org/r/20250812-cadence_qspi-v1-0-0d693d810145@linaro.org

clk: Return value calculated by ERR_PTR

In clk_set_default_get_by_id ret is passed to ERR_PTR but nothing is
done with the value that this calculates which is obviously not the
intention of the code. This is confirmed by the code around where this
function is called.
Instead return the value from ERR_PTR.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>

Merge patch series "clk: versaclock: Fix two issues found by Smatch"

Andrew Goodbody <andrew.goodbody@linaro.org> says:

Should return value calculated by ERR_PTR as calling code attempts to
check for it.
Also do not dereference a pointer that could be an error pointer before
checking it with IS_ERR.

Link: https://lore.kernel.org/r/20250723-clk_versaclock-v1-0-9d70f2530871@linaro.org

mmc: owl_mmc: Do not dereference data before NULL check

In owl_mmc_prepare_data there is a NULL check for the pointer data but
it happens after data has already been dereferenced. Refactor the code
so that the NULL check happens before any code dereferences data.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>

gpio: intel_gpio: Initialise or0 and or1

In intel_gpio_set_flags the two variables or0 and or1 may be used
uninitialised. Correct this by setting initial values in the
declaration.
Also there is no need to use '|=' when the initial value is 0 and there
is only one assignment performed to each variable so just use '='
instead.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>

spi: cadence_qspi: Do not return unset error code

In spi_calibration if the low range fails to calibrate then the code
attempted to return the variable err but this has not been set in this
case. Instead just return -EIO.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>

spi: cadence_qspi: Off by 1 in test for timeout

In cadence_qspi_apb_exec_flash_cmd the test for a timeout uses a
post-decrement on the variable retry which will result in a value of -1
after the loop exit, or it would if the variable were signed.
To fix this make retry a signed variable and test its value for being
equal to -1.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>

clk: versaclock: Use IS_ERR check before dereference

In versaclock_probe vc5->pin_xin may be an error pointer so need to
check with IS_ERR before attempting to dereference it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>

clk: versaclock: return value calculated by ERR_PTR

In versaclock_get_name -ENOMEM is passed to ERR_PTR but nothing is
done with the value that this calculates which is obviously not the
intention of the code. This is confirmed by the code around where this
function is called.
Instead return the value from ERR_PTR.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>

Prepare v2026.01-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>

configs: Resync with savedefconfig

Resync all defconfig files using qconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>

Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi

No big features this time, mostly a collection of patches that have been
lying around for a bit.  There are some DT updates, for those SoCs that
do not use OF_UPSTREAM yet, hopefully that's the last time we need to do
this exercise. And that's offset by switching over two more SoCs to
OF_UPSTREAM.  Two new boards get a defconfig, and some improvements for
the sun8i-emac Ethernet driver. Finally a patch that fixes occassional
DRAM size misdetection for new A523 boards.

There are a few outstanding patches that just wait for getting some
details confirmed, which I might send then later.

CI passed, and I tested this briefly on affected boards.

sunxi: dts: arm: update devicetree files from Linux kernel tree

Sync the kernel devicetree source files for the Allwinner SoCs with
32-bit cores that do not use OF_UPSTREAM yet. The files were taken
from a v6.18-rc1 tree.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.

This commit also adds a new board devicetree for the A33 Vstar board,
plus one DT overlay for the OrangePi Zero interface board.

This update should not impact any existing U-Boot functionality.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

sunxi: dts: arm64: update devicetree files from Linux kernel tree

Sync the devicetree files from the official Linux kernel tree, v6.18-rc1.
This is covering Allwinner SoCs with 64-bit ARM cores.

The bulk is cosmetic changes: board model name changes, DT node renames,
whitespace fixes.
The actual changes are not dramatic: the CPU cores get their caches
described properly, some A64 video clocks get fixed, some A64 boards
describe the header pins for the WiFi module, the Pinephone adds an
alternative magnetometer used on some board revisions.
On the H5 side the microSD slots get marked as having no write-protect
detection, and the NanoPi Neo Plus2 board describes its regulators better.
The H6 boards switch from RSB to I2C for their PMIC connection.

As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

sunxi: switch Allwinner A80 boards to OF_UPSTREAM

In contrast to some other Allwinner SoCs, there is no difference between
the DTs for the Allwinner A80 SoCs (sun9i) between the U-Boot and the
Linux kernel repository.

Remove the old copies of the A80 related .dts and .dtsi files, and switch
most of sun9i boards over to use OF_UPSTREAM.

There is the Sunchip CX-A99 (family of) board(s) for which we don't have
a DT in the kernel tree. Keep the .dts file in the legacy U-Boot DT
directory, and let the board's defconfig opt out of OF_UPSTREAM.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

sunxi: switch the Allwinner T113 SoC to OF_UPSTREAM

In contrast to some other Allwinner SoCs, there is no difference between
the DTs for the Allwinner T113-s3 SoC (sun20i) between the U-Boot and the
Linux kernel repository.

Remove the old copies of the T113-s3 related .dts and .dtsi files, and
switch the whole SoC (represented by just one board) over to use
OF_UPSTREAM.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

net: sun8i-emac: Add support for active-low leds with internal PHY

A device-tree property is already defined to indicate that the internal
PHY should be used with active-low leds, which corresponds to a
specific bit in the dedicated syscon register.

Add support for setting this bit when the property is present.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>

net: sun8i-emac: Remove internal PHY config default value

We know about all the relevant fields in the syscon register so there
is no reason to read it first and modify it.

Build the register from scratch instead, with all relevant fields set.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>

sunxi: add support for NetCube Systems Kumquat

NetCube Systems Kumquat is a board based on the Allwinner V3s SoC,
including:

- 64MB DDR2 included in SoC
- 10/100 Mbps Ethernet
- USB-C DRD
- Audio Codec
- Isolated CAN-FD
- ESP32 over SDIO
- 8MB SPI-NOR Flash for bootloader
- I2C EEPROM for MAC addresses
- SDIO Connector for eMMC or SD-Card
- 8x 12/24V IOs, 4x normally open relays
- DS3232 RTC with Battery Backup
- QWIIC connectors for external I2C devices

Signed-off-by: Lukas Schmid <lukas.schmid@netcube.li>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Makefile: pass KEYDIR when set to sunxi-spl.bin mkimage

Currently we pass this for u-boot-spl.kwb targets, however when
building sunxi-spl.bin in the TOC0 format we may also need to
specify a KEYDIR, as such we should also pass this when set
to mkimage for the sunxi-spl.bin target.

Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>

sunxi: a523: Re-use H6/H616 DRAM size detection method

The H6 and H616 DRAM initialisation code recently gained a joint and
improved size detection routine, which helped to avoid the occasional
DRAM size misdetection.

Use the same code for the A523 DRAM initialisation as well, which
suffers from the same misdetection at times.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Tested-by: Chen-Yu Tsai <wens@kernel.org>

sunxi: a523: Add OrangePi 4A defconfig

The OrangePi 4A is a typical Raspberry Pi model B sized development
board from Xunlong designed around an Allwinner T527 SoC.

The board has the following features:
- Allwinner T527 SoC
- AXP717B + AXP323 PMICs
- Up to 4GB LPDDR4 DRAM
- micro SD slot
- optional eMMC module
- M.2 slot for PCIe 2.0 x1
- 16 MB SPI-NOR flash
- 4x USB 2.0 type-A ports (one can be used in gadget mode)
- 1x Gigabit ethernet w/ Motorcomm PHY (through yet to be supported GMAC200)
- 3.5mm audio jack via internal audio codec
- HDMI 2.0 output
- eDP, MIPI CSI (2-lane and 4-lane) and MIPI DSI (4-lane) connectors
- USB type-C port purely for power
- AP6256 (Broadcom BCM4345) WiFi 5.0 + BT 5.0
- unsoldered headers for ADC and an additional USB 2.0 host port
- 40-pin GPIO header

Add defconfig for it.

Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Merge tag 'efi-2026-01-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2026-01-rc1-2

CI:

* https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/28024

Documentation:

* develop: virtio: Fix qemu example (true/false -> on/off)
* separate read and write command documentation
* usage: Add general rule for `$?`
* askenv: Reword and remove return value
* seama: Reword return value section
* usage: Use glob for all commands
* Fix typos and formatting

UEFI:

* console: support editable input fields

doc/usage: Add a reference to General rules for commands

For clarity, add a reference link to the start of the section on command
documentation that all commands follow some general rules.

Signed-off-by: Tom Rini <trini@konsulko.com>

doc: usage: Use glob for all commands

Make use of the glob syntax to automatically include all command
documents.

Signed-off-by: Tom Rini <trini@konsulko.com>

doc: seama: Reword return value section

With the addition of general text about how the return value is handled,
reference that while retaining the additional information about setting
$seama_image_size

Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>

doc: askenv: Reword and remove return value

With the addition of general text about how the return value is handled,
remove the examples from the askenv documentation as they are all normal
expected results.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>

doc: usage: Add general rule for `$?`

For nearly all commands in U-Boot the '?' variable is handled the same
way with 0 meaning success, 1 meaning any failure.  Explain this in the
general rules section of the cmdline documentation (with a link to a
counter example) and then remove the redundant wording from most
commands. We retain a section about the return value in a number of
places where we are doing something such as always returning a specific
value or we have useful additional information to go along with the
normal return codes.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

doc: develop: virtio: Fix qemu example (true/false -> on/off)

The given qemu examples use true/false, while qemu actually on/off.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>

doc: Fix whitespace in devicetree example in overlay-fdt-boot.rst

Fix the whitespace and add a missing quotation mark
(default = "foo-reva.dtb") in overlay-fdt-boot.rst.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>

boot: Fix typo

Fix a typo in image-fit.c.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>

bootm: Fix typo in bootm.h

Fix a typo in include/bootm.h.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>

image: Fix typos in image.h

Fix some typos in include/image.h.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>

boot: kconfig: Fix typos

Fix typos in boot/Kconfig.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>