pandora-u-boot.git
3 months agospl: Add an SPL_HAVE_INIT_STACK option
Simon Glass [Fri, 28 Feb 2025 12:20:24 +0000 (05:20 -0700)]
spl: Add an SPL_HAVE_INIT_STACK option

At present there is a hex value SPL_STACK which both determines whether
SPL has its own initial stack and the hex value of that stack.

Split off the former into SPL_HAVE_INIT_STACK with SPL_STACK depending
on that and only providing the latter.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Resync defconfig files]

3 months agotpl: Rename TPL_NEEDS_SEPARATE_STACK to TPL_HAVE_INIT_STACK
Simon Glass [Fri, 28 Feb 2025 12:20:23 +0000 (05:20 -0700)]
tpl: Rename TPL_NEEDS_SEPARATE_STACK to TPL_HAVE_INIT_STACK

The most common word for features that make a platform work is to use
'HAVE_xxx'. Rename this option to match.

Update the help to use the word 'phase' rather than 'stage', since
that is the current terminology. Also clarify that, absent this setting,
the stack pointer generally comes from the value used by U-Boot proper,
rather than SPL.

Move the option just above TPL_STACK which depends on it.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 months agoMerge tag 'u-boot-imx-next-20250227' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Thu, 27 Feb 2025 15:23:36 +0000 (09:23 -0600)]
Merge tag 'u-boot-imx-next-20250227' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/24876

- Convert imx6q-lxr and imxrt1050 to OF_UPSTREAM.
- Fix potential memory leak on ]imx/imx8/imx8m]image.
- Restrict DDR_SI_TEST to only Siemens Capricorn board.
- Fix CONFIG_BOOTCOUNT_ALTBOOTCMD on Data Modul and DH imx8m boards.

3 months agoimx6q-lxr: Convert to OF_UPSTREAM
Fabio Estevam [Thu, 27 Feb 2025 13:02:20 +0000 (10:02 -0300)]
imx6q-lxr: Convert to OF_UPSTREAM

The imx6q-lxr devicetree has landed in kernel 6.13.

Switch to OF_UPSTREAM to make use of the upstream devicetree.

Signed-off-by: Fabio Estevam <festevam@denx.de>
3 months agoARM: imx: Introduce DH i.MX6 DHSOM board specific defconfigs
Marek Vasut [Sat, 22 Feb 2025 17:13:26 +0000 (18:13 +0100)]
ARM: imx: Introduce DH i.MX6 DHSOM board specific defconfigs

Move content of dh_imx6_defconfig into dh_imx6.config. Retain legacy
dh_imx6_defconfig as multi-config for all DH i.MX6 DHSOM based boards.
Introduce separate imx6_dhcom_drc02_defconfig, imx6_dhcom_pdk2_defconfig
and imx6_dhcom_picoitx_defconfig for each i.MX6 DHSOM based board, to
make build for those boards easier. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
3 months agoARM: imx: Fix CONFIG_BOOTCOUNT_ALTBOOTCMD duplication on DH i.MX8MP DHCOM
Marek Vasut [Fri, 21 Feb 2025 17:08:01 +0000 (18:08 +0100)]
ARM: imx: Fix CONFIG_BOOTCOUNT_ALTBOOTCMD duplication on DH i.MX8MP DHCOM

Deduplicate the config files again, move CONFIG_BOOTCOUNT_ALTBOOTCMD
into common imx8mp_dhsom.config .

Fixes: 940135eea5df ("Kconfig: Move CONFIG_BOOTCOUNT_ALTBOOTCMD to Kconfig")
Signed-off-by: Marek Vasut <marex@denx.de>
3 months agoARM: imx: Fix CONFIG_BOOTCOUNT_ALTBOOTCMD duplication on Data Modul i.MX8M eDM SBC
Marek Vasut [Fri, 21 Feb 2025 17:07:17 +0000 (18:07 +0100)]
ARM: imx: Fix CONFIG_BOOTCOUNT_ALTBOOTCMD duplication on Data Modul i.MX8M eDM SBC

Deduplicate the config files again, move CONFIG_BOOTCOUNT_ALTBOOTCMD
into common imx8m_data_modul.config .

Fixes: 940135eea5df ("Kconfig: Move CONFIG_BOOTCOUNT_ALTBOOTCMD to Kconfig")
Signed-off-by: Marek Vasut <marex@denx.de>
3 months agoARM: imx: Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on Data Modul i.MX8M Mini eDM SBC
Marek Vasut [Fri, 21 Feb 2025 17:07:16 +0000 (18:07 +0100)]
ARM: imx: Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on Data Modul i.MX8M Mini eDM SBC

The environment is missing quotes for string variable, add them.

Fixes: 940135eea5df ("Kconfig: Move CONFIG_BOOTCOUNT_ALTBOOTCMD to Kconfig")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 months agotools: imx8mimage: Fix potential memory leak
Maks Mishin [Sun, 2 Feb 2025 17:10:39 +0000 (20:10 +0300)]
tools: imx8mimage: Fix potential memory leak

Dynamic memory, referenced by 'line', is allocated at imx8mimage.c:187
by calling function 'getline' and lost at imx8mimage.c:210.

Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
3 months agotools: imx8image: Fix potential memory leak
Maks Mishin [Sun, 2 Feb 2025 17:05:17 +0000 (20:05 +0300)]
tools: imx8image: Fix potential memory leak

Dynamic memory, referenced by 'line', is allocated at imx8image.c:270
by calling function 'getline' and lost at imx8image.c:294.

Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
3 months agotools: imximage: Fix potential memory leak
Maks Mishin [Fri, 31 Jan 2025 10:04:46 +0000 (13:04 +0300)]
tools: imximage: Fix potential memory leak

Dynamic memory, referenced by 'line', is allocated at imximage.c:761
by calling function 'getline' and lost at imximage.c:793.

Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
3 months agosiemens: common: Make DDR_SI_TEST depend on TARGET_CAPRICORN
Liya Huang [Fri, 31 Jan 2025 00:52:43 +0000 (08:52 +0800)]
siemens: common: Make DDR_SI_TEST depend on TARGET_CAPRICORN

The DDR_SI_TEST config option is only relevant to the i.MX8 Capricorn
board.
Make DDR_SI_TEST depend on DDR_SI_TEST so that it does not show up
on other targets.

Signed-off-by: Liya Huang <1425075683@qq.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
3 months agoARM: dts: imxrt1050: Migrate to OF_UPSTREAM
Jesse Taube [Mon, 27 Jan 2025 21:19:50 +0000 (16:19 -0500)]
ARM: dts: imxrt1050: Migrate to OF_UPSTREAM

The device tree for imxrt1050 is now
available in the /dts/upstream directory.
Migrate board to use OF_UPSTREAM.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
3 months agoMerge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next
Tom Rini [Wed, 26 Feb 2025 20:32:16 +0000 (14:32 -0600)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next

bbmiiphy clean up and DM alignment, finally gets rid of the static
bbmiiphy variables and plugs bbmiiphy into MDIO framework.

3 months agonet: miiphybb: Drop bb_miiphy_buses and bb_miiphy_buses_num
Marek Vasut [Sat, 22 Feb 2025 20:33:33 +0000 (21:33 +0100)]
net: miiphybb: Drop bb_miiphy_buses and bb_miiphy_buses_num

Neither bb_miiphy_buses nor bb_miiphy_buses_num are used anymore.
Drop both of them.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agonet: sh_eth: Drop use of miiphy_get_dev_by_name()
Marek Vasut [Sat, 22 Feb 2025 20:33:32 +0000 (21:33 +0100)]
net: sh_eth: Drop use of miiphy_get_dev_by_name()

Instead of doing another lookup, trivially access the struct mii_dev
embedded in struct bb_miiphy_bus . No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: ravb: Drop use of miiphy_get_dev_by_name()
Marek Vasut [Sat, 22 Feb 2025 20:33:31 +0000 (21:33 +0100)]
net: ravb: Drop use of miiphy_get_dev_by_name()

Instead of doing another lookup, trivially access the struct mii_dev
embedded in struct bb_miiphy_bus . No functional change.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agoarm: mvebu: a38x: Drop use of miiphy_get_dev_by_name()
Marek Vasut [Sat, 22 Feb 2025 20:33:30 +0000 (21:33 +0100)]
arm: mvebu: a38x: Drop use of miiphy_get_dev_by_name()

Instead of doing another lookup, trivially access the struct mii_dev
embedded in struct bb_miiphy_bus . No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: miiphybb: Drop name field from struct bb_miiphy_bus
Marek Vasut [Sat, 22 Feb 2025 20:33:29 +0000 (21:33 +0100)]
net: miiphybb: Drop name field from struct bb_miiphy_bus

The struct bb_miiphy_bus embeds struct struct mii_dev, which
already contains one copy of name field. Drop the duplicate
top level copy of name field.

The a38x code does static assignment of disparate names, use
snprintf(...) to fill in matching name in probe to avoid any
breakage.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agonet: miiphybb: Use container_of() in bb_miiphy_getbus()
Marek Vasut [Sat, 22 Feb 2025 20:33:28 +0000 (21:33 +0100)]
net: miiphybb: Use container_of() in bb_miiphy_getbus()

Replace the name based look up in bb_miiphy_getbus() with trivial
container_of() call. This works because the struct bb_miiphy_bus
always embeds the matching struct mii_dev . This also makes the
code much simpler and more efficient.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agonet: designware: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
Marek Vasut [Sat, 22 Feb 2025 20:33:27 +0000 (21:33 +0100)]
net: designware: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks

Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
currently listed in bb_miiphy_buses[] array. This is a temporary
duplication of assignment to avoid breakage, which will be removed
in follow up patches. At this point, the bb_miiphy callbacks can
reach these accessors by doing container_of() on struct mii_dev.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: sh_eth: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
Marek Vasut [Sat, 22 Feb 2025 20:33:26 +0000 (21:33 +0100)]
net: sh_eth: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks

Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
currently listed in bb_miiphy_buses[] array. This is a temporary
duplication of assignment to avoid breakage, which will be removed
in follow up patches. At this point, the bb_miiphy callbacks can
reach these accessors by doing container_of() on struct mii_dev.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: ravb: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
Marek Vasut [Sat, 22 Feb 2025 20:33:25 +0000 (21:33 +0100)]
net: ravb: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks

Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
currently listed in bb_miiphy_buses[] array. This is a temporary
duplication of assignment to avoid breakage, which will be removed
in follow up patches. At this point, the bb_miiphy callbacks can
reach these accessors by doing container_of() on struct mii_dev.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agoarm: mvebu: a38x: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
Marek Vasut [Sat, 22 Feb 2025 20:33:24 +0000 (21:33 +0100)]
arm: mvebu: a38x: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks

Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
currently listed in bb_miiphy_buses[] array. This is a temporary
duplication of assignment to avoid breakage, which will be removed
in follow up patches. At this point, the bb_miiphy callbacks can
reach these accessors by doing container_of() on struct mii_dev.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: miiphybb: Introduce bb_miiphy_alloc()/bb_miiphy_free() wrappers
Marek Vasut [Sat, 22 Feb 2025 20:33:23 +0000 (21:33 +0100)]
net: miiphybb: Introduce bb_miiphy_alloc()/bb_miiphy_free() wrappers

Introduce bb_miiphy_alloc()/bb_miiphy_free() wrappers to allocate and free
struct bb_miiphy_bus. Make struct bb_miiphy_bus wrap struct mii_dev, which
will become useful later in bb_miiphy_bus accessors, which would be able
to access struct bb_miiphy_bus using container_of, even if the PHY stack
only passes in the inner struct mii_dev .

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agonet: miiphy: Introduce mdio_init()
Marek Vasut [Sat, 22 Feb 2025 20:33:22 +0000 (21:33 +0100)]
net: miiphy: Introduce mdio_init()

Introduce mdio_init() split off from mdio_alloc(), which is used
to initialize already allocated struct mii_dev.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agonet: designware: Extract bbmiiphy initialization into dedicated function
Marek Vasut [Sat, 22 Feb 2025 20:33:21 +0000 (21:33 +0100)]
net: designware: Extract bbmiiphy initialization into dedicated function

Pull the bbmiiphy initialization code from designware_eth_probe() into
dedicated function, dw_bb_mdio_init(), just like all the other MDIO
initialization functions.

Keep check for "snps,bitbang-mii" in the designware_eth_probe(), so the
driver can initialize this MDIO only in case the property is present,
and initialize regular DW MDIO in case it is not present.

The dw_bb_mdio_init() allocates its own MDIO instance, because thus far
code gated behind "snps,bitbang-mii" did depend on allocation of MDIO bus
by the other two MDIO bus options and then rewrote the newly allocated
MDIO bus callbacks, which is wrong, instead allocate proper MDIO bus with
the correct callbacks outright.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: designware: Drop bus index
Marek Vasut [Sat, 22 Feb 2025 20:33:20 +0000 (21:33 +0100)]
net: designware: Drop bus index

There is literally one single bbmiiphy bus in this driver,
remove the bus index handling.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: miiphybb: Drop bb_miiphy_init() and .init callback
Marek Vasut [Sat, 22 Feb 2025 20:33:19 +0000 (21:33 +0100)]
net: miiphybb: Drop bb_miiphy_init() and .init callback

The .init callback is not called by any function, drop it.
There are no more users of the init callback, drop the entire
mechanism.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agoarm: mvebu: a38x: Call bb_miiphy init directly in driver probe
Marek Vasut [Sat, 22 Feb 2025 20:33:18 +0000 (21:33 +0100)]
arm: mvebu: a38x: Call bb_miiphy init directly in driver probe

All the resources needed by this .init callback should already
be available by the time probe function runs, simply call the
init callback directly and set the bb_miiphy init callback to
NULL. This shouldn't break anything on this hardware, but would
be nice if someone could double-check and test that.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: designware: Reorder bb_miiphy functions
Marek Vasut [Sat, 22 Feb 2025 20:33:17 +0000 (21:33 +0100)]
net: designware: Reorder bb_miiphy functions

Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agoarm: mvebu: a38x: Reorder bb_miiphy functions
Marek Vasut [Sat, 22 Feb 2025 20:33:16 +0000 (21:33 +0100)]
arm: mvebu: a38x: Reorder bb_miiphy functions

Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: sh_eth: Reorder bb_miiphy functions
Marek Vasut [Sat, 22 Feb 2025 20:33:15 +0000 (21:33 +0100)]
net: sh_eth: Reorder bb_miiphy functions

Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
3 months agonet: ravb: Reorder bb_miiphy functions
Marek Vasut [Sat, 22 Feb 2025 20:33:14 +0000 (21:33 +0100)]
net: ravb: Reorder bb_miiphy functions

Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agonet: designware: Drop NULL priv assignment
Marek Vasut [Sat, 22 Feb 2025 20:33:13 +0000 (21:33 +0100)]
net: designware: Drop NULL priv assignment

This is unnecessary, the unset structure member is initialized to
NULL by default, drop the assignment.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agonet: sh_eth: Drop empty init callback
Marek Vasut [Sat, 22 Feb 2025 20:33:12 +0000 (21:33 +0100)]
net: sh_eth: Drop empty init callback

The init function does nothing, the bb_miiphy_init() already checks
whether the .init callback is assigned, and if not, skips calling it.
Remove the empty init function. The entire init callback will be
removed in follow up patches.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agonet: ravb: Drop empty init callback
Marek Vasut [Sat, 22 Feb 2025 20:33:11 +0000 (21:33 +0100)]
net: ravb: Drop empty init callback

The init function does nothing, the bb_miiphy_init() already checks
whether the .init callback is assigned, and if not, skips calling it.
Remove the empty init function. The entire init callback will be
removed in follow up patches.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agoMerge patch series "Remove "saveenv" functionality from am57xx evms"
Tom Rini [Tue, 25 Feb 2025 17:11:32 +0000 (11:11 -0600)]
Merge patch series "Remove "saveenv" functionality from am57xx evms"

Anurag Dutta <a-dutta@ti.com> says:

Previously saved environment introduce discrepancies and may lead to
incompatibilities without default settings. This series removes the saved
environment functionality on am57xx evms so that the default configuration
is always loaded

Test result: https://gist.github.com/anuragdutta731/b253ddb0a5538ab6588a3535d7bbecf7

Link: https://lore.kernel.org/r/20250208043938.52832-1-a-dutta@ti.com
3 months agoconfigs: am57xx: Remove saved environments
Anurag Dutta [Sat, 8 Feb 2025 04:39:38 +0000 (10:09 +0530)]
configs: am57xx: Remove saved environments

Saved environments lead to inconsistencies leading to conflicts
with the default environment that U-boot should update during
development. Remove the previously saved environment so that
the default environment is always loaded.

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
3 months agoconfigs: am57xx_hs: Remove saved environments
Anurag Dutta [Sat, 8 Feb 2025 04:39:37 +0000 (10:09 +0530)]
configs: am57xx_hs: Remove saved environments

Saved environments cause inconsistencies leading to conflicts
with the default environment that U-boot should update during
development. Remove the previously saved environment so that
the default environment is always loaded.

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
3 months agoMerge tag 'u-boot-socfpga-next-20250225' of https://source.denx.de/u-boot/custodians...
Tom Rini [Tue, 25 Feb 2025 14:25:00 +0000 (08:25 -0600)]
Merge tag 'u-boot-socfpga-next-20250225' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next

CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/24816

Please pull the SoCFPGA changes for next from u-boot-socfpga, containing
boot support for the  Altera SoCFPGA Agilex 5 platform in U-Boot. The
changes include:

1. Board-specific configurations and setup required to enable Agilex 5
   operation in U-Boot.
2. Integration of cache coherency unit (CCU) initialization routine,
   including CCU conguration in DT.
3. Clock, firewall (configured in DT), SMMU, low level initialization
   specific to Agilex 5.
4. Integration of memory initialization routine, including DDR setup.

This patch set has been tested on Agilex 5 devkit with QSPI boot
(UBI/UBIFS) and RAM boot (TFTP & ARM DS debugger).

3 months agoconfigs: agilex5: Enable watchdog autostart
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:35:11 +0000 (16:35 +0800)]
configs: agilex5: Enable watchdog autostart

Automatically start watchdog timer for Agilex5. This
configuration is enabled by default in the Kconfig,
hence removing this configuration from Agilex5 defconfig.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoconfigs: socfpga: soc64: agilex5: Enable QSPI boot with UBI / UBIFS
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:35:10 +0000 (16:35 +0800)]
configs: socfpga: soc64: agilex5: Enable QSPI boot with UBI / UBIFS

Add the required configuration in the U-Boot env to enable Linux QSPI
boot with UBI / UBIFS.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: socfpga: soc64: Add support for board_boot_order()
Tien Fong Chee [Tue, 18 Feb 2025 08:35:09 +0000 (16:35 +0800)]
arm: socfpga: soc64: Add support for board_boot_order()

Add board_boot_order() to retrieve the list of boot devices from
spl-boot-order property in device tree. This board_boot_order()
would be used for all Intel SOC64 devices.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoconfigs: socfpga: soc64: agilex5: Enable XGMAC
Tien Fong Chee [Tue, 18 Feb 2025 08:35:08 +0000 (16:35 +0800)]
configs: socfpga: soc64: agilex5: Enable XGMAC

Enable XGMAC for SoCFPGA Agilex5 devkit.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoconfigs: socfpga: soc64: agilex5: Use common ARMv8 linker script
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:35:07 +0000 (16:35 +0800)]
configs: socfpga: soc64: agilex5: Use common ARMv8 linker script

Use default common ARMv8 linker script instead of a separate
SoC64 linker script

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
3 months agoarm: armv8: Improve SPL data save and restore implementation
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:35:06 +0000 (16:35 +0800)]
arm: armv8: Improve SPL data save and restore implementation

Introduce a new symbol in the beginning of .data section in
the common ARMv8 linker script and use that as a reference
for data save and restore.

Previously, the code would rely on calculating the start of
the .data section address via data size, however, we observed
that the data size does not really reflect the SPL mapped
addresses.

In our case, the binman_sym section size was not included in
the data size, which will result in a wrong address for the
.data start section, which prevents us from properly saving
and restoring SPL data.

This approach skips the calculation for the starting address
of the .data section, and instead just defines the beginning
address of the .data section and calling the symbol as needed,
in which we think as a simpler and much more robust method.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: socfpga: agilex5: Add SPL for Agilex5 SoCFPGA
Tien Fong Chee [Wed, 14 Aug 2024 07:56:25 +0000 (15:56 +0800)]
arm: socfpga: agilex5: Add SPL for Agilex5 SoCFPGA

Add SPL support for Agilex5 SoCFPGA.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoddr: altera: Add DDR driver for Agilex5 series
Tingting Meng [Fri, 21 Feb 2025 13:49:41 +0000 (21:49 +0800)]
ddr: altera: Add DDR driver for Agilex5 series

Adding DDR driver support for Agilex5 series.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
3 months agoarm: socfpga: smc: Add memory coherency support to mailbox command
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:35:03 +0000 (16:35 +0800)]
arm: socfpga: smc: Add memory coherency support to mailbox command

As cache is enabled in U-Boot and disabled in ATF(BL31). We need to
perform cache flush of buffers that are shared between U-Boot and
ATF using secure monitor calls.

Signed-off-by: Mahesh Rao <mahesh.rao@altera.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoconfigs: agilex5: Add configuration for malloc pool
Tien Fong Chee [Tue, 18 Feb 2025 08:35:02 +0000 (16:35 +0800)]
configs: agilex5: Add configuration for malloc pool

Adding configuration for SPL malloc pool.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: socfpga: Export board ID as U-Boot environment
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:35:01 +0000 (16:35 +0800)]
arm: socfpga: Export board ID as U-Boot environment

Board ID is exported as environment variable for use to boot Linux with FIT
configuration.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: socfpga: agilex5: Update CPU info
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:35:00 +0000 (16:35 +0800)]
arm: socfpga: agilex5: Update CPU info

Update the print info per Agilex5

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: socfpga: agilex5: Add SMMU initialization
Tien Fong Chee [Tue, 18 Feb 2025 08:34:59 +0000 (16:34 +0800)]
arm: socfpga: agilex5: Add SMMU initialization

Allow non-secure accesses only with SMMU peripherals. This would protect
the content in DDR secure region from accidentally modified by SMMU
peripherals.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: socfpga: agilex5: Enable cache flush for system memory cache in CCU
Tien Fong Chee [Thu, 8 Aug 2024 08:47:39 +0000 (16:47 +0800)]
arm: socfpga: agilex5: Enable cache flush for system memory cache in CCU

set/way instructions "dc cisw" which is used by the "dcache flush" command
only flushing CPU data caches from L1 -> L2 -> L3 to system memory cache in
cache coherency unit, hence this patch enables data flush from system
memory cache of CCU into DDR memory.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarch: arm: Enable PSCI reset driver for Agilex5
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:34:57 +0000 (16:34 +0800)]
arch: arm: Enable PSCI reset driver for Agilex5

Enable PSCI reset driver for Agilex5 cold and warm reset

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: dts: agilex5: Enable XGMAC
Tien Fong Chee [Tue, 18 Feb 2025 08:34:56 +0000 (16:34 +0800)]
arm: dts: agilex5: Enable XGMAC

Enable XGMAC for SoCFPGA Agilex5 devkit.

Link: https://lore.kernel.org/all/20241204064755.10226-2-mun.yew.tham@intel.com/
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: dts: agilex5: Add firewall configure settings
Tien Fong Chee [Tue, 18 Feb 2025 08:34:55 +0000 (16:34 +0800)]
arm: dts: agilex5: Add firewall configure settings

These firewall configure settings are needed to disable firewall on
respective hardware component so both secure and non-secure transactions
are allowed.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: dts: agilex5: Add HPS cache coherency unit configuration settings
Tien Fong Chee [Tue, 18 Feb 2025 08:34:54 +0000 (16:34 +0800)]
arm: dts: agilex5: Add HPS cache coherency unit configuration settings

These configuration settings are required to enable cache maintenance and
access between initiators and targets.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: socfpga: Add handoff data support for SoCFPGA Agilex5 device
Tien Fong Chee [Wed, 24 Jul 2024 09:35:09 +0000 (17:35 +0800)]
arm: socfpga: Add handoff data support for SoCFPGA Agilex5 device

Agilex5 supports both HPS handoff data and DDR handoff data.
Existing HPS handoff functions are restructured to support both existing
devices and Agilex5 device.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: socfpga: Disable GIC for Agilex5
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:34:52 +0000 (16:34 +0800)]
arm: socfpga: Disable GIC for Agilex5

Status polling is used instead of using interrupt controller for Agilex5.

Disabling GICV3 in Agilex5 target, as well as disabling GICV2 enabled by
default for all SoCFPGA devices.

All the other SoCFPGA devices uses GICV2, thus enabling GICV2 in each of
the devices.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: socfpga: agilex5: Add warm reset mask for Agilex5
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:34:51 +0000 (16:34 +0800)]
arm: socfpga: agilex5: Add warm reset mask for Agilex5

There are 5 L4 watchdogs and one SDM triggered warm reset bit
in Agilex5 reset manager "stat" register where bit 16:20 for L4
watchdogs. Assigning value 1 to these bits in the register address
will initiate SDM to trigger warm reset.

Introducing new warm reset mask for Agilex5 to trigger warm reset
to all five L4 watchdogs.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agodrivers: clk: agilex5: Set PLL to asynchronous mode
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:34:50 +0000 (16:34 +0800)]
drivers: clk: agilex5: Set PLL to asynchronous mode

PLL frequency would overshoot from the original target in
synchronous mode during low VCC voltage condition.

To resolve this issue, PLL is set to run on asynchronous mode
instead of enabling synchronous mode in the clock driver.

Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agodrivers: clk: agilex5: Replace status polling with wait_for_bit_le32()
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:34:49 +0000 (16:34 +0800)]
drivers: clk: agilex5: Replace status polling with wait_for_bit_le32()

Replace cm_wait_for_fsm() function with wait_for_bit_le32() function
which supports accurate timeout.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agodrivers: clk: agilex5: Configure intosc as boot_clk source
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:34:48 +0000 (16:34 +0800)]
drivers: clk: agilex5: Configure intosc as boot_clk source

Some customers prefer to minimize the use of external oscillators,
especially when using the FPGA first configuration mode.

By enabling the configuration of the HPS internal oscillator as
the boot_clk source instead of the default external oscillator,
(HPS_OSC_CLK) in non-secure boot scenarios, this allows them
to eliminate the need for an additional oscillator device and
a dedicated HPS pin, simplifying board layout and routing.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 months agoarm: socfpga: misc: Exclude Agilex5 from clock manager base address retrieval
Alif Zakuan Yuslaimi [Tue, 18 Feb 2025 08:34:47 +0000 (16:34 +0800)]
arm: socfpga: misc: Exclude Agilex5 from clock manager base address retrieval

Agilex5 retrieves its clock manager address via probing its own clock
driver model during SPL initialization.

Therefore, excluding Agilex5 from calling generic clock driver in misc
driver.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
3 months agoarm: socfpga: agilex5: Add new driver model for system manager in Agilex5
Tien Fong Chee [Wed, 18 Sep 2024 08:43:02 +0000 (16:43 +0800)]
arm: socfpga: agilex5: Add new driver model for system manager in Agilex5

Initial creation of new system manager driver.

Add supports for the SOCFPGA System Manager Register block which
aggregates different peripheral function into one area.
On 64 bit ARM parts, the system manager only can be accessed during
EL3 mode, this driver model provide user the high level access
to system register and abstract user from low level access.

The base address of system manager can be retrieved
using DT framework through the System Manager driver.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
3 months agoarch: arm: dts: agilex5: Enable I2C3
Alif Zakuan Yuslaimi [Thu, 6 Feb 2025 08:25:11 +0000 (16:25 +0800)]
arch: arm: dts: agilex5: Enable I2C3

Enable i2c3 node in Agilex5 device tree

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
3 months agoMerge tag 'v2025.04-rc3' into next
Tom Rini [Mon, 24 Feb 2025 23:15:14 +0000 (17:15 -0600)]
Merge tag 'v2025.04-rc3' into next

Prepare v2025.04-rc3

3 months agoPrepare v2025.04-rc3 v2025.04-rc3
Tom Rini [Mon, 24 Feb 2025 22:53:59 +0000 (16:53 -0600)]
Prepare v2025.04-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agommc: Fix size calculation for sector addressed MMC version 4
Marek Vasut [Wed, 29 Jan 2025 11:15:54 +0000 (12:15 +0100)]
mmc: Fix size calculation for sector addressed MMC version 4

For eMMC v4 and newer that is smaller than 2 GiB, the JEDEC JESD84-B51
section 6.2.4 Configure partitions indicates that EXT_CSD SEC_COUNT
should not be used to determine device size, and instead device size
should be calculated from C_SIZE and C_SIZE_MULT.

This is not exactly accurate, the 2 GiB limit is not a hard line,
there are eMMC devices which are smaller than 2 GiB and still
require device size to be determined from EXT_CSD SEC_COUNT. The
hard line is instead OCR HCS bit, which indicates whether the device
is byte or sector addressed, the former applies to most devices
below 2 GiB, and the later applies mostly to devices above 2 GiB.

However, there are a couple of devices which are smaller than 2 GiB
and still set the OCR HCS bit to indicate they are sector addressed,
and therefore the size calculation for those devices should also
use EXT_CSD SEC_COUNT . Use mmc->high_capacity flag to discern the
devices instead of arbitrary 2 GiB limit. The mmc->high_capacity flag
reflects the OCR HCS bit state.

Fixes: 639b7827d1ca ("mmc: fix the condition for MMC version 4")
Signed-off-by: Marek Vasut <marex@denx.de>
3 months agoRevert "Merge patch series "Add preload_check_sign tool""
Tom Rini [Mon, 24 Feb 2025 16:32:04 +0000 (10:32 -0600)]
Revert "Merge patch series "Add preload_check_sign tool""

This reverts commit c8750efe02c20725388dd4279896aaf306acfad4, reversing
changes made to 8c6cf8aeea7e57ca686de8b765e4baf3a7ef1fa7.

Unfortunately these changes do not build on macOS hosts.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agofs/squashfs: fix potential integer overflows
Joao Marcos Costa [Wed, 19 Feb 2025 10:16:33 +0000 (11:16 +0100)]
fs/squashfs: fix potential integer overflows

The length of buffers used to read inode tables, directory tables, and
reading a file are calculated as: number of blocks * block size, and
such plain multiplication is prone to overflowing (thus unsafe).

Replace it by __builtin_mul_overflow, i.e. safe math.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
3 months agoMerge branch 'picasso' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Tom Rini [Sat, 22 Feb 2025 14:42:01 +0000 (08:42 -0600)]
Merge branch 'picasso' of https://source.denx.de/u-boot/custodians/u-boot-tegra

Branch contains bringup of Acer Iconia Tab A500 (codename picasso), a
Tegra 2 Android device with decent Linux kernel support. Ondevice tests
and U-Boot test suit all passed.

3 months agobuildman: Update tests for newer filelock module
Simon Glass [Tue, 4 Feb 2025 23:33:53 +0000 (16:33 -0700)]
buildman: Update tests for newer filelock module

Recent versions of this module call time.perf_counter() so add a patch
for this also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
3 months agoMerge patch series "Add preload_check_sign tool"
Tom Rini [Fri, 21 Feb 2025 14:34:34 +0000 (08:34 -0600)]
Merge patch series "Add preload_check_sign tool"

Paul HENRYS <paul.henrys_ext@softathome.com> says:

This serie of patches adds a new tool to authenticate files signed
with a preload header.
This tool is also used in the tests to actually verify the
authenticity of the file signed with such a preload header.

Link: https://lore.kernel.org/r/20250212093126.3722186-1-paul.henrys_ext@softathome.com
3 months agoMerge branch 'fix-issues-and-update-pylint-version' into next
Tom Rini [Fri, 21 Feb 2025 14:24:49 +0000 (08:24 -0600)]
Merge branch 'fix-issues-and-update-pylint-version' into next

This merges a set of patches from myself and Simon Glass to resolve
various problems that the current version of pylint will report with our
codebase. After the problems are fixed, we update to the now current
version which is 3.3.4.

3 months agoremoteproc: k3-dsp: Flush D cache after loading firmware
Udit Kumar [Thu, 13 Feb 2025 09:23:22 +0000 (14:53 +0530)]
remoteproc: k3-dsp: Flush D cache after loading firmware

Memory region used by remote cores was set to non-cached region but
commit 7c9c6e192580 ("arm: mach-k3: Merge initial memory maps") makes
all memory region as cached, unified across K3 devices.

This causes inconsistency while booting remote cores on devices, due to
cache incoherency between remote core and boot code.

So to make this operation coherent, cache the address and len while
loading ELF program headers to memory and flush that region in the next
cycle of load.

Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
3 months agoarm: mediatek: remove CONFIG_MT8512
Weijie Gao [Thu, 13 Feb 2025 09:11:18 +0000 (17:11 +0800)]
arm: mediatek: remove CONFIG_MT8512

Defining CONFIG_MT8512 is unnecessary as now board for mediatek
target can be changed in config.
Use CONFIG_TARGET_MT8512 to replace CONFIG_MT8512.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
3 months agoarm: mediatek: build u-boot-mtk.bin only if needed
Weijie Gao [Thu, 13 Feb 2025 09:00:34 +0000 (17:00 +0800)]
arm: mediatek: build u-boot-mtk.bin only if needed

Not all MediaTek platforms needs u-boot-mtk.bin.

This patch will let u-boot generates u-boot-mtk.bin only if
CONFIG_MTK_BROM_HEADER_INFO is not empty.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
3 months agobinman: Authenticate the image when testing the preload signature
Paul HENRYS [Wed, 12 Feb 2025 09:31:26 +0000 (10:31 +0100)]
binman: Authenticate the image when testing the preload signature

Use preload_check_sign to authenticate the generated image when testing the
preload signature in testPreLoad().

Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
3 months agoconfigs: Enable the pre-load signature in tools-only_defconfig
Paul HENRYS [Wed, 12 Feb 2025 09:31:25 +0000 (10:31 +0100)]
configs: Enable the pre-load signature in tools-only_defconfig

pre-load related config options are enabled to have support of it in host
tools.

'CONFIG_FIT_SIGNATURE=y' is being automatically removed since it is
selected by CONFIG_IMAGE_PRE_LOAD_SIG.

Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
3 months agotools: Add preload_check_sign to authenticate images with a pre-load
Paul HENRYS [Wed, 12 Feb 2025 09:31:24 +0000 (10:31 +0100)]
tools: Add preload_check_sign to authenticate images with a pre-load

preload_check_sign is added so that it can be used to authenticate images
signed with the pre-load signature supported by binman and U-Boot.
It could also be used to test the signature in binman tests signing
images with the pre-load.

Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
3 months agoboot: Add support of the pre-load signature for host tools
Paul HENRYS [Wed, 12 Feb 2025 09:31:23 +0000 (10:31 +0100)]
boot: Add support of the pre-load signature for host tools

Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
3 months agoimage: Add an inline declaration of unmap_sysmem()
Paul HENRYS [Wed, 12 Feb 2025 09:31:22 +0000 (10:31 +0100)]
image: Add an inline declaration of unmap_sysmem()

Add an empty inline declaration when compiling tools for a host where
unmap_sysmem() is not defined.

Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
3 months agorsa: Add rsa_verify_openssl() to use openssl for host builds
Paul HENRYS [Wed, 12 Feb 2025 09:31:21 +0000 (10:31 +0100)]
rsa: Add rsa_verify_openssl() to use openssl for host builds

rsa_verify_openssl() is used in lib/rsa/rsa-verify.c to authenticate data
when building host tools.

Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
3 months agoCI: Update to pylint 3.3.4
Tom Rini [Thu, 20 Feb 2025 21:22:39 +0000 (15:22 -0600)]
CI: Update to pylint 3.3.4

With all of the reported warnings now fixed, update to current pylint
version.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agotools: Fix pylint 3.3.4 errors
Simon Glass [Wed, 19 Feb 2025 15:11:16 +0000 (08:11 -0700)]
tools: Fix pylint 3.3.4 errors

This newer pylint produces errors about variables possibly being used
before being set. Adjust the code to pass these checks.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
3 months agotools/patman: Don't call a non-existent suite
Tom Rini [Wed, 12 Feb 2025 22:23:17 +0000 (16:23 -0600)]
tools/patman: Don't call a non-existent suite

With a newer pylint we get a warning that gitutil.RunTests does not
exist, so remove the line.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agotools: binman: ti_board_cfg: Fix pylint error over 'br'
Tom Rini [Wed, 12 Feb 2025 22:23:33 +0000 (16:23 -0600)]
tools: binman: ti_board_cfg: Fix pylint error over 'br'

With a newer pylint, we get a warning that 'br' could be used before
assignment. Fix this by declaring br first as an empty bytearray.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agobinman: Switch to setuptools
Tom Rini [Wed, 12 Feb 2025 22:23:39 +0000 (16:23 -0600)]
binman: Switch to setuptools

With the distutils module having been removed with Python 3.12, switch
to using setuptools instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agodtoc: Switch to setuptools
Tom Rini [Wed, 12 Feb 2025 22:23:46 +0000 (16:23 -0600)]
dtoc: Switch to setuptools

With the distutils module having been removed with Python 3.12, switch
to using setuptools instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agotest/py: Have test_usb.py raise an Exception with unsupported filesystems
Tom Rini [Wed, 12 Feb 2025 22:23:54 +0000 (16:23 -0600)]
test/py: Have test_usb.py raise an Exception with unsupported filesystems

With a newer pylint we get a warning about how offset could be used
before assigned. This is because when the underlying filesystem wasn't
one that is supported we would have runtime test failures. Address this
by raise'ing an Exception if fs is not supported.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agotest/py: Rework how test_ums.py handles (not) having write enabled
Tom Rini [Wed, 12 Feb 2025 22:24:00 +0000 (16:24 -0600)]
test/py: Rework how test_ums.py handles (not) having write enabled

With a newer pylint version we get a warning about how mounted_test_fn
could be used before assignment. Evaluating the code, this can't happen
because we check for "not have_writable_fs_partition" and return before
moving to the part of the tests which use mounted_test_fn. However, we
should instead have this written so that we only try this part of the
test if have_writable_fs_partition is set, and this also fixes the
warning. As part of this we also move test_f and mounted_test_fn to the
section of code that already only does this if
have_writable_fs_partition is set.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agotest/py: Rework test_spi.py to assert we found output
Tom Rini [Wed, 12 Feb 2025 22:24:07 +0000 (16:24 -0600)]
test/py: Rework test_spi.py to assert we found output

When running a newer version of pylint it will complain that page_size
may be used before being assignment. Looking deeper what is going on is
that we could run in to the case where the regex we run for any of the
flash information fails but since we don't have a result, we don't check
it either. In the case of the rest of the numerical values we then have
some assignment (multiplying by some value) and so pylint doesn't
complain. Rework things to assert that each regex has a result and so
failure will stop the test and we won't have any use before assignment.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agoMerge patch series "FIT Image Boot Fixes for am57xx_hs_evm"
Tom Rini [Thu, 20 Feb 2025 22:14:53 +0000 (16:14 -0600)]
Merge patch series "FIT Image Boot Fixes for am57xx_hs_evm"

Anurag Dutta <a-dutta@ti.com> says:

The u-boot is unable to load the FIT image due to incorrect
boot arguments in case of am57_hs evm as can be seen in [1].
This series introduces multiple changes pertaining to several
environment variables and overlays that are responsible for
successful [2] loading of kernel image.

Test links:
[1] https://gist.github.com/anuragdutta731/7bbf0df73dd1e3327765f1807d337445
[2] https://gist.github.com/anuragdutta731/5244174c9b9556fd89132c8d72ae2d8b

Link: https://lore.kernel.org/r/20250211094931.20817-1-a-dutta@ti.com
3 months agoinclude: configs: omap5: Add support for FDT overlay
Sinthu Raja [Tue, 11 Feb 2025 09:49:31 +0000 (15:19 +0530)]
include: configs: omap5: Add support for FDT overlay

As AM57x uses overlays for display and camera interfaces, add support to
load DT overlay files to MMC boot.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
3 months agoconfigs: omap5: Enable custom mmc boot to distroboot for AM57x
Sinthu Raja [Tue, 11 Feb 2025 09:49:30 +0000 (15:19 +0530)]
configs: omap5: Enable custom mmc boot to distroboot for AM57x

TI AM57x boards use a custom (though family common to TI boards) mechanism
for booting Linux. Add support to enable custom MMC boot as a default
option along with the distroboot approach.

Also, add supporting mmc boot environment variables which shall be used for
custom MMC boot

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
3 months agoinclude: configs: Override get_fit_config to get FIT config for AM57x
Sinthu Raja [Tue, 11 Feb 2025 09:49:29 +0000 (15:19 +0530)]
include: configs: Override get_fit_config to get FIT config for AM57x

Kernel commit 837833a724b7 ("environment: ti: Add get_fit_config command
to get FIT config string") introduced "get_fit_config" in ti_armv7_common.h
to mangle the fdtfile name when used to select a config node from the OE
made FIT image. However, the ti_armv7_common.h is common for both K3 and
AM57xx platforms. AM57xx platforms' fdtfile name does not have '/' and
"conf-" prefix so the setexpr command fails and boot hangs.

Override the get_fit_config in AM57x specific config header to get the
correct FIT config name.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
3 months agoMerge patch series "configs: phycore_am64x_a53_defconfig: Enable ENV_IS_IN_SPI_FLASH"
Tom Rini [Thu, 20 Feb 2025 22:13:28 +0000 (16:13 -0600)]
Merge patch series "configs: phycore_am64x_a53_defconfig: Enable ENV_IS_IN_SPI_FLASH"

This series improves SPI flash support for some phytec am6x configs.

Link: https://lore.kernel.org/r/20250210152548.1263498-1-d.schultz@phytec.de