pandora-u-boot.git
33 hours agoarm64: dts: renesas: Add Renesas R-Car X5H R8A78000 Ironhide board code
Hai Pham [Tue, 2 Dec 2025 18:34:16 +0000 (19:34 +0100)]
arm64: dts: renesas: Add Renesas R-Car X5H R8A78000 Ironhide board code

Add initial support for Renesas R-Car X5H R8A78000 Ironhide board.
This consists mainly of DTs, Makefile and Kconfig entries and board
specific configuration files.

The DTs will be gradually switched over to Linux DTs via OF_UPSTREAM
once Linux DTs become available upstream, as upstreaming progresses.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
33 hours agoarm64: dts: renesas: Add Renesas R-Car X5H R8A78000 SoC DTs
Hai Pham [Tue, 2 Dec 2025 18:34:15 +0000 (19:34 +0100)]
arm64: dts: renesas: Add Renesas R-Car X5H R8A78000 SoC DTs

Add initial device trees for Renesas R-Car X5H R8A78000 SoC.
Include very basic clock, reset, power domain headers which
are used to control supported peripherals via SCMI / SCP. The
headers are currently kept limited to avoid possible ABI break.
A lot of clock are still stubbed via fixed-clock, this is going
to be gradually removed over time, as more of the platform is
upstreamed.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Khanh Le <khanh.le.xr@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
33 hours agoarm64: renesas: Add Renesas R-Car Gen5 infrastructure
Hai Pham [Tue, 2 Dec 2025 18:34:14 +0000 (19:34 +0100)]
arm64: renesas: Add Renesas R-Car Gen5 infrastructure

Add initial changes to support Renesas R-Car Gen5 SoC.

Introduce Kconfig entries, architecture headers and PRR IDs for Renesas
R-Car Gen5 and R-Car X5H R8A78000 SoC. Add Makefile change to produce
u-boot-elf.srec with correct offset for installation tooling. Update
MAINTAINERS entry to cover both r8a77nnn and r8a78nnn .

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
33 hours agomailbox: renesas: Add Renesas MFIS Multifunctional Interface mailbox driver
Tuyen Dang [Mon, 27 Oct 2025 16:39:17 +0000 (17:39 +0100)]
mailbox: renesas: Add Renesas MFIS Multifunctional Interface mailbox driver

Add support for the Renesas MFIS mailbox, which provides an interface
between the different CPU Cores, such as AP System Core domain and the
Realtime Core domain, SCP Core domain and AP System Core domain or
Realtime Core domain and AP System Core domain or Realtime Core domain.

Signed-off-by: Tuyen Dang <tuyen.dang.xa@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Update the driver
[Marek: Rename the driver to renesas-mfis, simplify the driver.
        Always use only one TX channel and no RX channel, drop all
unnecessary code. Perform 1ms delay in send callback which
is perfectly fine to do in U-Boot which does RX polling]

33 hours agoclk: renesas: Introduce temporary compound clock for SCP compatibility
Marek Vasut [Mon, 27 Oct 2025 16:33:07 +0000 (17:33 +0100)]
clk: renesas: Introduce temporary compound clock for SCP compatibility

The current state of SCP on Renesas R-Car Gen5 is not yet final and
is still missing full clock control, the clock control is exposed as
separate enable/disable and rate controls.

Temporarily introduce custom local compound clock, which are used as
an adaptation layer between U-Boot clock tree and current state of
SCP, and which bind two SCP clock into a single compound clock, which
provides both enable/disable and rate controls.

This is mainly meant to be used by SD/eMMC controller, to allow the
driver to both turn its clock on and off, and also obtain the current
clock rate. This is going to be removed once the SCP clock protocol
solidifies.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
33 hours agosh: Assure end of U-Boot is at 8-byte aligned offset
Marek Vasut [Wed, 19 Nov 2025 17:44:36 +0000 (18:44 +0100)]
sh: Assure end of U-Boot is at 8-byte aligned offset

Make sure the end of U-Boot is at 8-byte aligned offset, not 4-byte
aligned offset. This allows safely appending DT at the end of U-Boot
with the guarantee that the DT will be at 8-byte aligned offset. This
8-byte alignment is now checked by newer libfdt 1.7.2 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
35 hours agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Tue, 2 Dec 2025 21:25:14 +0000 (15:25 -0600)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh

Two fixes for R-Car Gen4 and CONFIG_ENV_OVERWRITE=n to always expect
"setenv -f" to be used when overwriting ethernet MAC on all R-Car.

38 hours agoMerge tag 'u-boot-at91-fixes-2026.01-a' of https://source.denx.de/u-boot/custodians...
Tom Rini [Tue, 2 Dec 2025 18:23:15 +0000 (12:23 -0600)]
Merge tag 'u-boot-at91-fixes-2026.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91

First set of u-boot-at91 fixes for the 2026.01 cycle:

This small fixes set includes a fix on the mtd pmecc driver.

38 hours agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-samsung
Tom Rini [Tue, 2 Dec 2025 18:19:52 +0000 (12:19 -0600)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-samsung

- Assorted updates

38 hours agoarm64: renesas: r8a779g3: Use redundant env on Retronix R-Car V4H Sparrow Hawk board
Marek Vasut [Wed, 19 Nov 2025 20:36:59 +0000 (21:36 +0100)]
arm64: renesas: r8a779g3: Use redundant env on Retronix R-Car V4H Sparrow Hawk board

The redundant environment offset is already set in board configuration,
but the redundant environment itself is not explicitly enabled. Make
sure the redundant environment is enabled, as we most certainly do want
to have two copies of the environment.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
38 hours agoARM: renesas: Disable CONFIG_ENV_OVERWRITE on all boards
Marek Vasut [Thu, 6 Nov 2025 19:13:24 +0000 (20:13 +0100)]
ARM: renesas: Disable CONFIG_ENV_OVERWRITE on all boards

The CONFIG_ENV_OVERWRITE allows easy rewrite of environment variables
like 'ethaddr' and 'serial#' without any protection against accidental
removal of those variables. Remove this setting to add extra layer of
protection to those variables. The variables can still be overridden
using 'env set -f' (force set) if really needed.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
38 hours agoARM: dts: renesas: Enable R8A779G0 V4H White Hawk RPC SPI DT node
Marek Vasut [Wed, 19 Nov 2025 20:39:48 +0000 (21:39 +0100)]
ARM: dts: renesas: Enable R8A779G0 V4H White Hawk RPC SPI DT node

Disabling RPC breaks SPL boot on R-Car V4H White Hawk board, re-enable RPC.

Fixes: 1d94364c7f17 ("ARM: dts: renesas: Disable R8A779G0 V4H White Hawk RPC SPI DT node again")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2 days agodoc: samsung: exynos-mobile: add documentation for exynos7870
Kaustabh Chakraborty [Fri, 24 Oct 2025 17:28:29 +0000 (22:58 +0530)]
doc: samsung: exynos-mobile: add documentation for exynos7870

Document the image preparation and flashing techniques for
Exynos7870-based boards. This is done in a separate file in a
sub-directory, which is linked back to the main documentation.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2 days agoboard: samsung: exynos-mobile: add exynos7870 support and three devices
Kaustabh Chakraborty [Fri, 24 Oct 2025 17:28:28 +0000 (22:58 +0530)]
board: samsung: exynos-mobile: add exynos7870 support and three devices

Add basic support for the Exynos7870 SoC, this includes device tree
match logic using multiple boards, where devices use a stub dtb in
Samsung's QCDT format. S-BOOT, the previous stage bootloader, places its
cmdline arguments there, which has identifying information.

This is added with support for three devices:
 * Samsung Galaxy A2 Core (codename: a2corelte)
 * Samsung Galaxy J6 (codename: j6lte)
 * Samsung Galaxy J7 Prime (codename: on7xelte)

Add their device trees in the defconfig, and also enable the clock and
pin controller drivers.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2 days agoboard: samsung: add support for Samsung Exynos mobile device boards
Kaustabh Chakraborty [Fri, 24 Oct 2025 17:28:27 +0000 (22:58 +0530)]
board: samsung: add support for Samsung Exynos mobile device boards

Add support for a generic platform which intends to support multiple
boards powered by ARMv8 Samsung Exynos SoCs. Some important features
include:
 * Fastboot: This is present to provide an open alternative to Samsung's
   proprietary Odin protocol. The board file configures certain features
   for fastboot, such as a dynamically allocated fastboot buffer, and
   standardized (lowercase) partition aliases.
 * EFI: Kernel image can be loaded from an EFI partition. This
   adopts a standard booting process, which multiple OS distributions
   can rely on.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2 days agoMerge tag 'u-boot-socfpga-next-20251201' of https://source.denx.de/u-boot/custodians...
Tom Rini [Mon, 1 Dec 2025 16:37:45 +0000 (10:37 -0600)]
Merge tag 'u-boot-socfpga-next-20251201' of https://source.denx.de/u-boot/custodians/u-boot-socfpga

This pull request delivers a broad set of improvements across the
SoCFPGA family, including Agilex5, Cyclone V, SoC64, and common code.
Key updates include refined boot flows, new driver enablement, handoff
tooling enhancements, and several stability fixes.

Highlights:

* Agilex5:
  - Enable FAT-based environment storage
  - MMC driver restores legacy clkmgr-based clock lookup
  - Cleanup of MMC raw mode enablement logic

* Cyclone V:
  - SPL FAT boot support and updated bootcmd sequence
  - Disable SPL SPI to prevent contention with FAT-based boot
  - New board handoff script and BSP generator tooling
  - Optimized Makefile support for SoCFPGA handoff workflows* New drivers:
  - Cadence xSPI driver with full protocol and command support
  - SPL enablement for DW APB GPIO controller

* Networking:
  - xgmac MDIO now supports Clause 45 read/write operations

* NAND / SoC64:
  - Enable ONFI detection in Denali NAND controller for SoC64 devices

* DTS and board updates:
  - Sync common SoCFPGA U-Boot DTS with kernel sources
  - Fixes for FPGA2SDRAM configuration and SoCFPGA boot stall behavior
  - Vining_FPGA migrated to the modern LED framework
  - Device tree relocation no longer forced off for Vining FPGA

* Tooling:
  - Introduces a new Python-based Cyclone V BSP generator
    covering EMIF, IOCSR, HPS, XML parsing, rendering, and documentation
    to simplify board enablement and handoff regeneration workflows

Overall, this series improves boot robustness, enhances xSPI and MDIO
capabilities, modernizes board support, and introduces new tooling to
streamline SoCFPGA handoff generation.

Pipelines test passing
https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/28569

2 days agoMerge tag 'net-20251201' of https://source.denx.de/u-boot/custodians/u-boot-net
Tom Rini [Mon, 1 Dec 2025 16:26:02 +0000 (10:26 -0600)]
Merge tag 'net-20251201' of https://source.denx.de/u-boot/custodians/u-boot-net

Pull request net-20251201

net:
- phy: broadcom: fix RGMII delays for BCM54210E
- phy: dp83869: fix STRAP_OPMODE bitmask

2 days agoAzure: Rework jobs for disk space and 29 jobs
Tom Rini [Wed, 26 Nov 2025 23:49:46 +0000 (17:49 -0600)]
Azure: Rework jobs for disk space and 29 jobs

The problem we face currently with Azure jobs is that we're running out
of disk space on the runners as we build. There's not a good way to
split approximately 1500 configurations across 10 jobs and not be close
to or exceeding that limit. Split this in to 29 jobs instead with a goal
of averaging an hour per job. This split gets us close, but there are
still some challenging jobs to try and break up further. The list is
mostly alphabetized but with some intentional changes (catch-all are
last, mx/imx are together, SoC family splits are just grouped together).

The average build time should be close to the same, but outliers can and
will happen.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 days agoAdd optimized Makefile support for SoCFPGA handoff
Brian Sune [Mon, 1 Dec 2025 09:04:07 +0000 (17:04 +0800)]
Add optimized Makefile support for SoCFPGA handoff

- Introduce socfpga_g5_handoff_prepare target in U-Boot
  arch/arm/mach-socfpga/config.mk
- Users can convert the handoff via make prepare.
- Detects Altera/Intel SoCFPGA boards from .config
- Combines vendor/board extraction into a single shell call
- Checks for hps_isw_handoff folder and .hiof files
- Uses ls -d instead of find for faster folder detection
- Runs BSP generator script only if files exist
- Non-blocking: continues if handoff folder or files are missing
- HANDOFF_PATH user define allows overriding auto-detected folder
- Minimizes subshells and other slow constructs for faster CI

Signed-off-by: Brian Sune <briansune@gmail.com>
3 days agonet: phy: broadcom: fix RGMII delays for BCM54210E
Michael Walle [Thu, 27 Nov 2025 15:25:27 +0000 (16:25 +0100)]
net: phy: broadcom: fix RGMII delays for BCM54210E

bcm54210e_config() configures the RGMII delays and then calls
bcm5461_config(). But the latter will do a PHY soft reset and thus
resets the delay settings again. Call bcm5461_config() first to fix it.

Fixes: cba79a1b2e11 ("net: phy: broadcom: add support for BCM54210E")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Rafał Miłecki <rafal@milecki.pl>
3 days agonet: phy: dp83869: fix STRAP_OPMODE bitmask
Thanh Quan [Mon, 27 Oct 2025 14:03:58 +0000 (15:03 +0100)]
net: phy: dp83869: fix STRAP_OPMODE bitmask

According to the TI DP83869HM datasheet Revision D (June 2025), section
7.6.1.41 STRAP_STS Register, the STRAP_OPMODE bitmask is bit [11:9].
Fix this.

In case the PHY is auto-detected via PHY ID registers, or not described
in DT, or, in case the PHY is described in DT but the optional DT property
"ti,op-mode" is not present, then the driver reads out the PHY functional
mode (RGMII, SGMII, ...) from hardware straps.

Currently, all upstream users of this PHY specify both DT compatible string
"ethernet-phy-id2000.a0f1" and ti,op-mode = <DP83869_RGMII_COPPER_ETHERNET>
property, therefore it seems no upstream users are affected by this bug.

The driver currently interprets bits [2:0] of STRAP_STS register as PHY
functional mode. Those bits are controlled by ANEG_DIS, ANEGSEL_0 straps
and an always-zero reserved bit. Systems that use RGMII-to-Copper functional
mode are unlikely to disable auto-negotiation via ANEG_DIS strap, or change
auto-negotiation behavior via ANEGSEL_0 strap. Therefore, even with this bug
in place, the STRAP_STS register content is likely going to be interpreted
by the driver as RGMII-to-Copper mode.

However, for a system with PHY functional mode strapping set to other mode
than RGMII-to-Copper, the driver is likely to misinterpret the strapping
as RGMII-to-Copper and misconfigure the PHY.

For example, on a system with SGMII-to-Copper strapping, the STRAP_STS
register reads as 0x0c20, but the PHY ends up being configured for
incompatible RGMII-to-Copper mode.

Fixes: f3e22eea815d ("net: phy: add TI DP83869HM ethernet driver")
Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Use FIELD_GET()
3 days agoconfigs: cyclone5: Disable SPI in SPL
Alif Zakuan Yuslaimi [Tue, 25 Nov 2025 08:13:16 +0000 (00:13 -0800)]
configs: cyclone5: Disable SPI in SPL

Disable support for using SPI in SPL to solve Cyclone V storage issue as
the OCRAM is only 64kb. The SPI configurations are only
required during uboot proper only.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agoconfigs: cyclone5: Update boot command for CycloneV
Alif Zakuan Yuslaimi [Tue, 25 Nov 2025 08:13:15 +0000 (00:13 -0800)]
configs: cyclone5: Update boot command for CycloneV

Update CycloneV boot command to sync with Altera official release

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agoconfigs: cyclone5: Enable SPL FAT support
Alif Zakuan Yuslaimi [Tue, 25 Nov 2025 08:13:14 +0000 (00:13 -0800)]
configs: cyclone5: Enable SPL FAT support

Enable support for FAT filesystem with SPL for CycloneV instead of raw
mode.

Recent changes breaks CycloneV MMC boot from raw mode, and so we are taking
this opportunity to migrate MMC boot mode to FAT as smaller OCRAM size is
required, as well as aligning MMC boot flow with our other devices.

Fixes: 2a00d73d081a1 ("spl: mmc: Try to clean up raw-mode options")

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agospl: Remove ARCH_SOCFPGA from MMC raw mode enablement
Alif Zakuan Yuslaimi [Tue, 25 Nov 2025 08:13:13 +0000 (00:13 -0800)]
spl: Remove ARCH_SOCFPGA from MMC raw mode enablement

We no longer use raw mode to boot from MMC for our devices in favor
of FAT filesystem.

Maintaining this config for legacy gen5 devices as to not risk breaking
any configurations still utilizing raw mode.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agommc: socfpga_dw_mmc: Restore legacy clkmgr address retrieval
Alif Zakuan Yuslaimi [Tue, 25 Nov 2025 08:13:12 +0000 (00:13 -0800)]
mmc: socfpga_dw_mmc: Restore legacy clkmgr address retrieval

Restore legacy implementation of retrieving clkmgr base address from
mach-socfpga/misc.c driver for our legacy devices.

Excluding Agilex7/7M from this implementation as these devices' clock
driver is already following clock driver model and is supporting
enable/disable APIs.

The legacy devices' clock driver will have to be refactored to support
driver model which enables us to support enable/disable APIs for these
devices.

Fixes: ab27182cac8f ("mmc: socfpga_dw_mmc: Enable/disable SDMMC clock via API")

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agoconfigs: cyclone5: Disable mkeficapsule tool build
Alif Zakuan Yuslaimi [Tue, 25 Nov 2025 08:13:09 +0000 (00:13 -0800)]
configs: cyclone5: Disable mkeficapsule tool build

mkeficapsule tool will be built by default if EFI_LOADER is set due to
commit b7a625b1ce49 ("tools: Build mkeficapsule tool by default if
EFI_LOADER is set").

This will cause compilation error on all our SoCFPGA devices, hence we will
be disabling this config as we do not utilize this tool.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agoboard: softing: vining: migrate to modern LED framework
Quentin Schulz [Wed, 19 Nov 2025 17:19:55 +0000 (18:19 +0100)]
board: softing: vining: migrate to modern LED framework

This migrates from the legacy LED API to use the modern LED framework
which makes use of the FDT.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Acked-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agosocfpga_vining_fpga: Stop disabling device tree relocation
Tom Rini [Wed, 19 Nov 2025 14:55:38 +0000 (08:55 -0600)]
socfpga_vining_fpga: Stop disabling device tree relocation

Remove setting of fdt_high to ~0, which disables device tree relocation,
from the default environment. Doing so prevents U-Boot from correcting
problems such as having an unaligned device tree and leads to various
failure modes in the OS.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
3 days agoAltera SoCFpga Boot Stall Fix
Brian Sune [Fri, 14 Nov 2025 16:04:23 +0000 (00:04 +0800)]
Altera SoCFpga Boot Stall Fix

Since U-Boot 2025.07 pure SD Card
boot no longer works. Now Altera released 2025.07
shows the different on the u-boot files.
After testing, the major root case is
get_managers_addr. And this patch fix the
SD boot stall via pulling from offical.

Signed-off-by: Brian Sune <briansune@gmail.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agosync socfpga common u-boot dts
Brian Sune [Mon, 10 Nov 2025 05:00:40 +0000 (13:00 +0800)]
sync socfpga common u-boot dts

The dtsi for socfpga common should
turn on L2 and memory and no reason not
to do so

Signed-off-by: Brian Sune <briansune@gmail.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agonand: denali: enable ONFI detection for SoCFPGA SoC64
Dinesh Maniyam [Tue, 4 Nov 2025 17:16:17 +0000 (01:16 +0800)]
nand: denali: enable ONFI detection for SoCFPGA SoC64

Enable ONFI parameter page detection for SoCFPGA SoC64 devices by
selecting SYS_NAND_ONFI_DETECTION in the NAND_DENALI Kconfig entry.

This allows SoCFPGA SoC64 platforms using the Denali NAND controller
to automatically detect NAND parameters via the ONFI interface instead
of relying on hardcoded configuration values.

The selection is limited to TARGET_SOCFPGA_SOC64 to avoid affecting
non-SoC64 platforms that use legacy NAND handling.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agoCyclone V Board handsoff script
Brian Sune [Fri, 31 Oct 2025 18:04:19 +0000 (02:04 +0800)]
Cyclone V Board handsoff script

Since turning from old build flow.
New Altera SoCFPGA requires converting handsoff
conversion via the python script. This is from
official provided, and now sync to U-Boot with
better location at tools/cv_xxxx. Meantime,
requirement.txt is also provided to further
explain the libraries require for these scripts.

Signed-off-by: Brian Sune <briansune@gmail.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agospi: cadence: Add driver for xSPI
Boon Khai Ng [Mon, 27 Oct 2025 06:36:54 +0000 (14:36 +0800)]
spi: cadence: Add driver for xSPI

This patch ports the Cadence xSPI controller driver from
the Linux kernel. The controller supports three operating modes:

1. ACMD (Auto Command) mode
   - Includes PIO and CDMA submodes.
   - CDMA mode uses linked descriptors for high-performance,
     low-overhead operation.
   - PIO mode is suitable for simple, single-command transactions.

2. STIG (Software Triggered Instruction Generator) mode
   - Issues low-level 128-bit instructions to memory.
   - Uses the Slave DMA interface for data transfers.

3. Direct mode
   - Enables direct data access through the slave interface
     without commands.

Currently, only the STIG work mode is enabled. Additional modes will be
supported in future updates.

At the same time, also enabling the kconfig option for xSPI driver.

This driver has been ported and functionally verified on the Intel Simics
platform. It is intended for evaluation and experimental use at this stage.

Link: https://lore.kernel.org/all/1632038734-23999-1-git-send-email-pthombar@cadence.com/
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agoconfigs: agilex5: Enable FAT-based environment storage in defconfig
Alif Zakuan Yuslaimi [Thu, 23 Oct 2025 08:51:22 +0000 (01:51 -0700)]
configs: agilex5: Enable FAT-based environment storage in defconfig

Enable storing the U-Boot environment in a FAT filesystem for Agilex5.

This allows the board to read and write environment variables from the
first partition of the first device formatted with FAT, in addition to the
existing UBI-based environment configuration.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agoFPGA2SDRAM setup fix
Brian Sune [Mon, 20 Oct 2025 13:35:54 +0000 (21:35 +0800)]
FPGA2SDRAM setup fix

After testing, w/o proper setup
the FPGA2SDRAM bridge will not work and stall.
Pulling from official fix and w/o this initialization,
both 2025.07 and 2025.10 also suffer stall on U-Boot
and distro. Any FPGA to HPS-SDRAM action will immediate
stall the CPU. As such, this patch fix the issue.

Signed-off-by: Brian Sune <briansune@gmail.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
3 days agogpio: dwapb: Enable SPL support for DWAPB GPIO driver
Tanmay Kathpalia [Wed, 15 Oct 2025 15:44:45 +0000 (08:44 -0700)]
gpio: dwapb: Enable SPL support for DWAPB GPIO driver

Add SPL_DWAPB_GPIO configuration option to enable the Designware APB
GPIO driver in SPL builds.

Changes:
- Add SPL_DWAPB_GPIO Kconfig option with SPL_DM_GPIO dependency
- Update Makefile to use CONFIG_$(PHASE_)DWAPB_GPIO pattern for
  conditional compilation in both SPL and main U-Boot builds

Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 days agonet: xgmac: Augment mdio read/write with cl-45 format support
Nikunj Kela [Fri, 29 Aug 2025 04:12:32 +0000 (21:12 -0700)]
net: xgmac: Augment mdio read/write with cl-45 format support

Currently, clause-22 format is supported. This change adds
support for clause-45 format.

Signed-off-by: Nikunj Kela <nikunj.kela@sima.ai>
Reviewed-by: Boon Khai Ng <boon.khai.ng@altera.com>
Tested-by: Boon Khai Ng <boon.khai.ng@altera.com>
Reviewed-by: Boon Khai Ng <boon.khai.ng@altera.com>
Tested-by: Boon Khai Ng <boon.khai.ng@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
5 days agoMerge tag 'rpi-2026.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-raspbe...
Tom Rini [Fri, 28 Nov 2025 14:26:44 +0000 (08:26 -0600)]
Merge tag 'rpi-2026.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi

Updates for RPi for 2026.01-rc4:

- rpi: Fix DRAM size reporting to show total RAM
- rpi: Use the U-Boot control FDT for fdt_addr
- pinctrl: bcm283x: Add GPIO pull-up/down control for BCM2835 and BCM2711
- rpi: Fix compilation with larger configs

5 days agoMerge branch 'master' of git://source.denx.de/u-boot-usb
Tom Rini [Fri, 28 Nov 2025 14:25:20 +0000 (08:25 -0600)]
Merge branch 'master' of git://source.denx.de/u-boot-usb

- A Kconfig dependency fix and a patch to avoid a noisy print

5 days agorpi: Fix DRAM size reporting to show total RAM
Anders Roxell [Tue, 25 Nov 2025 10:23:58 +0000 (11:23 +0100)]
rpi: Fix DRAM size reporting to show total RAM

The VideoCore mailbox GET_ARM_MEMORY only reports the size of the
first accessible memory region (~947 MiB on RPi4 with 8GB), not the
total RAM. This causes U-Boot to display "DRAM: 947 MiB (total 7.9 GiB)"
instead of "DRAM: 7.9 GiB".

On Raspberry Pi 4 with 8GB RAM, the memory is split across multiple
non-contiguous banks. The dram_init() function only sets gd->ram_size
to the first bank size reported by the VideoCore firmware, while
fdtdec_setup_memory_banksize() correctly populates all memory banks
from the device tree.

Fix this by updating gd->ram_size after dram_init_banksize() has
populated all memory banks, so it reflects the actual total RAM
across all banks.

Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
6 days agousb/xhci: avoid noisy 'Register NbrPorts' message
Heinrich Schuchardt [Thu, 27 Nov 2025 17:54:25 +0000 (18:54 +0100)]
usb/xhci: avoid noisy 'Register NbrPorts' message

We should avoid overwhelming users with non-essential messages.

'Register NbrPorts' is a debug message for EHCI. Do the same for XHCI.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
6 days agoconfigs: toradex-smarc-imx95: set spl_stack
Max Krummenacher [Wed, 26 Nov 2025 13:41:04 +0000 (14:41 +0100)]
configs: toradex-smarc-imx95: set spl_stack

The SPL_STACK config option now depends on having SPL_HAVE_INIT_STACK
defined. This made savedefconfig dropping SPL_STACK when sending the
initial configuration.
Note that SPL/U-Boot are able to boot linux from mass storage with
SPL_STACK not set but other use cases might run out of stack or
overlap with other RAM use.

Compare with:
commit d6a53f523afe ("spl: Add an SPL_HAVE_INIT_STACK option")
commit 25fefa05d732 ("configs: Resync with savedefconfig")

Fixes: ff0540fcfe49 ("board: toradex: add Toradex SMARC iMX95")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
6 days agousb: USB_EHCI_PCI depends on PCI
Heinrich Schuchardt [Sat, 15 Nov 2025 09:58:20 +0000 (10:58 +0100)]
usb: USB_EHCI_PCI depends on PCI

CONFIG_USB_EHCI_PCI cannot work without CONFIG_PCI.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
6 days agobootstd: rauc: Only require partitions for one slot
Leonard Anderweit [Tue, 18 Nov 2025 14:30:21 +0000 (15:30 +0100)]
bootstd: rauc: Only require partitions for one slot

Partitions can be become unusable due to power cuts or failed updates.
Use the bootmeth RAUC if partitions for at least one slot exist. The
bootmeth can then select the working slot.

Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Tested-by: Martin Schwan <m.schwan@phytec.de>
6 days agobootstd: rauc: Don't check root part filesystem
Leonard Anderweit [Tue, 18 Nov 2025 14:30:20 +0000 (15:30 +0100)]
bootstd: rauc: Don't check root part filesystem

Only check if the root partition exists when scanning for the slots
partitions and not if the filesystem can be accessed. It is not needed
to access the filesystem of the root partition as it might not be
supported by u-boot or be encrypted.

Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Tested-by: Martin Schwan <m.schwan@phytec.de>
6 days agoboard: adi: Fix missing semicolon in nfsroot
Greg Malysa [Wed, 26 Nov 2025 19:50:31 +0000 (14:50 -0500)]
board: adi: Fix missing semicolon in nfsroot

The nfsroot constructed as part of the default Analog Devices boot
strategy is missing a semicolon between the server ip and the root path
itself. This adds the missing semicolon.

Signed-off-by: Greg Malysa <malysagreg@gmail.com>
6 days agoboard: ti: am335x: Fix DM_TPS65910 condition
Maarten Brock [Tue, 25 Nov 2025 13:55:24 +0000 (13:55 +0000)]
board: ti: am335x: Fix DM_TPS65910 condition

scale_vcores_generic() calls functions implemented in
tps65910.c, not tps65910_dm.c. Change guard from CONFIG_DM_PMIC_TPS65910 to
CONFIG_SPL_POWER_TPS65910.

Fixes: 0b9ff0851592 ("board: ti: am335x: Do not call disabled PMIC functions")
Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
Signed-off-by: Maarten Brock <maarten.brock@sttls.nl>
Reviewed-by: Kory Maincent <kory.maincent@bootlin.com>
Acked-by: Maarten Brock <maarten.brock@sttls.nl>
6 days agoboard: ti: am6x: Restore do_board_detect functions
Guillaume La Roque (TI.com) [Mon, 24 Nov 2025 15:09:47 +0000 (16:09 +0100)]
board: ti: am6x: Restore do_board_detect functions

This patch fixes a boot failure on the AM64x EVM that was introduced when the do_board_detect function was removed during a refactoring.

It restores the do_board_detect function for the AM64x, AM62x, and AM65x boards to ensure the common board detection logic is executed correctly.

Fixes: 804b80288ac ("board: am65x: Use generic AM6x board detection function")
Fixes: ce56e553c31 ("board: am64x: Use generic AM6x board detection functions")
Fixes: ff1b83c095c ("board: am62x: Add support for reading eeprom data")
Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
6 days agonet: ti: am65-cpsw-nuss: Ignore disabled ethernet ports
Siddharth Vadapalli [Fri, 21 Nov 2025 13:21:53 +0000 (18:51 +0530)]
net: ti: am65-cpsw-nuss: Ignore disabled ethernet ports

Currently, the bind callback of the driver namely am65_cpsw_nuss_bind()
registers all ethernet ports including the ones that have been disabled
in the device-tree. Since the ports that have been disabled are ought to
be ignored, fix the implementation to register only the enabled ports as
indicated by their 'status' in their respective device-tree node.

Fixes: 3943531a5468 ("net: ti: am65-cpsw-nuss: Define bind method for CPSW driver")
Reported-by: Wadim Egorov <w.egorov@phytec.de>
Closes: https://patch.msgid.link/8b4ac072-125c-493b-b12a-f0a4e9d56e7e@phytec.de
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
6 days agopower: domain: ti: fix ti_pd_get() to return after verifying transition
Siddharth Vadapalli [Tue, 18 Nov 2025 12:20:52 +0000 (17:50 +0530)]
power: domain: ti: fix ti_pd_get() to return after verifying transition

The helper function "ti_pd_get()" is responsible for powering on a
domain if it is powered off. In the current implementation, if a power
domain is determined to be powered off - no prior users and the PDCTL
register indicates that the user desired state is OFF, then powering on
the domain constitutes setting 'PDCTL_STATE_ON' field of the PDCTL
register.

While the current implementation indeed requests the power domain to be
transition to the ON state, the helper function "ti_pd_get()" doesn't
verify that the power domain has 'transitioned' to the ON state before
returning to its caller. As a result, it is possible that the device(s)
belonging to the power domain may be accessed before it is truly powered
on, leading to a bus abort.

Fix this by waiting for the power domain to transition to the ON state
by using "ti_pd_wait()" before returning from "ti_pd_get()".

Fixes: 144464bd2c67 ("power: domain: Introduce driver for raw TI K3 PDs")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Tested-by: Hrushikesh Salunke <h-salunke@ti.com>
6 days agocmd/extension: avoid NULL pointer dereference
Heinrich Schuchardt [Sun, 16 Nov 2025 11:41:53 +0000 (12:41 +0100)]
cmd/extension: avoid NULL pointer dereference

extension_get_list() will return NULL if there is no extension device.
Check for this situation.

Addresses-Coverity-ID: 638557 - Null pointer dereferences (NULL_RETURNS)
Fixes: 2d12958ee71b ("boot: Remove legacy extension board support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Kory Maincent <kory.maincent@bootlin.com>
7 days agoMerge tag 'u-boot-imx-master-20251126' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Wed, 26 Nov 2025 21:53:00 +0000 (15:53 -0600)]
Merge tag 'u-boot-imx-master-20251126' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/28502

- Fix i.MX8ULP boot regression.
- Fix colibri-imx7 fdtfile overwrite.
- Fix some i.MX91 pinmux macro definitions.

7 days agoCI: Update to latest container
Tom Rini [Wed, 26 Nov 2025 16:30:24 +0000 (10:30 -0600)]
CI: Update to latest container

- Move to jammy-20251013 tag
- Bring in tkinter so that FATtools should run and more tests should be
  run.
- Update to QEMU 10.0.6
- Pick tags for (most of) trace-cmd

Signed-off-by: Tom Rini <trini@konsulko.com>
7 days agoDockerfile: Update building trace tools slightly
Tom Rini [Wed, 26 Nov 2025 16:21:54 +0000 (10:21 -0600)]
Dockerfile: Update building trace tools slightly

We have not been picking a tag for the trace-cmd build process.
Currently the tip of libtraceevent fails to build. Address both problems
here by picking recent stable tags for libtraceevent and libtracefs
(trace-cmd has no recent tags). Further, as it is often reported that
this fails to build due to a race, stop using "make -j$(nproc)" as this
is also small enough of a set of builds to not be an issue.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 days agoDockerfile: Include python3-tk for FATtools
Tom Rini [Thu, 13 Nov 2025 22:09:56 +0000 (16:09 -0600)]
Dockerfile: Include python3-tk for FATtools

In some cases our tests for exFAT don't run because we fail to be able
to create the underlying image. This is in turn because while creation
of the image succeeds, it seems that some way of how we invoke FATtools
wants to import tkinter, that fails and so the test stops there. Having
tkinter available (and then presumably a fallback to non-GUI because
it's not available) leads to the tests running as expected.

Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
7 days agoDocker: Update QEMU to 10.0.6
Tom Rini [Wed, 19 Nov 2025 14:32:58 +0000 (08:32 -0600)]
Docker: Update QEMU to 10.0.6

The QEMU project has the 10.0.x series as an LTS release. While we are
not doing an LTS ourselves, we can be confident in the changes between
10.0.2 and 10.0.6, so update ourselves.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 days agos5p4418_nanopi2: Stop disabling device tree relocation
Tom Rini [Wed, 19 Nov 2025 14:55:35 +0000 (08:55 -0600)]
s5p4418_nanopi2: Stop disabling device tree relocation

Remove setting of fdt_high to ~0, which disables device tree relocation,
from the default environment. Doing so prevents U-Boot from correcting
problems such as having an unaligned device tree and leads to various
failure modes in the OS.

Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 days agoboard: samsung: e850-96: Enter DFU automatically on USB boot
Sam Protsenko [Tue, 18 Nov 2025 23:21:19 +0000 (17:21 -0600)]
board: samsung: e850-96: Enter DFU automatically on USB boot

Doing USB boot on E850-96 is most useful in two cases:

  1. For unbricking the board
  2. During the bootloader development

In both cases a U-Boot binary is being re-flashed to eMMC. The most
convenient way to update U-Boot in eMMC is by using DFU. Implement
entering DFU flashing mode automatically when U-Boot is executed on USB
boot. That makes it easier for users to re-flash U-Boot without even
having serial console running, e.g.:

    $ ./smdk-usbdl
    $ dfu-util -D u-boot.bin -a bootloader

See [1,2] for details.

Entering DFU mode is implemented by setting corresponding environment
variables:

    bootcmd="dfu 0 mmc 0"
    bootdelay=0

Do not save the U-Boot environment though, to avoid falling through to
DFU mode on a regular eMMC boot.

[1] doc/board/samsung/e850-96.rst
[2] https://gitlab.com/LinaroLtd/e850-96/tools/dltool/-/tree/uboot

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 days agoboard: samsung: e850-96: Load firmwares over USB on USB boot
Sam Protsenko [Tue, 18 Nov 2025 23:21:18 +0000 (17:21 -0600)]
board: samsung: e850-96: Load firmwares over USB on USB boot

During USB boot it's expected that the bootloader (U-Boot) should
download LDFW and TZSW firmware binaries over USB, using corresponding
SMC call. Once it's done, the Boot ROM code can release the USB block,
so that it can be used in U-Boot (e.g. for flashing images to eMMC using
DFU or fastboot). Otherwise USB wouldn't be accessible in U-Boot, and
any attempt to access USB PHY or DWC3 registers will lead to abort.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 days agoboard: samsung: e850-96: Add routine for loading images over USB
Sam Protsenko [Tue, 18 Nov 2025 23:21:17 +0000 (17:21 -0600)]
board: samsung: e850-96: Add routine for loading images over USB

During USB boot U-Boot is supposed to download some firmware over USB.
It's done by EL3 software, so it has to be requested via corresponding
SMC call. Implement a routine for doing that.

No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 days agoboard: samsung: e850-96: Split LDFW loading and init
Sam Protsenko [Tue, 18 Nov 2025 23:21:16 +0000 (17:21 -0600)]
board: samsung: e850-96: Split LDFW loading and init

The LDFW firmware loading is done in two steps:

  1. Read the firmware binary from some block device
  2. Provide it to EL3 monitor software via an SMC call, so it can copy
     it to a Secure World memory and start using it

Let's split the load_ldfw() function by two functions correspondingly,
to reflect that process better:

  - load_ldfw_from_blk()
  - init_ldfw()

It can be useful in case when the LDFW binary should be obtained from
some different media, e.g. downloaded over USB during USB boot.

No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 days agoboard: samsung: e850-96: Add routines for checking boot dev
Sam Protsenko [Tue, 18 Nov 2025 23:21:15 +0000 (17:21 -0600)]
board: samsung: e850-96: Add routines for checking boot dev

Implement functionality to check the current boot device (a device where
the SoC ROM code is loading the bootloaders from). The boot device order
can be changed using the SW1 DIP switch on the E850-96 board (which
controls XOM SoC lines), as stated in [1].

The boot device information is requested from EL3 software using the
corresponding SMC call, which in turn reads it from iRAM memory, which
was written by the ROM code. New routines decode that data and allow the
user to check the current boot device, boot order, etc. That API can be
used further to implement different code flows depending on the current
boot device, e.g.:

  - on eMMC boot: obtain the firmware binaries from eMMC
  - on USB boot: download the firmware over USB instead

No functional change; this patch only adds new functionality but it's
not used yet.

[1] doc/board/samsung/e850-96.rst

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 days agoboard: samsung: e850-96: Keep public functions together
Sam Protsenko [Tue, 18 Nov 2025 23:21:14 +0000 (17:21 -0600)]
board: samsung: e850-96: Keep public functions together

Move DRAM init functions close to other public functions, to make things
visually distinct and improve the readability.

No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 days agoarm: dts: imx8ulp: Disable wdog3 until DM watchdog support is available
Alice Guo [Thu, 20 Nov 2025 11:23:00 +0000 (19:23 +0800)]
arm: dts: imx8ulp: Disable wdog3 until DM watchdog support is available

The driver model for watchdog timer is not enabled yet, so disable wdog3
temporarily.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
8 days agoarm: dts: imx8ulp: Ensure mu@27020000 and lpuart5 availability during all boot phases
Alice Guo [Thu, 20 Nov 2025 11:22:59 +0000 (19:22 +0800)]
arm: dts: imx8ulp: Ensure mu@27020000 and lpuart5 availability during all boot phases

mu@27020000 is required for communication with ELE firmware, and
lpuart5 is the standard output device. Both peripherals must be
available before U-Boot relocation. Use bootph-all instead of
bootph-pre-ram so these nodes are retained across all boot phases.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
8 days agoconfigs: colibri-imx7*: set 'fdtfile' generically in PREBOOT
Ernest Van Hoecke [Tue, 18 Nov 2025 14:48:00 +0000 (15:48 +0100)]
configs: colibri-imx7*: set 'fdtfile' generically in PREBOOT

In TEZI (Toradex Easy Installer), we use one U-Boot binary for both our
NAND and eMMC Colibri iMX7 modules. Currently, CONFIG_PREBOOT sets the
environment variable 'fdtfile' depending on which defconfig was used,
adding the '-emmc' variant for the emmc defconfig. Since we always build
the TEZI recovery U-Boot with the standard (non-emmc) defconfig, fdtfile
has to be overwritten later or it will be wrong there.

By using '$variant', the fdtfile var is properly constructed at run time
for both the NAND and eMMC variants, and we do not have to worry about
setting fdtfile again when building the recovery TEZI U-Boot.

This also synchronizes these configs with how we handle the iMX6ULL.

Fixes: 327381e8b57c ("colibri_imx7: use preboot for fdtfile evaluation")
Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
8 days agoimx91: fix pinmux macros for ENET1_TD3 and I2C2_SCL
Francesco Valla [Thu, 13 Nov 2025 17:03:55 +0000 (18:03 +0100)]
imx91: fix pinmux macros for ENET1_TD3 and I2C2_SCL

Fix macros for the GPIO function for two pads (ENET1_TD3 and I2C2_SCL),
aligning them to the functions specified in the datasheet.

Fixes: a9d562daa3c3 ("imx: Add iMX91 support")

Suggested-by: Javier Viguera <javier.viguera@digi.com>
Signed-off-by: Francesco Valla <francesco@valla.it>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
8 days agogpio: s5p: increment bank base address only if bank is initialized
Kaustabh Chakraborty [Tue, 21 Oct 2025 14:21:35 +0000 (19:51 +0530)]
gpio: s5p: increment bank base address only if bank is initialized

There is a condition guard which ensures that the GPIO node, indeed
describes a GPIO controller.

if (!fdtdec_get_bool(blob, node, "gpio-controller"))
continue;

Since the bank base is being incremented in the loop, it is done so
irrespective of whether the node is a GPIO controller or not. This leads
to the incorrect resolution of bank base addresses.

Move it out of the loop, and instead increment the bank base address
only if the driver successfully binds a GPIO controller.

Reviewed-by: Henrik Grimler <henrik@grimler.se>
Fixes: b8809e60cdb5 ("dm: exynos: gpio: Convert to driver model")
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 days agorpi: Use the U-Boot control FDT for fdt_addr
Simon Glass [Sat, 27 Sep 2025 11:30:15 +0000 (05:30 -0600)]
rpi: Use the U-Boot control FDT for fdt_addr

The fdt_addr variable is used in extlinux as a fallback devicetree if
none is provided by the boot command. Otherwise the only use in U-Boot
seems to me efi_install_fdt() when the internal FDT is required.

The existing mechanism uses the devicetree provided to U-Boot, but in
its original, unrelocated position. In my testing on an rpi_4, this ends
up at 2b35ef00 which is not a convenient place in memory, if the ramdisk
is large.

U-Boot already deals with this sort of problem by relocating the FDT
to a safe address.

So use the control-FDT address instead.

Remove the existing comment, which is confusing, since the FDT is not
actually passed unmodified to the kernel: U-Boot adds various things
using its FDT-fixup mechanism.

Note that board_get_usable_ram_top() reduces the RAM top for boards with
less RAM. This behaviour is left unchanged as there is no other
mechanism for U-Boot to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
Tested-by: Christopher Obbard <christopher.obbard@linaro.org> # CM4 1G
8 days agopinctrl: bcm283x: Add GPIO pull-up/down control for BCM2835 and BCM2711
Cibil Pankiras [Thu, 13 Nov 2025 23:45:32 +0000 (00:45 +0100)]
pinctrl: bcm283x: Add GPIO pull-up/down control for BCM2835 and BCM2711

This patch adds support for configuring GPIO pull-up and pull-down
resistors in the BCM283x pinctrl driver. It implements the brcm,pull
device tree property to control pin bias settings.

The implementation follows the hardware-specific pull control
mechanisms:
- BCM2835: two-step GPPUD register sequence
- BCM2711: direct per-pin control registers

This enables device tree configurations to specify pull-up, pull-down,
or no bias for individual GPIO pins.

Tested on Raspberry Pi boards with both BCM2835 and BCM2711 SoCs.

Signed-off-by: Cibil Pankiras <cibil.pankiras@egym.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
8 days agorpi: Fix compilation with larger configs
Ilias Apalodimas [Sat, 15 Nov 2025 07:33:29 +0000 (09:33 +0200)]
rpi: Fix compilation with larger configs

Tom reports that adding more Kconfig options fails with
board/raspberrypi/rpi/lowlevel_init.o: in function `save_boot_params':
board/raspberrypi/rpi/lowlevel_init.S:20:(.text+0x0):
relocation truncated to fit: R_AARCH64_ADR_PREL_LO21
against symbol `fw_dtb_pointer' defined in .data section
in board/raspberrypi/rpi/rpi.o
make: *** [Makefile:2029: u-boot] Error 1

Since fw_dtb_pointer lives in .data it might end up above the
+-1MB that adr can reach.
So switch over to adrp+add which has a +-4gb reach.

Reported-by: Tom Rini <trini@konsulko.com>
Closes: https://source.denx.de/u-boot/custodians/u-boot-raspberrypi/-/issues/2
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
9 days agoPrepare v2026.01-rc3 v2026.01-rc3
Tom Rini [Mon, 24 Nov 2025 15:27:35 +0000 (09:27 -0600)]
Prepare v2026.01-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
9 days agorockchip: rk3588: Map SCMI shared memory area as non-cacheable
Jonas Karlman [Sun, 16 Nov 2025 01:45:29 +0000 (01:45 +0000)]
rockchip: rk3588: Map SCMI shared memory area as non-cacheable

The SCMI shared memory area is no longer automatically marked as
non-cacheable after the commit a5a0134570c8 ("firmware: scmi: Drop
mmu_set_region_dcache_behaviour() misuse").

This change in behavior cause Rockchip RK3588 boards to fail boot with:

  SoC:   RK3588
  DRAM:  8 GiB
  scmi-over-smccc scmi: Channel unexpectedly busy
  scmi_base_drv scmi-base.0: getting protocol version failed
  scmi-over-smccc scmi: failed to probe base protocol
  initcall_run_r(): initcall initr_dm() failed
  ### ERROR ### Please RESET the board ###

Update the memory mapping on RK3588 to mark the SCMI shared memory area
as non-cacheable to fix the SCMI shared memory based transport issue
that prevented RK3588 boards from booting.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
11 days agoconfigs: Resync with savedefconfig
Tom Rini [Sat, 22 Nov 2025 17:43:21 +0000 (11:43 -0600)]
configs: Resync with savedefconfig

Resync all defconfig files using qconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
11 days agoboot: pxe_utils: Fix memory allocation issues in overlay_dir handling
Kory Maincent (TI.com) [Mon, 17 Nov 2025 15:23:07 +0000 (16:23 +0100)]
boot: pxe_utils: Fix memory allocation issues in overlay_dir handling

Fix two memory allocation bugs in label_boot_extension():

1. When label->fdtdir is not set, overlay_dir was used without any
   memory allocation.

2. When label->fdtdir is set, the allocation size was incorrect,
   using 'len' (just the fdtdir length) instead of 'dir_len' (which
   includes the trailing slash and null terminator).

Resolve both issues by moving the memory allocation and string
formatting outside the conditional block, resulting in clearer code
flow and correct sizing in all cases.

Closes: https://lists.denx.de/pipermail/u-boot/2025-November/602892.html
Addresses-Coverity-ID: 638558 Memory - illegal accesses (UNINIT)
Fixes: 935109cd9e97 ("boot: pxe_utils: Add extension board devicetree overlay support")
Signed-off-by: Kory Maincent (TI.com) <kory.maincent@bootlin.com>
Tested-by: Surkov Kirill <fanra3.tk@gmail.com>
11 days agoupl: Fix buf array size
Francois Berder [Tue, 11 Nov 2025 10:37:35 +0000 (11:37 +0100)]
upl: Fix buf array size

Size of array buf was incorrect due to sizeof returning the
size of an integer (typically 32 bits) instead of a u64 type
(64 bits). Hence, buf array was shorter than expected.

Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Simon Glass <sjg@chromium.org>
11 days agoMerge tag 'efi-2026-01-rc3-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sat, 22 Nov 2025 14:44:38 +0000 (08:44 -0600)]
Merge tag 'efi-2026-01-rc3-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2026-01-rc3-2

CIL https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/28454

Documentation:

* board: ti: am6254atl_sk: correct value of PRELOADED_BL33_BASE
* pytest: fix u-boot-test-flash typo
* samsung: Fix PXE description for the E850-96 board
* board: ti: k3: Update TI firmware repository URL to GitHub
* add missing macro descriptions to include/test/ut.h and add it to
  the API documenation
* rearrange the description of DM tests and describe return values

Testing:

* Enable CI testing ACPI on qemu-riscv64_smode_acpi_defconfig
* Add qemu-riscv64_smode_defconfig to the CI tests
* Generalize tests such that they can run on RISC-V QEMU
  - fdt_test_apply requires CONFIG_OF_LIBFDT_OVERLAY
  - cmd/fdt: do not assume RNG device exists
  - cmd/bdinfo: make no flash assumption
  - cmd/bdinfo: consider arch_print_bdinfo() output
  - common/print: do not use fixed buffer addresses
  - cmd/fdt: do not use fixed buffer addresses
  - raise CONFIG_CONSOLE_RECORD_OUT_SIZE default to 0x6000
* enable CONFIG_CONSOLE_RECORD=y on qemu-riscv64_smode_acpi

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAmkg1IsACgkQxIHbvCwF
# GsQVLA//dmiApob+J9FUhD8joD+DaKSNfLYmv8zwfIFL2xRxx7D+CQT+r+I9FJYI
# KojiLyn4PE/5VOm+wrsvAoYoMLJwAHvg5nmYJLLzvm6V//DLd1AEopP/+Uh8gEVW
# xYGLcvDyGgZpraAhcmqRnAS89py3SigwGzhcUMbT6ZC6pgMVEsBpg8XeMpY7N05c
# rwyqFAAPD8RcF7veQCpry87NiK5o+9YuM1zKl5sDFOpEWKq5ToNwhQ00bnux9lUd
# HWz9X6ge58iFiMXRqUCnOaPeXeChn9ejyEiKtfQ0JtykOf9NT2WMdD2VKe9PCYsd
# f7OynJTGG2OXTKBhon/xj75itiTm7EELc/FHwHEdtZIIHgpi/C33yQgKxLf9mtUo
# Z7DKYpPoaTCbJhs9LCK942KPtshbtAJLKTVqyBPo7Jn0mneeCQUsbaQRU7JruJTK
# hKluUjsAry3Do3wv/w6B8R6MMgfpBktPkqjg9e/maSdhYdkNAYpjajtORgpqmJRV
# HTGJXfL3qFC50jlenlMYOm4Qake33MIMzubaxoM3j5ENDUJ7KAbWADEoWDpve8Tu
# b/fX8uuW+g2T18Y/M9Bsk/jaUjDTx0xtZUSYNIIQJFDaJMzUxGYWlmtXhLZwFU8g
# 7S5pBmgxoSAtQSMAeoJPJp9FSgXYqiGLUeSwcOH2NaPn0lLFvK0=
# =D0Yy
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 21 Nov 2025 03:07:23 PM CST
# gpg:                using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg:                 aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC 2C05 1AC4

12 days agodoc: pytest: fix u-boot-test-flash typo
David Lechner [Fri, 21 Nov 2025 17:36:49 +0000 (11:36 -0600)]
doc: pytest: fix u-boot-test-flash typo

Fix typo: `s/u-boot-test-flash1/u-boot-test-flash/`. The correct name of
the script doesn't have a "1" in it.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agodoc: samsung: Fix PXE doc for E850-96 board
Sam Protsenko [Tue, 18 Nov 2025 21:00:55 +0000 (15:00 -0600)]
doc: samsung: Fix PXE doc for E850-96 board

As stated in PXELINUX doc [1], the PXE configuration file has to be in
the format of "01-MAC-address" for Ethernet connections:

    The hardware type (using its ARP "htype" code) and address, all in
    lowercase hexadecimal with dash separators. For example, for an
    Ethernet (i.e. ARP hardware type "1") with address
    "88:99:AA:BB:CC:DD", it would search for the filename
    "01-88-99-aa-bb-cc-dd".

Indeed, PXE implementation in U-Boot looks for files like that, as can
be seen from this call chain:

    format_mac_pxe()
    pxe_mac_path()
    pxe_get()
    extlinux_pxe_read_bootflow()

Mention the fact that PXE expects the configuration file to be prepended
with "01" in the PXE section of E850-96 documentation. While at it, fix
some other minor issues in PXE section.

[1] https://wiki.syslinux.org/wiki/index.php?title=PXELINUX

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
12 days agodoc: describe return values of C tests
Heinrich Schuchardt [Tue, 18 Nov 2025 20:17:33 +0000 (21:17 +0100)]
doc: describe return values of C tests

* Enumerate return values of C tests
* Reference assertion macros

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agodoc: add include/test/ut.h to HTML documentation
Heinrich Schuchardt [Tue, 18 Nov 2025 20:17:32 +0000 (21:17 +0100)]
doc: add include/test/ut.h to HTML documentation

The asserts in ut.h are often used. Provide online documentation.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agotest: document ut.h
Heinrich Schuchardt [Tue, 18 Nov 2025 20:17:31 +0000 (21:17 +0100)]
test: document ut.h

Add missing Sphinx comments in include/test/ut.h

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agodoc: make writing DM test subsection of writing C test
Heinrich Schuchardt [Tue, 18 Nov 2025 20:17:30 +0000 (21:17 +0100)]
doc: make writing DM test subsection of writing C test

A driver model test is just a special case of a C test.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agodoc: board: ti: am6254atl_sk: fix PRELOADED_BL33_BASE
Anshul Dalal [Wed, 12 Nov 2025 11:16:06 +0000 (16:46 +0530)]
doc: board: ti: am6254atl_sk: fix PRELOADED_BL33_BASE

The SPL_TEXT_BASE for AM62x SiP is set as 0x82000000 whereas the
documentation states 0x81880000 as the PRELOADED_BL33_BASE value.

Both should match to allow TFA to jump to the address where A53 SPL has
been loaded.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agodoc: board: ti: k3: Update TI firmware repository URL to GitHub
Vignesh Raghavendra [Wed, 12 Nov 2025 10:42:17 +0000 (16:12 +0530)]
doc: board: ti: k3: Update TI firmware repository URL to GitHub

Update the TI firmware repository URL from git.ti.com to the
GitHub mirror at github.com/TexasInstruments/ti-linux-firmware
which is much more reliable.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reported-by: Tom Rini <trini@konsulko.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
12 days agoCI: test qemu-riscv64_smode[_acpi]
Heinrich Schuchardt [Sun, 9 Nov 2025 10:10:10 +0000 (11:10 +0100)]
CI: test qemu-riscv64_smode[_acpi]

QEMU comes with its own OpenSBI. For running RISC-V virtual machine
using one of qemu-riscv64_smode_defconfig or
qemu-riscv64_smode_acpi_defconfig is the natural choice.

Add the riscv64 smode configurations to the test scope.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agoconfigs: CONFIG_CONSOLE_RECORD=y on qemu-riscv64_smode_acpi
Heinrich Schuchardt [Sun, 9 Nov 2025 10:10:09 +0000 (11:10 +0100)]
configs: CONFIG_CONSOLE_RECORD=y on qemu-riscv64_smode_acpi

For testing ACPI on QEMU we need a defconfig that supports acpi command
test.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agocommon: default CONFIG_CONSOLE_RECORD_OUT_SIZE=0x6000
Heinrich Schuchardt [Sun, 9 Nov 2025 10:10:08 +0000 (11:10 +0100)]
common: default CONFIG_CONSOLE_RECORD_OUT_SIZE=0x6000

For some tests the current default of 0x400 for
CONFIG_CONSOLE_RECORD_OUT_SIZE is too small.

Raise the value to 0x6000 which is already the most common value.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agotest: cmd/fdt: do not use fixed buffer addresses
Heinrich Schuchardt [Sun, 9 Nov 2025 10:10:07 +0000 (11:10 +0100)]
test: cmd/fdt: do not use fixed buffer addresses

The location of memory depends on the board. Do not assume memory at fixed
memory locations. Use memalign() instead to allocate a buffer.

Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agotest: common/print: do not use fixed buffer addresses
Heinrich Schuchardt [Sun, 9 Nov 2025 10:10:06 +0000 (11:10 +0100)]
test: common/print: do not use fixed buffer addresses

The location of memory depends on the board. Do not assume memory at fixed
memory locations. Use calloc() instead to allocate buffers.

Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agotest: cmd/bdinfo: consider arch_print_bdinfo() output
Heinrich Schuchardt [Sun, 9 Nov 2025 10:10:05 +0000 (11:10 +0100)]
test: cmd/bdinfo: consider arch_print_bdinfo() output

On x86 commit 9b35dbc93fd4 ("x86: Show the timestamp counter with bdinfo")
has added another bdinfo output line.

On RISC-V commit 66b5ee9c558e ("riscv: add RISC-V fields to bdinfo
command") implemented arch_print_bdinfo().

Update the bdinfo test accordingly.

Fixes: 9b35dbc93fd4 ("x86: Show the timestamp counter with bdinfo")
Fixes: 66b5ee9c558e ("riscv: add RISC-V fields to bdinfo command")
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agotest: cmd/bdinfo: make no flash assumption
Heinrich Schuchardt [Sun, 9 Nov 2025 10:10:04 +0000 (11:10 +0100)]
test: cmd/bdinfo: make no flash assumption

The location and size of flash is device-dependent. Do not make any
assumption about the location and size.

Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agotest: cmd/fdt: do not assume RNG device exists
Heinrich Schuchardt [Sun, 9 Nov 2025 10:10:03 +0000 (11:10 +0100)]
test: cmd/fdt: do not assume RNG device exists

In fdt_test_chosen() currently we test if DM_RNG is configured.
CONFIG_DM_RNG=y does not imply that a RNG device actually exists.
For instance QEMU may be called with -device virtio-rng-device or not.
The current test framework evicts the virtio RNG device even if QEMU is
called with -device virtio-rng-device.

In the fdt_test_chosen() check if a RNG device exists.
Ignore 'No RNG device' messages.

Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
12 days agotest: fdt_test_apply requires CONFIG_OF_LIBFDT_OVERLAY
Heinrich Schuchardt [Sun, 9 Nov 2025 10:10:02 +0000 (11:10 +0100)]
test: fdt_test_apply requires CONFIG_OF_LIBFDT_OVERLAY

The `fdt apply` sub-command is only available if CONFIG_OF_LIBFDT_OVERLAY
is enabled.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
13 days agomtd: rawnand: atmel: atmel_pmecc_create: Remove unused code
Zixun LI [Fri, 7 Nov 2025 15:02:24 +0000 (16:02 +0100)]
mtd: rawnand: atmel: atmel_pmecc_create: Remove unused code

"timing" and "timing_res_idx" are unused and not exist in Linux driver,
let's remove them.

Signed-off-by: Zixun LI <admin@hifiphile.com>
Acked-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
13 days agomtd: rawnand: atmel: set pmecc data setup time
Zixun LI [Fri, 7 Nov 2025 15:02:23 +0000 (16:02 +0100)]
mtd: rawnand: atmel: set pmecc data setup time

Setup the pmecc data setup time as 3 clock cycles for 133MHz as
recommended by the datasheet.

Backported from Linux: f55f552a7c7e0a1 ("mtd: rawnand: atmel: set pmecc
data setup time")

Fixes: a490e1b7c017c ("nand: atmel: Add pmecc driver")

Signed-off-by: Zixun LI <admin@hifiphile.com>
Tested-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
2 weeks agoMerge tag 'u-boot-ufs-20251119' of https://source.denx.de/u-boot/custodians/u-boot-ufs
Tom Rini [Wed, 19 Nov 2025 15:04:32 +0000 (09:04 -0600)]
Merge tag 'u-boot-ufs-20251119' of https://source.denx.de/u-boot/custodians/u-boot-ufs

- Sort again the UFS Kconfig & Makefile
- Use unique name for the rcar-gen5 ufs driver

2 weeks agoMerge tag 'xilinx-for-v2026.01-rc3' of https://source.denx.de/u-boot/custodians/u...
Tom Rini [Wed, 19 Nov 2025 14:21:29 +0000 (08:21 -0600)]
Merge tag 'xilinx-for-v2026.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

CI: https://source.denx.de/u-boot/custodians/u-boot-microblaze/-/pipelines/28413

AMD/Xilinx/FPGA changes for v2026.01-rc3

- Align brcp1 boot.bin location
- Fix MB-V compilation warning when AXI enet is enabled

2 weeks agoMerge branch 'u-boot-nand-20250918' of https://source.denx.de/u-boot/custodians/u...
Tom Rini [Wed, 19 Nov 2025 14:15:58 +0000 (08:15 -0600)]
Merge branch 'u-boot-nand-20250918' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash

CI: https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/28408

This pull request enhances NAND and SPI flash support, primarily
focusing on the Airoha EN7523 platform. The Airoha SPI driver receives
a major update, adding DMA, dual/quad-wire modes, and a critical
workaround to prevent flash damage if the UART_TXD pin shorts to Ground.

New chips supported include FudanMicro FM25S01A SPI-NAND and several
Winbond SPI NOR devices. Fixes include correcting Kconfig dependencies,
updating the mtd benchmark command to use lldiv(), and addressing minor
bugs in the generic spi-mem and SPL NAND code.